svn commit: r358970 - in stable/12/sys: conf dev/cxgbe dev/cxgbe/firmware modules/cxgbe/t4_firmware modules/cxgbe/t5_firmware modules/cxgbe/t6_firmware
Navdeep Parhar
np at FreeBSD.org
Fri Mar 13 22:18:43 UTC 2020
Author: np
Date: Fri Mar 13 22:18:40 2020
New Revision: 358970
URL: https://svnweb.freebsd.org/changeset/base/358970
Log:
MFC r355046, r355579, r355595, and r357793.
r355046:
cxgbe(4): Update the firmware interface header.
This allows the driver to be updated for the next firmware without
waiting for it to be released.
r355579:
cxgbe(4): Update T4/5/6 firmwares to 1.24.11.0.
These were obtained from the Chelsio Unified Wire v3.12.0.1 beta
release.
Note that the firmwares are not uuencoded any more.
r355595:
cxgbe(4): Simplify the firmware version checks a bit.
No functional change.
r357793:
cxgbe(4): Update T4/5/6 firmwares to 1.24.12.0.
Sponsored by: Chelsio Communications
Added:
stable/12/sys/dev/cxgbe/firmware/t4fw-1.24.12.0.bin
- copied unchanged from r357793, head/sys/dev/cxgbe/firmware/t4fw-1.24.12.0.bin
stable/12/sys/dev/cxgbe/firmware/t5fw-1.24.12.0.bin
- copied unchanged from r357793, head/sys/dev/cxgbe/firmware/t5fw-1.24.12.0.bin
stable/12/sys/dev/cxgbe/firmware/t6fw-1.24.12.0.bin
- copied unchanged from r357793, head/sys/dev/cxgbe/firmware/t6fw-1.24.12.0.bin
Deleted:
stable/12/sys/dev/cxgbe/firmware/t4fw-1.23.0.0.bin.uu
stable/12/sys/dev/cxgbe/firmware/t5fw-1.23.0.0.bin.uu
stable/12/sys/dev/cxgbe/firmware/t6fw-1.23.0.0.bin.uu
Modified:
stable/12/sys/conf/files
stable/12/sys/dev/cxgbe/firmware/t4fw_interface.h
stable/12/sys/dev/cxgbe/firmware/t6fw_cfg_uwire.txt
stable/12/sys/dev/cxgbe/t4_main.c
stable/12/sys/modules/cxgbe/t4_firmware/Makefile
stable/12/sys/modules/cxgbe/t5_firmware/Makefile
stable/12/sys/modules/cxgbe/t6_firmware/Makefile
Directory Properties:
stable/12/ (props changed)
Modified: stable/12/sys/conf/files
==============================================================================
--- stable/12/sys/conf/files Fri Mar 13 21:45:51 2020 (r358969)
+++ stable/12/sys/conf/files Fri Mar 13 22:18:40 2020 (r358970)
@@ -1471,8 +1471,8 @@ t4fw.fwo optional cxgbe \
no-implicit-rule \
clean "t4fw.fwo"
t4fw.fw optional cxgbe \
- dependency "$S/dev/cxgbe/firmware/t4fw-1.23.0.0.bin.uu" \
- compile-with "${NORMAL_FW}" \
+ dependency "$S/dev/cxgbe/firmware/t4fw-1.24.12.0.bin" \
+ compile-with "${CP} ${.ALLSRC} ${.TARGET}" \
no-obj no-implicit-rule \
clean "t4fw.fw"
t5fw_cfg.c optional cxgbe \
@@ -1505,8 +1505,8 @@ t5fw.fwo optional cxgbe \
no-implicit-rule \
clean "t5fw.fwo"
t5fw.fw optional cxgbe \
- dependency "$S/dev/cxgbe/firmware/t5fw-1.23.0.0.bin.uu" \
- compile-with "${NORMAL_FW}" \
+ dependency "$S/dev/cxgbe/firmware/t5fw-1.24.12.0.bin" \
+ compile-with "${CP} ${.ALLSRC} ${.TARGET}" \
no-obj no-implicit-rule \
clean "t5fw.fw"
t6fw_cfg.c optional cxgbe \
@@ -1539,8 +1539,8 @@ t6fw.fwo optional cxgbe \
no-implicit-rule \
clean "t6fw.fwo"
t6fw.fw optional cxgbe \
- dependency "$S/dev/cxgbe/firmware/t6fw-1.23.0.0.bin.uu" \
- compile-with "${NORMAL_FW}" \
+ dependency "$S/dev/cxgbe/firmware/t6fw-1.24.12.0.bin" \
+ compile-with "${CP} ${.ALLSRC} ${.TARGET}" \
no-obj no-implicit-rule \
clean "t6fw.fw"
dev/cxgbe/crypto/t4_crypto.c optional ccr \
Copied: stable/12/sys/dev/cxgbe/firmware/t4fw-1.24.12.0.bin (from r357793, head/sys/dev/cxgbe/firmware/t4fw-1.24.12.0.bin)
==============================================================================
Binary file (source and/or target). No diff available.
Modified: stable/12/sys/dev/cxgbe/firmware/t4fw_interface.h
==============================================================================
--- stable/12/sys/dev/cxgbe/firmware/t4fw_interface.h Fri Mar 13 21:45:51 2020 (r358969)
+++ stable/12/sys/dev/cxgbe/firmware/t4fw_interface.h Fri Mar 13 22:18:40 2020 (r358970)
@@ -142,6 +142,7 @@ enum fw_wr_opcodes {
FW_ISCSI_TX_DATA_WR = 0x45,
FW_PTP_TX_PKT_WR = 0x46,
FW_TLSTX_DATA_WR = 0x68,
+ FW_TLS_TUNNEL_OFLD_WR = 0x69,
FW_CRYPTO_LOOKASIDE_WR = 0x6d,
FW_COISCSI_TGT_WR = 0x70,
FW_COISCSI_TGT_CONN_WR = 0x71,
@@ -2200,6 +2201,11 @@ enum fw_chnet_ifconf_wr_subop {
FW_CHNET_IFCONF_WR_SUBOP_ICMP_PING4,
FW_CHNET_IFCONF_WR_SUBOP_ICMP_PING6,
+ FW_CHNET_IFCONF_WR_SUBOP_ICMP_PLD_PING4,
+ FW_CHNET_IFCONF_WR_SUBOP_ICMP_PLD_PING6,
+
+ FW_CHNET_IFCONF_WR_SUBOP_PMTU6_CLEAR,
+
FW_CHNET_IFCONF_WR_SUBOP_MAX,
};
@@ -2228,7 +2234,8 @@ struct fw_chnet_ifconf_wr {
} mac;
} u;
struct fw_chnet_ifconf_params {
- __be32 r0;
+ __be16 ping_pldsize;
+ __be16 r0;
__be16 vlanid;
__be16 mtu;
union fw_chnet_ifconf_addr_type {
@@ -4080,6 +4087,13 @@ struct fw_crypto_lookaside_wr {
(((x) >> S_FW_CRYPTO_LOOKASIDE_WR_HASH_SIZE) & \
M_FW_CRYPTO_LOOKASIDE_WR_HASH_SIZE)
+struct fw_tls_tunnel_ofld_wr {
+ __be32 op_compl;
+ __be32 flowid_len16;
+ __be32 plen;
+ __be32 r4;
+};
+
/******************************************************************************
* C O M M A N D s
*********************/
@@ -4137,6 +4151,7 @@ enum fw_cmd_opcodes {
FW_DEVLOG_CMD = 0x25,
FW_WATCHDOG_CMD = 0x27,
FW_CLIP_CMD = 0x28,
+ FW_CLIP2_CMD = 0x29,
FW_CHNET_IFACE_CMD = 0x26,
FW_FCOE_RES_INFO_CMD = 0x31,
FW_FCOE_LINK_CMD = 0x32,
@@ -4752,6 +4767,22 @@ enum fw_params_mnem {
/*
* device parameters
*/
+#define S_FW_PARAMS_PARAM_FILTER_MODE 16
+#define M_FW_PARAMS_PARAM_FILTER_MODE 0xffff
+#define V_FW_PARAMS_PARAM_FILTER_MODE(x) \
+ ((x) << S_FW_PARAMS_PARAM_FILTER_MODE)
+#define G_FW_PARAMS_PARAM_FILTER_MODE(x) \
+ (((x) >> S_FW_PARAMS_PARAM_FILTER_MODE) & \
+ M_FW_PARAMS_PARAM_FILTER_MODE)
+
+#define S_FW_PARAMS_PARAM_FILTER_MASK 0
+#define M_FW_PARAMS_PARAM_FILTER_MASK 0xffff
+#define V_FW_PARAMS_PARAM_FILTER_MASK(x) \
+ ((x) << S_FW_PARAMS_PARAM_FILTER_MASK)
+#define G_FW_PARAMS_PARAM_FILTER_MASK(x) \
+ (((x) >> S_FW_PARAMS_PARAM_FILTER_MASK) & \
+ M_FW_PARAMS_PARAM_FILTER_MASK)
+
enum fw_params_param_dev {
FW_PARAMS_PARAM_DEV_CCLK = 0x00, /* chip core clock in khz */
FW_PARAMS_PARAM_DEV_PORTVEC = 0x01, /* the port vector */
@@ -4799,6 +4830,14 @@ enum fw_params_param_dev {
FW_PARAMS_PARAM_DEV_ADD_SMAC = 0x25,
FW_PARAMS_PARAM_DEV_HPFILTER_REGION_SUPPORT = 0x26,
FW_PARAMS_PARAM_DEV_OPAQUE_VIID_SMT_EXTN = 0x27,
+ FW_PARAMS_PARAM_DEV_HASHFILTER_WITH_OFLD = 0x28,
+ FW_PARAMS_PARAM_DEV_DBQ_TIMER = 0x29,
+ FW_PARAMS_PARAM_DEV_DBQ_TIMERTICK = 0x2A,
+ FW_PARAMS_PARAM_DEV_NUM_TM_CLASS = 0x2B,
+ FW_PARAMS_PARAM_DEV_VF_TRVLAN = 0x2C,
+ FW_PARAMS_PARAM_DEV_TCB_CACHE_FLUSH = 0x2D,
+ FW_PARAMS_PARAM_DEV_FILTER = 0x2E,
+ FW_PARAMS_PARAM_DEV_CLIP2_CMD = 0x2F,
};
/*
@@ -4827,8 +4866,14 @@ enum fw_params_param_dev_diag {
FW_PARAM_DEV_DIAG_TMP = 0x00,
FW_PARAM_DEV_DIAG_VDD = 0x01,
FW_PARAM_DEV_DIAG_MAXTMPTHRESH = 0x02,
+ FW_PARAM_DEV_DIAG_RESET_TMP_SENSOR = 0x03,
};
+enum fw_params_param_dev_filter{
+ FW_PARAM_DEV_FILTER_VNIC_MODE = 0x00,
+ FW_PARAM_DEV_FILTER_MODE_MASK = 0x01,
+};
+
enum fw_params_param_dev_fwcache {
FW_PARAM_DEV_FWCACHE_FLUSH = 0x00,
FW_PARAM_DEV_FWCACHE_FLUSHINV = 0x01,
@@ -4892,9 +4937,21 @@ enum fw_params_param_pfvf {
FW_PARAMS_PARAM_PFVF_PPOD_EDRAM_START = 0x3B,
FW_PARAMS_PARAM_PFVF_PPOD_EDRAM_END = 0x3C,
FW_PARAMS_PARAM_PFVF_MAX_PKTS_PER_ETH_TX_PKTS_WR = 0x3D,
+ FW_PARAMS_PARAM_PFVF_GET_SMT_START = 0x3E,
+ FW_PARAMS_PARAM_PFVF_GET_SMT_SIZE = 0x3F,
+ FW_PARAMS_PARAM_PFVF_LINK_STATE = 0x40,
};
/*
+ * virtual link state as seen by the specified VF
+ */
+enum vf_link_states {
+ VF_LINK_STATE_AUTO = 0x00,
+ VF_LINK_STATE_ENABLE = 0x01,
+ VF_LINK_STATE_DISABLE = 0x02,
+};
+
+/*
* dma queue parameters
*/
enum fw_params_param_dmaq {
@@ -4907,6 +4964,7 @@ enum fw_params_param_dmaq {
FW_PARAMS_PARAM_DMAQ_EQ_SCHEDCLASS_ETH = 0x12,
FW_PARAMS_PARAM_DMAQ_EQ_DCBPRIO_ETH = 0x13,
FW_PARAMS_PARAM_DMAQ_EQ_DCA = 0x14,
+ FW_PARAMS_PARAM_DMAQ_EQ_TIMERIX = 0x15,
FW_PARAMS_PARAM_DMAQ_CONM_CTXT = 0x20,
FW_PARAMS_PARAM_DMAQ_FLM_DCA = 0x30
};
@@ -4922,6 +4980,7 @@ enum fw_params_param_chnet_flags {
FW_PARAMS_PARAM_CHNET_FLAGS_ENABLE_IPV6 = 0x1,
FW_PARAMS_PARAM_CHNET_FLAGS_ENABLE_DAD = 0x2,
FW_PARAMS_PARAM_CHNET_FLAGS_ENABLE_MLDV2= 0x4,
+ FW_PARAMS_PARAM_CHNET_FLAGS_ENABLE_IPV6_SLAAC = 0x8,
};
#define S_FW_PARAMS_MNEM 24
@@ -5852,7 +5911,7 @@ struct fw_eq_eth_cmd {
__be32 dcaen_to_eqsize;
__be64 eqaddr;
__be32 autoequiqe_to_viid;
- __be32 r8_lo;
+ __be32 timeren_timerix;
__be64 r9;
};
@@ -6046,6 +6105,19 @@ struct fw_eq_eth_cmd {
#define G_FW_EQ_ETH_CMD_VIID(x) \
(((x) >> S_FW_EQ_ETH_CMD_VIID) & M_FW_EQ_ETH_CMD_VIID)
+#define S_FW_EQ_ETH_CMD_TIMEREN 3
+#define M_FW_EQ_ETH_CMD_TIMEREN 0x1
+#define V_FW_EQ_ETH_CMD_TIMEREN(x) ((x) << S_FW_EQ_ETH_CMD_TIMEREN)
+#define G_FW_EQ_ETH_CMD_TIMEREN(x) \
+ (((x) >> S_FW_EQ_ETH_CMD_TIMEREN) & M_FW_EQ_ETH_CMD_TIMEREN)
+#define F_FW_EQ_ETH_CMD_TIMEREN V_FW_EQ_ETH_CMD_TIMEREN(1U)
+
+#define S_FW_EQ_ETH_CMD_TIMERIX 0
+#define M_FW_EQ_ETH_CMD_TIMERIX 0x7
+#define V_FW_EQ_ETH_CMD_TIMERIX(x) ((x) << S_FW_EQ_ETH_CMD_TIMERIX)
+#define G_FW_EQ_ETH_CMD_TIMERIX(x) \
+ (((x) >> S_FW_EQ_ETH_CMD_TIMERIX) & M_FW_EQ_ETH_CMD_TIMERIX)
+
struct fw_eq_ctrl_cmd {
__be32 op_to_vfn;
__be32 alloc_to_len16;
@@ -6414,6 +6486,8 @@ struct fw_eq_ofld_cmd {
#define G_FW_EQ_OFLD_CMD_EQSIZE(x) \
(((x) >> S_FW_EQ_OFLD_CMD_EQSIZE) & M_FW_EQ_OFLD_CMD_EQSIZE)
+/* Following macros present here only to maintain backward
+ * compatibiity. Driver must not use these anymore */
/* Macros for VIID parsing:
VIID - [10:8] PFN, [7] VI Valid, [6:0] VI number */
#define S_FW_VIID_PFN 8
@@ -7125,11 +7199,12 @@ enum fw_port_mdi {
#define FW_PORT_CAP32_MDISTRAIGHT 0x00400000UL
#define FW_PORT_CAP32_FEC_RS 0x00800000UL
#define FW_PORT_CAP32_FEC_BASER_RS 0x01000000UL
-#define FW_PORT_CAP32_FEC_RESERVED1 0x02000000UL
+#define FW_PORT_CAP32_FEC_NO_FEC 0x02000000UL
#define FW_PORT_CAP32_FEC_RESERVED2 0x04000000UL
#define FW_PORT_CAP32_FEC_RESERVED3 0x08000000UL
#define FW_PORT_CAP32_FORCE_PAUSE 0x10000000UL
-#define FW_PORT_CAP32_RESERVED2 0xe0000000UL
+#define FW_PORT_CAP32_FORCE_FEC 0x20000000UL
+#define FW_PORT_CAP32_RESERVED2 0xc0000000UL
#define S_FW_PORT_CAP32_SPEED 0
#define M_FW_PORT_CAP32_SPEED 0xfff
@@ -7190,6 +7265,14 @@ enum fw_port_mdi32 {
#define CAP32_FC(__cap32) \
(V_FW_PORT_CAP32_FC(M_FW_PORT_CAP32_FC) & __cap32)
+static inline bool
+fec_supported(uint32_t caps)
+{
+
+ return ((caps & (FW_PORT_CAP32_SPEED_25G | FW_PORT_CAP32_SPEED_50G |
+ FW_PORT_CAP32_SPEED_100G)) != 0);
+}
+
enum fw_port_action {
FW_PORT_ACTION_L1_CFG = 0x0001,
FW_PORT_ACTION_L2_CFG = 0x0002,
@@ -7226,7 +7309,8 @@ enum fw_port_l2cfg_ctlbf {
FW_PORT_L2_CTLBF_OVLAN3 = 0x08,
FW_PORT_L2_CTLBF_IVLAN = 0x10,
FW_PORT_L2_CTLBF_TXIPG = 0x20,
- FW_PORT_L2_CTLBF_MTU = 0x40
+ FW_PORT_L2_CTLBF_MTU = 0x40,
+ FW_PORT_L2_CTLBF_OVLAN_FILT = 0x80,
};
enum fw_dcb_app_tlv_sf {
@@ -7435,6 +7519,13 @@ struct fw_port_cmd {
(((x) >> S_FW_PORT_CMD_IVLAN0) & M_FW_PORT_CMD_IVLAN0)
#define F_FW_PORT_CMD_IVLAN0 V_FW_PORT_CMD_IVLAN0(1U)
+#define S_FW_PORT_CMD_OVLAN_FILT 2
+#define M_FW_PORT_CMD_OVLAN_FILT 0x1
+#define V_FW_PORT_CMD_OVLAN_FILT(x) ((x) << S_FW_PORT_CMD_OVLAN_FILT)
+#define G_FW_PORT_CMD_OVLAN_FILT(x) \
+ (((x) >> S_FW_PORT_CMD_OVLAN_FILT) & M_FW_PORT_CMD_OVLAN_FILT)
+#define F_FW_PORT_CMD_OVLAN_FILT V_FW_PORT_CMD_OVLAN_FILT(1U)
+
#define S_FW_PORT_CMD_TXIPG 3
#define M_FW_PORT_CMD_TXIPG 0x1fff
#define V_FW_PORT_CMD_TXIPG(x) ((x) << S_FW_PORT_CMD_TXIPG)
@@ -8145,7 +8236,7 @@ struct fw_ptp_cmd {
__u8 txchan;
__be16 absid;
__be16 mode;
- __be16 r3;
+ __be16 ptp_rx_ctrl_pkd;
} init;
struct fw_ptp_ts {
__u8 sc;
@@ -8164,6 +8255,14 @@ struct fw_ptp_cmd {
#define G_FW_PTP_CMD_PORTID(x) \
(((x) >> S_FW_PTP_CMD_PORTID) & M_FW_PTP_CMD_PORTID)
+#define S_FW_PTP_CMD_PTP_RX_CTRL 15
+#define M_FW_PTP_CMD_PTP_RX_CTRL 0x1
+#define V_FW_PTP_CMD_PTP_RX_CTRL(x) ((x) << S_FW_PTP_CMD_PTP_RX_CTRL)
+#define G_FW_PTP_CMD_PTP_RX_CTRL(x) \
+ (((x) >> S_FW_PTP_CMD_PTP_RX_CTRL) & M_FW_PTP_CMD_PTP_RX_CTRL)
+#define F_FW_PTP_CMD_PTP_RX_CTRL V_FW_PTP_CMD_PTP_RX_CTRL(1U)
+
+
struct fw_rss_ind_tbl_cmd {
__be32 op_to_viid;
__be32 retval_len16;
@@ -8815,6 +8914,16 @@ struct fw_clip_cmd {
#define G_FW_CLIP_CMD_INDEX(x) \
(((x) >> S_FW_CLIP_CMD_INDEX) & M_FW_CLIP_CMD_INDEX)
+struct fw_clip2_cmd {
+ __be32 op_to_write;
+ __be32 alloc_to_len16;
+ __be64 ip_hi;
+ __be64 ip_lo;
+ __be64 ipm_hi;
+ __be64 ipm_lo;
+ __be32 r4[2];
+};
+
/******************************************************************************
* F O i S C S I C O M M A N D s
**************************************/
@@ -9829,20 +9938,20 @@ enum fw_hdr_chip {
(((x) >> S_FW_HDR_FW_VER_BUILD) & M_FW_HDR_FW_VER_BUILD)
enum {
- T4FW_VERSION_MAJOR = 0x01,
- T4FW_VERSION_MINOR = 0x17,
- T4FW_VERSION_MICRO = 0x00,
- T4FW_VERSION_BUILD = 0x00,
+ T4FW_VERSION_MAJOR = 1,
+ T4FW_VERSION_MINOR = 24,
+ T4FW_VERSION_MICRO = 12,
+ T4FW_VERSION_BUILD = 0,
- T5FW_VERSION_MAJOR = 0x01,
- T5FW_VERSION_MINOR = 0x17,
- T5FW_VERSION_MICRO = 0x00,
- T5FW_VERSION_BUILD = 0x00,
+ T5FW_VERSION_MAJOR = 1,
+ T5FW_VERSION_MINOR = 24,
+ T5FW_VERSION_MICRO = 12,
+ T5FW_VERSION_BUILD = 0,
- T6FW_VERSION_MAJOR = 0x01,
- T6FW_VERSION_MINOR = 0x17,
- T6FW_VERSION_MICRO = 0x00,
- T6FW_VERSION_BUILD = 0x00,
+ T6FW_VERSION_MAJOR = 1,
+ T6FW_VERSION_MINOR = 24,
+ T6FW_VERSION_MICRO = 12,
+ T6FW_VERSION_BUILD = 0,
};
enum {
@@ -9880,6 +9989,10 @@ enum {
T6FW_HDR_INTFVER_FCOE = 0x00,
};
+#define FW_VERSION32(MAJOR, MINOR, MICRO, BUILD) ( \
+ V_FW_HDR_FW_VER_MAJOR(MAJOR) | V_FW_HDR_FW_VER_MINOR(MINOR) | \
+ V_FW_HDR_FW_VER_MICRO(MICRO) | V_FW_HDR_FW_VER_BUILD(BUILD))
+
enum {
FW_HDR_MAGIC_RUNTIME = 0x00000000,
FW_HDR_MAGIC_BOOTSTRAP = 0x626f6f74,
@@ -9918,6 +10031,10 @@ struct fw_ifconf_dhcp_info {
__u8 op;
__u8 len;
__u8 data[270];
+};
+
+struct fw_ifconf_ping_info {
+ __be16 ping_pldsize;
};
#endif /* _T4FW_INTERFACE_H_ */
Copied: stable/12/sys/dev/cxgbe/firmware/t5fw-1.24.12.0.bin (from r357793, head/sys/dev/cxgbe/firmware/t5fw-1.24.12.0.bin)
==============================================================================
Binary file (source and/or target). No diff available.
Copied: stable/12/sys/dev/cxgbe/firmware/t6fw-1.24.12.0.bin (from r357793, head/sys/dev/cxgbe/firmware/t6fw-1.24.12.0.bin)
==============================================================================
Binary file (source and/or target). No diff available.
Modified: stable/12/sys/dev/cxgbe/firmware/t6fw_cfg_uwire.txt
==============================================================================
--- stable/12/sys/dev/cxgbe/firmware/t6fw_cfg_uwire.txt Fri Mar 13 21:45:51 2020 (r358969)
+++ stable/12/sys/dev/cxgbe/firmware/t6fw_cfg_uwire.txt Fri Mar 13 22:18:40 2020 (r358970)
@@ -95,12 +95,19 @@
sge_timer_value = 5, 10, 20, 50, 100, 200 # SGE_TIMER_VALUE* in usecs
reg[0x10c4] = 0x20000000/0x20000000 # GK_CONTROL, enable 5th thread
- # Set the SGE Doorbell Queue Timer "tick" to 5us and initialize
+ # Set the SGE Doorbell Queue Timer "tick" to 50us and initialize
# the Timer Table to a default set of values (which are multiples
- # of the Timer Tick).
+ # of the Timer Tick). Note that the set of Tick Multipliers are
+ # NOT sorted. The Host Drivers are expected to pick amongst them
+ # for (Tick * Multiplier[i]) values which most closely match the Host
+ # Drivers' needs. Also, most Host Drivers will be default start
+ # start with (Tick * Multiplier[0]), so this gives us some flexibility
+ # in terms of picking a Tick and a default Multiplier somewhere in
+ # the middle of the achievable set of (Tick * Multiplier[i]) values.
+ # Thus, the below select for 150us by this default.
#
- sge_dbq_timertick = 5
- sge_dbq_timer = 1, 2, 3, 5, 7, 9, 12, 16
+ sge_dbq_timertick = 50
+ sge_dbq_timer = 3, 2, 1, 5, 7, 9, 12, 16
# enable TP_OUT_CONFIG.IPIDSPLITMODE
reg[0x7d04] = 0x00010000/0x00010000
@@ -423,10 +430,10 @@
tp_l2t = 3072
tp_ddp = 2
tp_ddp_iscsi = 2
- tp_tls_key = 3
+ tp_tls_key = 2
tp_tls_mxrxsize = 17408 # 16384 + 1024, governs max rx data, pm max xfer len, rx coalesce sizes
tp_stag = 2
- tp_pbl = 5
+ tp_pbl = 7
tp_rq = 7
tp_srq = 128
@@ -471,7 +478,7 @@
nhash = 2048
tp_l2t = 4
protocol = fcoe_initiator
- tp_ddp = 2
+ tp_ddp = 1
fcoe_nfcf = 16
fcoe_nvnp = 32
fcoe_nssn = 1024
@@ -581,7 +588,7 @@
[fini]
version = 0x1425001d
- checksum = 0xdbff9437
+ checksum = 0x14a022cd
# Total resources used by above allocations:
# Virtual Interfaces: 104
@@ -592,4 +599,4 @@
# Virtual Functions: 64
#
# $FreeBSD$
-#
+#
\ No newline at end of file
Modified: stable/12/sys/dev/cxgbe/t4_main.c
==============================================================================
--- stable/12/sys/dev/cxgbe/t4_main.c Fri Mar 13 21:45:51 2020 (r358969)
+++ stable/12/sys/dev/cxgbe/t4_main.c Fri Mar 13 22:18:40 2020 (r358970)
@@ -4096,9 +4096,8 @@ set_params__pre_init(struct adapter *sc)
val = 1;
rc = -t4_set_params(sc, sc->mbox, sc->pf, 0, 1, ¶m, &val);
/* firmwares < 1.20.1.0 do not have this param. */
- if (rc == FW_EINVAL && sc->params.fw_vers <
- (V_FW_HDR_FW_VER_MAJOR(1) | V_FW_HDR_FW_VER_MINOR(20) |
- V_FW_HDR_FW_VER_MICRO(1) | V_FW_HDR_FW_VER_BUILD(0))) {
+ if (rc == FW_EINVAL &&
+ sc->params.fw_vers < FW_VERSION32(1, 20, 1, 0)) {
rc = 0;
}
if (rc != 0) {
@@ -4263,9 +4262,7 @@ get_params__post_init(struct adapter *sc)
return (rc);
}
sc->tids.ntids = val[0];
- if (sc->params.fw_vers <
- (V_FW_HDR_FW_VER_MAJOR(1) | V_FW_HDR_FW_VER_MINOR(20) |
- V_FW_HDR_FW_VER_MICRO(5) | V_FW_HDR_FW_VER_BUILD(0))) {
+ if (sc->params.fw_vers < FW_VERSION32(1, 20, 5, 0)) {
MPASS(sc->tids.ntids >= sc->tids.nhpftids);
sc->tids.ntids -= sc->tids.nhpftids;
}
@@ -4305,9 +4302,7 @@ get_params__post_init(struct adapter *sc)
return (rc);
}
sc->tids.ntids = val[0];
- if (sc->params.fw_vers <
- (V_FW_HDR_FW_VER_MAJOR(1) | V_FW_HDR_FW_VER_MINOR(20) |
- V_FW_HDR_FW_VER_MICRO(5) | V_FW_HDR_FW_VER_BUILD(0))) {
+ if (sc->params.fw_vers < FW_VERSION32(1, 20, 5, 0)) {
MPASS(sc->tids.ntids >= sc->tids.nhpftids);
sc->tids.ntids -= sc->tids.nhpftids;
}
Modified: stable/12/sys/modules/cxgbe/t4_firmware/Makefile
==============================================================================
--- stable/12/sys/modules/cxgbe/t4_firmware/Makefile Fri Mar 13 21:45:51 2020 (r358969)
+++ stable/12/sys/modules/cxgbe/t4_firmware/Makefile Fri Mar 13 22:18:40 2020 (r358970)
@@ -17,11 +17,7 @@ FIRMWS+= ${F}:${F:C/.txt//}:1.0.0.0
.endif
.endfor
-T4FW_VER= 1.23.0.0
-FIRMWS+= t4fw.fw:t4fw:${T4FW_VER}
-CLEANFILES+= t4fw.fw
-
-t4fw.fw: t4fw-${T4FW_VER}.bin.uu
- uudecode -o ${.TARGET} ${.ALLSRC}
+T4FW_VER= 1.24.12.0
+FIRMWS+= t4fw-${T4FW_VER}.bin:t4fw:${T4FW_VER}
.include <bsd.kmod.mk>
Modified: stable/12/sys/modules/cxgbe/t5_firmware/Makefile
==============================================================================
--- stable/12/sys/modules/cxgbe/t5_firmware/Makefile Fri Mar 13 21:45:51 2020 (r358969)
+++ stable/12/sys/modules/cxgbe/t5_firmware/Makefile Fri Mar 13 22:18:40 2020 (r358970)
@@ -17,11 +17,7 @@ FIRMWS+= ${F}:${F:C/.txt//}:1.0.0.0
.endif
.endfor
-T5FW_VER= 1.23.0.0
-FIRMWS+= t5fw.fw:t5fw:${T5FW_VER}
-CLEANFILES+= t5fw.fw
-
-t5fw.fw: t5fw-${T5FW_VER}.bin.uu
- uudecode -o ${.TARGET} ${.ALLSRC}
+T5FW_VER= 1.24.12.0
+FIRMWS+= t5fw-${T5FW_VER}.bin:t5fw:${T5FW_VER}
.include <bsd.kmod.mk>
Modified: stable/12/sys/modules/cxgbe/t6_firmware/Makefile
==============================================================================
--- stable/12/sys/modules/cxgbe/t6_firmware/Makefile Fri Mar 13 21:45:51 2020 (r358969)
+++ stable/12/sys/modules/cxgbe/t6_firmware/Makefile Fri Mar 13 22:18:40 2020 (r358970)
@@ -17,11 +17,7 @@ FIRMWS+= ${F}:${F:C/.txt//}:1.0.0.0
.endif
.endfor
-T6FW_VER= 1.23.0.0
-FIRMWS+= t6fw.fw:t6fw:${T6FW_VER}
-CLEANFILES+= t6fw.fw
-
-t6fw.fw: t6fw-${T6FW_VER}.bin.uu
- uudecode -o ${.TARGET} ${.ALLSRC}
+T6FW_VER= 1.24.12.0
+FIRMWS+= t6fw-${T6FW_VER}.bin:t6fw:${T6FW_VER}
.include <bsd.kmod.mk>
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