svn commit: r209044 - in stable/8/sys: dev/ata/chipsets powerpc/ofw

[Nathan Whitehorn]

Author: nwhitehorn
Date: Fri Jun 11 14:10:20 2010
New Revision: 209044
URL: http://svn.freebsd.org/changeset/base/209044

Log:
  MFC r208162, 208836, 208837:
  
  Program the K2 SATA controller's interrupt to be level-triggered low, and
  respect the edge/level settings in the device tree.
  
  OpenPIC on powerpc sets interrupts to be level high by default. On Apple
  interrupt controllers, all level interrupts are low regardless of
  programming except interrupt 0, used by K2 SATA on some Apple systems, with
  the result that the K2 SATA IRQ is misconfigured. Pending review of changes
  to this default, work around this by changing the programming of the K2
  SATA interrupt to level low.
  
  Approved by:	re (kib)

Modified:
  stable/8/sys/dev/ata/chipsets/ata-serverworks.c
  stable/8/sys/powerpc/ofw/ofw_pcibus.c
Directory Properties:
  stable/8/sys/   (props changed)
  stable/8/sys/amd64/include/xen/   (props changed)
  stable/8/sys/cddl/contrib/opensolaris/   (props changed)
  stable/8/sys/contrib/dev/acpica/   (props changed)
  stable/8/sys/contrib/pf/   (props changed)
  stable/8/sys/dev/xen/xenpci/   (props changed)
  stable/8/sys/geom/sched/   (props changed)

Modified: stable/8/sys/dev/ata/chipsets/ata-serverworks.c
==============================================================================
--- stable/8/sys/dev/ata/chipsets/ata-serverworks.c	Fri Jun 11 14:09:49 2010	(r209043)
+++ stable/8/sys/dev/ata/chipsets/ata-serverworks.c	Fri Jun 11 14:10:20 2010	(r209044)
@@ -221,9 +221,9 @@ ata_serverworks_ch_attach(device_t dev)
 #ifdef __powerpc__
     ch->hw.status = ata_serverworks_status;
 
-    /* Make sure that our interrupt is edge triggered */
+    /* Make sure that our interrupt is level low */
     powerpc_config_intr(bus_get_resource_start(device_get_parent(dev),
-	SYS_RES_IRQ, 0), INTR_TRIGGER_EDGE, INTR_POLARITY_HIGH);
+	SYS_RES_IRQ, 0), INTR_TRIGGER_LEVEL, INTR_POLARITY_LOW);
 #endif
 
     if (ctlr->chip->chipid == ATA_K2) {

Modified: stable/8/sys/powerpc/ofw/ofw_pcibus.c
==============================================================================
--- stable/8/sys/powerpc/ofw/ofw_pcibus.c	Fri Jun 11 14:09:49 2010	(r209043)
+++ stable/8/sys/powerpc/ofw/ofw_pcibus.c	Fri Jun 11 14:10:20 2010	(r209044)
@@ -43,6 +43,7 @@ __FBSDID("$FreeBSD$");
 #include <dev/ofw/openfirm.h>
 
 #include <machine/bus.h>
+#include <machine/intr_machdep.h>
 #include <machine/resource.h>
 
 #include <dev/pci/pcireg.h>
@@ -192,20 +193,36 @@ ofw_pcibus_enum_devtree(device_t dev, u_
 		pci_add_child(dev, (struct pci_devinfo *)dinfo);
 
 		/*
-                 * Some devices don't have an intpin set, but do have
-                 * interrupts. These are fully specified, and set in the
+		 * Some devices don't have an intpin set, but do have
+		 * interrupts. These are fully specified, and set in the
 		 * interrupts property, so add that value to the device's
 		 * resource list.
-                 */
-                if (dinfo->opd_dinfo.cfg.intpin == 0) {
-                        ofw_pci_intr_t intr;
+		 */
+		if (dinfo->opd_dinfo.cfg.intpin == 0) {
+			ofw_pci_intr_t intr[2];
+			phandle_t iparent;
+			int icells;
 
 			if (OF_getprop(child, "interrupts", &intr, 
 			    sizeof(intr)) > 0) {
-                                resource_list_add(&dinfo->opd_dinfo.resources,
-                                    SYS_RES_IRQ, 0, intr, intr, 1);
+				iparent = 0;
+				icells = 1;
+				OF_getprop(child, "interrupt-parent", &iparent,
+				    sizeof(iparent));
+				OF_getprop(iparent, "#interrupt-cells", &icells,
+				    sizeof(icells));
+
+				if (iparent != 0 && icells > 1) {
+					powerpc_config_intr(intr[0],
+					    (intr[1] & 1) ? INTR_TRIGGER_LEVEL :
+					    INTR_TRIGGER_EDGE,
+					    INTR_POLARITY_HIGH);
+				}
+		
+				resource_list_add(&dinfo->opd_dinfo.resources,
+				    SYS_RES_IRQ, 0, intr[0], intr[0], 1);
 			}
-                }
+		}
 	}
 }