svn commit: r206004 - in stable/7/sys: boot/sparc64/loader
sparc64/include sparc64/sparc64
Marius Strobl
marius at FreeBSD.org
Wed Mar 31 21:32:53 UTC 2010
Author: marius
Date: Wed Mar 31 21:32:52 2010
New Revision: 206004
URL: http://svn.freebsd.org/changeset/base/206004
Log:
MFC: r204152, r204164
Some machines can not only consist of CPUs running at different speeds
but also of different types, f.e. Sun Fire V890 can be equipped with a
mix of UltraSPARC IV and IV+ CPUs, requiring different MMU initialization
and different workarounds for model specific errata. Therefore move the
CPU implementation number from a global variable to the per-CPU data.
Functions which are called before the latter is available are passed the
implementation number as a parameter now.
Modified:
stable/7/sys/boot/sparc64/loader/main.c
stable/7/sys/sparc64/include/cache.h
stable/7/sys/sparc64/include/cpu.h
stable/7/sys/sparc64/include/md_var.h
stable/7/sys/sparc64/include/pcpu.h
stable/7/sys/sparc64/include/pmap.h
stable/7/sys/sparc64/include/smp.h
stable/7/sys/sparc64/include/tick.h
stable/7/sys/sparc64/include/ver.h
stable/7/sys/sparc64/sparc64/cache.c
stable/7/sys/sparc64/sparc64/cheetah.c
stable/7/sys/sparc64/sparc64/identcpu.c
stable/7/sys/sparc64/sparc64/iommu.c
stable/7/sys/sparc64/sparc64/machdep.c
stable/7/sys/sparc64/sparc64/mp_locore.S
stable/7/sys/sparc64/sparc64/mp_machdep.c
stable/7/sys/sparc64/sparc64/nexus.c
stable/7/sys/sparc64/sparc64/pmap.c
stable/7/sys/sparc64/sparc64/spitfire.c
stable/7/sys/sparc64/sparc64/tick.c
stable/7/sys/sparc64/sparc64/trap.c
Directory Properties:
stable/7/sys/ (props changed)
stable/7/sys/cddl/contrib/opensolaris/ (props changed)
stable/7/sys/contrib/dev/acpica/ (props changed)
stable/7/sys/contrib/pf/ (props changed)
Modified: stable/7/sys/boot/sparc64/loader/main.c
==============================================================================
--- stable/7/sys/boot/sparc64/loader/main.c Wed Mar 31 21:12:27 2010 (r206003)
+++ stable/7/sys/boot/sparc64/loader/main.c Wed Mar 31 21:32:52 2010 (r206004)
@@ -137,7 +137,7 @@ struct tlb_entry *dtlb_store;
struct tlb_entry *itlb_store;
u_int dtlb_slot;
u_int itlb_slot;
-int cpu_impl;
+static int cpu_impl;
static u_int dtlb_slot_max;
static u_int itlb_slot_max;
Modified: stable/7/sys/sparc64/include/cache.h
==============================================================================
--- stable/7/sys/sparc64/include/cache.h Wed Mar 31 21:12:27 2010 (r206003)
+++ stable/7/sys/sparc64/include/cache.h Wed Mar 31 21:32:52 2010 (r206004)
@@ -91,7 +91,7 @@ struct cacheinfo {
struct pcpu;
-typedef void cache_enable_t(void);
+typedef void cache_enable_t(u_int cpu_impl);
typedef void cache_flush_t(void);
typedef void dcache_page_inval_t(vm_paddr_t pa);
typedef void icache_page_inval_t(vm_paddr_t pa);
Modified: stable/7/sys/sparc64/include/cpu.h
==============================================================================
--- stable/7/sys/sparc64/include/cpu.h Wed Mar 31 21:12:27 2010 (r206003)
+++ stable/7/sys/sparc64/include/cpu.h Wed Mar 31 21:32:52 2010 (r206004)
@@ -52,7 +52,7 @@
extern char btext[];
extern char etext[];
-void cheetah_init(void);
+void cheetah_init(u_int cpu_impl);
void cpu_halt(void);
void cpu_reset(void);
void fork_trampoline(void);
Modified: stable/7/sys/sparc64/include/md_var.h
==============================================================================
--- stable/7/sys/sparc64/include/md_var.h Wed Mar 31 21:12:27 2010 (r206003)
+++ stable/7/sys/sparc64/include/md_var.h Wed Mar 31 21:32:52 2010 (r206004)
@@ -47,8 +47,8 @@ extern vm_paddr_t kstack0_phys;
struct pcpu;
struct md_utrap;
-char *cpu_cpuid_prop(void);
-uint32_t cpu_get_mid(void);
+char *cpu_cpuid_prop(u_int cpu_impl);
+uint32_t cpu_get_mid(u_int cpu_impl);
void cpu_identify(u_long vers, u_int clock, u_int id);
void cpu_setregs(struct pcpu *pc);
int is_physical_memory(vm_paddr_t addr);
Modified: stable/7/sys/sparc64/include/pcpu.h
==============================================================================
--- stable/7/sys/sparc64/include/pcpu.h Wed Mar 31 21:12:27 2010 (r206003)
+++ stable/7/sys/sparc64/include/pcpu.h Wed Mar 31 21:32:52 2010 (r206004)
@@ -54,6 +54,7 @@ struct pmap;
u_long pc_tickref; \
u_long pc_tickadj; \
u_int pc_clock; \
+ u_int pc_impl; \
u_int pc_mid; \
u_int pc_node; \
u_int pc_tlb_ctx; \
Modified: stable/7/sys/sparc64/include/pmap.h
==============================================================================
--- stable/7/sys/sparc64/include/pmap.h Wed Mar 31 21:12:27 2010 (r206003)
+++ stable/7/sys/sparc64/include/pmap.h Wed Mar 31 21:32:52 2010 (r206004)
@@ -80,7 +80,7 @@ struct pmap {
#define pmap_page_get_memattr(m) VM_MEMATTR_DEFAULT
#define pmap_page_set_memattr(m, ma) (void)0
-void pmap_bootstrap(void);
+void pmap_bootstrap(u_int cpu_impl);
vm_paddr_t pmap_kextract(vm_offset_t va);
void pmap_kenter(vm_offset_t va, vm_page_t m);
void pmap_kremove(vm_offset_t);
Modified: stable/7/sys/sparc64/include/smp.h
==============================================================================
--- stable/7/sys/sparc64/include/smp.h Wed Mar 31 21:12:27 2010 (r206003)
+++ stable/7/sys/sparc64/include/smp.h Wed Mar 31 21:32:52 2010 (r206004)
@@ -93,7 +93,7 @@ void cpu_mp_shutdown(void);
typedef void cpu_ipi_selected_t(u_int, u_long, u_long, u_long);
extern cpu_ipi_selected_t *cpu_ipi_selected;
-void mp_init(void);
+void mp_init(u_int cpu_impl);
extern struct mtx ipi_mtx;
extern struct ipi_cache_args ipi_cache_args;
Modified: stable/7/sys/sparc64/include/tick.h
==============================================================================
--- stable/7/sys/sparc64/include/tick.h Wed Mar 31 21:12:27 2010 (r206003)
+++ stable/7/sys/sparc64/include/tick.h Wed Mar 31 21:32:52 2010 (r206004)
@@ -31,8 +31,8 @@
extern u_int hardclock_use_stick;
-void tick_clear(void);
+void tick_clear(u_int cpu_impl);
void tick_start(void);
-void tick_stop(void);
+void tick_stop(u_int cpu_impl);
#endif
Modified: stable/7/sys/sparc64/include/ver.h
==============================================================================
--- stable/7/sys/sparc64/include/ver.h Wed Mar 31 21:12:27 2010 (r206003)
+++ stable/7/sys/sparc64/include/ver.h Wed Mar 31 21:32:52 2010 (r206004)
@@ -43,24 +43,28 @@
#ifndef LOCORE
-#define VER_MANUF_MASK (((1L<<VER_MANUF_SIZE)-1)<<VER_MANUF_SHIFT)
-#define VER_IMPL_MASK (((1L<<VER_IMPL_SIZE)-1)<<VER_IMPL_SHIFT)
-#define VER_MASK_MASK (((1L<<VER_MASK_SIZE)-1)<<VER_MASK_SHIFT)
-#define VER_MAXTL_MASK (((1L<<VER_MAXTL_SIZE)-1)<<VER_MAXTL_SHIFT)
-#define VER_MAXWIN_MASK (((1L<<VER_MAXWIN_SIZE)-1)<<VER_MAXWIN_SHIFT)
+#define VER_MANUF_MASK \
+ (((1UL << VER_MANUF_SIZE) - 1) << VER_MANUF_SHIFT)
+#define VER_IMPL_MASK \
+ (((1UL << VER_IMPL_SIZE) - 1) << VER_IMPL_SHIFT)
+#define VER_MASK_MASK \
+ (((1UL << VER_MASK_SIZE) - 1) << VER_MASK_SHIFT)
+#define VER_MAXTL_MASK \
+ (((1UL << VER_MAXTL_SIZE) - 1) << VER_MAXTL_SHIFT)
+#define VER_MAXWIN_MASK \
+ (((1UL << VER_MAXWIN_SIZE) - 1) << VER_MAXWIN_SHIFT)
-#define VER_MANUF(ver) \
+#define VER_MANUF(ver) \
(((ver) & VER_MANUF_MASK) >> VER_MANUF_SHIFT)
-#define VER_IMPL(ver) \
+#define VER_IMPL(ver) \
(((ver) & VER_IMPL_MASK) >> VER_IMPL_SHIFT)
-#define VER_MASK(ver) \
+#define VER_MASK(ver) \
(((ver) & VER_MASK_MASK) >> VER_MASK_SHIFT)
-#define VER_MAXTL(ver) \
+#define VER_MAXTL(ver) \
(((ver) & VER_MAXTL_MASK) >> VER_MAXTL_SHIFT)
-#define VER_MAXWIN(ver) \
+#define VER_MAXWIN(ver) \
(((ver) & VER_MAXWIN_MASK) >> VER_MAXWIN_SHIFT)
-extern int cpu_impl;
extern char sparc64_model[];
#endif /* !LOCORE */
Modified: stable/7/sys/sparc64/sparc64/cache.c
==============================================================================
--- stable/7/sys/sparc64/sparc64/cache.c Wed Mar 31 21:12:27 2010 (r206003)
+++ stable/7/sys/sparc64/sparc64/cache.c Wed Mar 31 21:32:52 2010 (r206004)
@@ -130,7 +130,7 @@ cache_init(struct pcpu *pcpu)
if ((set & ~(1UL << (ffs(set) - 1))) != 0)
panic("cache_init: E$ set size not a power of 2");
- if (cpu_impl >= CPU_IMPL_ULTRASPARCIII) {
+ if (pcpu->pc_impl >= CPU_IMPL_ULTRASPARCIII) {
cache_enable = cheetah_cache_enable;
cache_flush = cheetah_cache_flush;
dcache_page_inval = cheetah_dcache_page_inval;
Modified: stable/7/sys/sparc64/sparc64/cheetah.c
==============================================================================
--- stable/7/sys/sparc64/sparc64/cheetah.c Wed Mar 31 21:12:27 2010 (r206003)
+++ stable/7/sys/sparc64/sparc64/cheetah.c Wed Mar 31 21:32:52 2010 (r206004)
@@ -58,7 +58,7 @@ __FBSDID("$FreeBSD$");
* CPU-specific initialization
*/
void
-cheetah_init(void)
+cheetah_init(u_int cpu_impl)
{
register_t s;
@@ -119,7 +119,7 @@ cheetah_init(void)
* Enable level 1 caches.
*/
void
-cheetah_cache_enable(void)
+cheetah_cache_enable(u_int cpu_impl)
{
u_long lsu;
Modified: stable/7/sys/sparc64/sparc64/identcpu.c
==============================================================================
--- stable/7/sys/sparc64/sparc64/identcpu.c Wed Mar 31 21:12:27 2010 (r206003)
+++ stable/7/sys/sparc64/sparc64/identcpu.c Wed Mar 31 21:32:52 2010 (r206004)
@@ -15,7 +15,6 @@ __FBSDID("$FreeBSD$");
#include <sys/kernel.h>
#include <sys/sysctl.h>
-#include <machine/cpufunc.h>
#include <machine/md_var.h>
#include <machine/ver.h>
@@ -27,8 +26,6 @@ static char cpu_model[128];
SYSCTL_STRING(_hw, HW_MODEL, model, CTLFLAG_RD,
cpu_model, 0, "Machine model");
-int cpu_impl;
-
void
cpu_identify(u_long vers, u_int freq, u_int id)
{
Modified: stable/7/sys/sparc64/sparc64/iommu.c
==============================================================================
--- stable/7/sys/sparc64/sparc64/iommu.c Wed Mar 31 21:12:27 2010 (r206003)
+++ stable/7/sys/sparc64/sparc64/iommu.c Wed Mar 31 21:32:52 2010 (r206004)
@@ -130,6 +130,7 @@ __FBSDID("$FreeBSD$");
#include <sys/malloc.h>
#include <sys/mbuf.h>
#include <sys/mutex.h>
+#include <sys/pcpu.h>
#include <sys/proc.h>
#include <sys/systm.h>
#include <sys/uio.h>
@@ -377,7 +378,7 @@ iommu_init(const char *name, struct iomm
printf("%s: PROM IOTSB size: %d (%d entries)\n", name,
obptsbsize, obptsbentries);
if ((is->is_flags & IOMMU_PRESERVE_PROM) != 0 &&
- !(cpu_impl == CPU_IMPL_ULTRASPARCIIi && obptsbsize == 7)) {
+ !(PCPU_GET(impl) == CPU_IMPL_ULTRASPARCIIi && obptsbsize == 7)) {
if (obptsbentries > tsbentries)
panic("%s: PROM IOTSB entries exceed kernel",
__func__);
Modified: stable/7/sys/sparc64/sparc64/machdep.c
==============================================================================
--- stable/7/sys/sparc64/sparc64/machdep.c Wed Mar 31 21:12:27 2010 (r206003)
+++ stable/7/sys/sparc64/sparc64/machdep.c Wed Mar 31 21:32:52 2010 (r206004)
@@ -145,7 +145,7 @@ static int cpu_use_vis = 1;
cpu_block_copy_t *cpu_block_copy;
cpu_block_zero_t *cpu_block_zero;
-static phandle_t find_bsp(phandle_t node, uint32_t bspid);
+static phandle_t find_bsp(phandle_t node, uint32_t bspid, u_int cpu_impl);
void sparc64_init(caddr_t mdp, u_long o1, u_long o2, u_long o3,
ofw_vec_t *vec);
static void sparc64_shutdown_final(void *dummy, int howto);
@@ -240,7 +240,7 @@ spinlock_exit(void)
}
static phandle_t
-find_bsp(phandle_t node, uint32_t bspid)
+find_bsp(phandle_t node, uint32_t bspid, u_int cpu_impl)
{
char type[sizeof("cpu")];
phandle_t child;
@@ -249,7 +249,7 @@ find_bsp(phandle_t node, uint32_t bspid)
for (; node != 0; node = OF_peer(node)) {
child = OF_child(node);
if (child > 0) {
- child = find_bsp(child, bspid);
+ child = find_bsp(child, bspid, cpu_impl);
if (child > 0)
return (child);
} else {
@@ -258,7 +258,7 @@ find_bsp(phandle_t node, uint32_t bspid)
continue;
if (strcmp(type, "cpu") != 0)
continue;
- if (OF_getprop(node, cpu_cpuid_prop(), &cpuid,
+ if (OF_getprop(node, cpu_cpuid_prop(cpu_impl), &cpuid,
sizeof(cpuid)) <= 0)
continue;
if (cpuid == bspid)
@@ -269,7 +269,7 @@ find_bsp(phandle_t node, uint32_t bspid)
}
char *
-cpu_cpuid_prop(void)
+cpu_cpuid_prop(u_int cpu_impl)
{
switch (cpu_impl) {
@@ -293,7 +293,7 @@ cpu_cpuid_prop(void)
}
uint32_t
-cpu_get_mid(void)
+cpu_get_mid(u_int cpu_impl)
{
switch (cpu_impl) {
@@ -327,6 +327,7 @@ sparc64_init(caddr_t mdp, u_long o1, u_l
vm_offset_t va;
caddr_t kmdp;
phandle_t root;
+ u_int cpu_impl;
end = 0;
kmdp = NULL;
@@ -341,12 +342,12 @@ sparc64_init(caddr_t mdp, u_long o1, u_l
* Do CPU-specific Initialization.
*/
if (cpu_impl >= CPU_IMPL_ULTRASPARCIII)
- cheetah_init();
+ cheetah_init(cpu_impl);
/*
* Clear (S)TICK timer (including NPT).
*/
- tick_clear();
+ tick_clear(cpu_impl);
/*
* UltraSparc II[e,i] based systems come up with the tick interrupt
@@ -356,7 +357,7 @@ sparc64_init(caddr_t mdp, u_long o1, u_l
* enabled, causing an interrupt storm on startup since they are not
* handled.
*/
- tick_stop();
+ tick_stop(cpu_impl);
/*
* Initialize Open Firmware (needed for console).
@@ -391,7 +392,8 @@ sparc64_init(caddr_t mdp, u_long o1, u_l
pc = (struct pcpu *)(pcpu0 + (PCPU_PAGES * PAGE_SIZE)) - 1;
pcpu_init(pc, 0, sizeof(struct pcpu));
pc->pc_addr = (vm_offset_t)pcpu0;
- pc->pc_mid = cpu_get_mid();
+ pc->pc_impl = cpu_impl;
+ pc->pc_mid = cpu_get_mid(cpu_impl);
pc->pc_tlb_ctx = TLB_CTX_USER_MIN;
pc->pc_tlb_ctx_min = TLB_CTX_USER_MIN;
pc->pc_tlb_ctx_max = TLB_CTX_USER_MAX;
@@ -401,7 +403,7 @@ sparc64_init(caddr_t mdp, u_long o1, u_l
* BSP is in the device tree in the first place).
*/
root = OF_peer(0);
- pc->pc_node = find_bsp(root, pc->pc_mid);
+ pc->pc_node = find_bsp(root, pc->pc_mid, cpu_impl);
if (pc->pc_node == 0)
OF_exit();
if (OF_getprop(pc->pc_node, "clock-frequency", &pc->pc_clock,
@@ -467,7 +469,7 @@ sparc64_init(caddr_t mdp, u_long o1, u_l
panic("sparc64_init: cannot determine number of iTLB slots");
cache_init(pc);
- cache_enable();
+ cache_enable(cpu_impl);
uma_set_align(pc->pc_cache.dc_linesize - 1);
cpu_block_copy = bcopy;
@@ -493,13 +495,13 @@ sparc64_init(caddr_t mdp, u_long o1, u_l
}
#ifdef SMP
- mp_init();
+ mp_init(cpu_impl);
#endif
/*
* Initialize virtual memory and calculate physmem.
*/
- pmap_bootstrap();
+ pmap_bootstrap(cpu_impl);
/*
* Initialize tunables.
Modified: stable/7/sys/sparc64/sparc64/mp_locore.S
==============================================================================
--- stable/7/sys/sparc64/sparc64/mp_locore.S Wed Mar 31 21:12:27 2010 (r206003)
+++ stable/7/sys/sparc64/sparc64/mp_locore.S Wed Mar 31 21:32:52 2010 (r206004)
@@ -202,17 +202,17 @@ ENTRY(mp_startup)
cmp %l1, CPU_IMPL_ULTRASPARCIII
bl %icc, 3f
nop
- mov CPU_STICKSYNC, %l1
+ mov CPU_STICKSYNC, %l2
membar #StoreLoad
- stw %l1, [%l0 + CSA_STATE]
+ stw %l2, [%l0 + CSA_STATE]
-2: ldx [%l0 + CSA_STICK], %l1
- brz %l1, 2b
+2: ldx [%l0 + CSA_STICK], %l2
+ brz %l2, 2b
nop
- wr %l1, 0, %asr24
+ wr %l2, 0, %asr24
3: call cpu_get_mid
- nop
+ mov %l1, %o0
/*
* Inform the boot processor we have inited.
Modified: stable/7/sys/sparc64/sparc64/mp_machdep.c
==============================================================================
--- stable/7/sys/sparc64/sparc64/mp_machdep.c Wed Mar 31 21:12:27 2010 (r206003)
+++ stable/7/sys/sparc64/sparc64/mp_machdep.c Wed Mar 31 21:32:52 2010 (r206004)
@@ -119,11 +119,11 @@ static u_int cpuid_to_mid[MAXCPU];
static int isjbus;
static volatile u_int shutdown_cpus;
-static void ap_count(phandle_t node, u_int mid);
-static void ap_start(phandle_t node, u_int mid);
+static void ap_count(phandle_t node, u_int mid, u_int cpu_impl);
+static void ap_start(phandle_t node, u_int mid, u_int cpu_impl);
static void cpu_mp_unleash(void *v);
static void foreach_ap(phandle_t node, void (*func)(phandle_t node,
- u_int mid));
+ u_int mid, u_int cpu_impl));
static void spitfire_ipi_send(u_int mid, u_long d0, u_long d1, u_long d2);
static void sun4u_startcpu(phandle_t cpu, void *func, u_long arg);
@@ -137,7 +137,7 @@ CTASSERT(MAXCPU <= sizeof(u_int) * NBBY)
CTASSERT(MAXCPU <= sizeof(int) * NBBY);
void
-mp_init(void)
+mp_init(u_int cpu_impl)
{
struct tte *tp;
int i;
@@ -171,11 +171,13 @@ mp_init(void)
}
static void
-foreach_ap(phandle_t node, void (*func)(phandle_t node, u_int mid))
+foreach_ap(phandle_t node, void (*func)(phandle_t node, u_int mid,
+ u_int cpu_impl))
{
char type[sizeof("cpu")];
phandle_t child;
u_int cpuid;
+ uint32_t cpu_impl;
/* There's no need to traverse the whole OFW tree twice. */
if (mp_maxid > 0 && mp_ncpus >= mp_maxid + 1)
@@ -191,12 +193,17 @@ foreach_ap(phandle_t node, void (*func)(
continue;
if (strcmp(type, "cpu") != 0)
continue;
- if (OF_getprop(node, cpu_cpuid_prop(), &cpuid,
- sizeof(cpuid)) <= 0)
- panic("%s: can't get module ID", __func__);
+ if (OF_getprop(node, "implementation#", &cpu_impl,
+ sizeof(cpu_impl)) <= 0)
+ panic("%s: couldn't determine CPU "
+ "implementation", __func__);
+ if (OF_getprop(node, cpu_cpuid_prop(cpu_impl), &cpuid,
+ sizeof(cpuid)) <= 0)
+ panic("%s: couldn't determine CPU module ID",
+ __func__);
if (cpuid == PCPU_GET(mid))
continue;
- (*func)(node, cpuid);
+ (*func)(node, cpuid, cpu_impl);
}
}
}
@@ -216,7 +223,7 @@ cpu_mp_setmaxid()
}
static void
-ap_count(phandle_t node __unused, u_int mid __unused)
+ap_count(phandle_t node __unused, u_int mid __unused, u_int cpu_impl __unused)
{
mp_maxid++;
@@ -276,20 +283,20 @@ cpu_mp_start(void)
}
static void
-ap_start(phandle_t node, u_int mid)
+ap_start(phandle_t node, u_int mid, u_int cpu_impl)
{
volatile struct cpu_start_args *csa;
struct pcpu *pc;
register_t s;
vm_offset_t va;
- u_int clock;
u_int cpuid;
+ uint32_t clock;
if (mp_ncpus > MAXCPU)
return;
if (OF_getprop(node, "clock-frequency", &clock, sizeof(clock)) <= 0)
- panic("%s: can't get clock", __func__);
+ panic("%s: couldn't determine CPU frequency", __func__);
if (clock != PCPU_GET(clock))
hardclock_use_stick = 1;
@@ -321,6 +328,7 @@ ap_start(phandle_t node, u_int mid)
pcpu_init(pc, cpuid, sizeof(*pc));
pc->pc_addr = va;
pc->pc_clock = clock;
+ pc->pc_impl = cpu_impl;
pc->pc_mid = mid;
pc->pc_node = node;
@@ -393,9 +401,9 @@ cpu_mp_bootstrap(struct pcpu *pc)
volatile struct cpu_start_args *csa;
csa = &cpu_start_args;
- if (cpu_impl >= CPU_IMPL_ULTRASPARCIII)
- cheetah_init();
- cache_enable();
+ if (pc->pc_impl >= CPU_IMPL_ULTRASPARCIII)
+ cheetah_init(pc->pc_impl);
+ cache_enable(pc->pc_impl);
pmap_map_tsb();
/*
* Flush all non-locked TLB entries possibly left over by the
Modified: stable/7/sys/sparc64/sparc64/nexus.c
==============================================================================
--- stable/7/sys/sparc64/sparc64/nexus.c Wed Mar 31 21:12:27 2010 (r206003)
+++ stable/7/sys/sparc64/sparc64/nexus.c Wed Mar 31 21:32:52 2010 (r206004)
@@ -41,6 +41,7 @@ __FBSDID("$FreeBSD$");
#include <sys/kernel.h>
#include <sys/malloc.h>
#include <sys/module.h>
+#include <sys/pcpu.h>
#include <dev/ofw/ofw_bus.h>
#include <dev/ofw/ofw_bus_subr.h>
@@ -521,7 +522,7 @@ nexus_setup_dinfo(device_t dev, phandle_
nintr = OF_getprop_alloc(node, "interrupts", sizeof(*intr),
(void **)&intr);
if (nintr > 0) {
- if (OF_getprop(node, cpu_impl < CPU_IMPL_ULTRASPARCIII ?
+ if (OF_getprop(node, PCPU_GET(impl) < CPU_IMPL_ULTRASPARCIII ?
"upa-portid" : "portid", &ign, sizeof(ign)) <= 0) {
device_printf(dev, "<%s>: could not determine portid\n",
ndi->ndi_obdinfo.obd_name);
Modified: stable/7/sys/sparc64/sparc64/pmap.c
==============================================================================
--- stable/7/sys/sparc64/sparc64/pmap.c Wed Mar 31 21:12:27 2010 (r206003)
+++ stable/7/sys/sparc64/sparc64/pmap.c Wed Mar 31 21:32:52 2010 (r206004)
@@ -278,7 +278,7 @@ om_cmp(const void *a, const void *b)
* Bootstrap the system enough to run with virtual memory.
*/
void
-pmap_bootstrap(void)
+pmap_bootstrap(u_int cpu_impl)
{
struct pmap *pm;
struct tte *tp;
@@ -1538,7 +1538,7 @@ pmap_copy_tte(pmap_t src_pmap, pmap_t ds
void
pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr,
- vm_size_t len, vm_offset_t src_addr)
+ vm_size_t len, vm_offset_t src_addr)
{
struct tte *tp;
vm_offset_t va;
Modified: stable/7/sys/sparc64/sparc64/spitfire.c
==============================================================================
--- stable/7/sys/sparc64/sparc64/spitfire.c Wed Mar 31 21:12:27 2010 (r206003)
+++ stable/7/sys/sparc64/sparc64/spitfire.c Wed Mar 31 21:32:52 2010 (r206004)
@@ -56,7 +56,7 @@ PMAP_STATS_VAR(spitfire_icache_npage_inv
* Enable the level 1 caches.
*/
void
-spitfire_cache_enable(void)
+spitfire_cache_enable(u_int cpu_impl __unused)
{
u_long lsu;
Modified: stable/7/sys/sparc64/sparc64/tick.c
==============================================================================
--- stable/7/sys/sparc64/sparc64/tick.c Wed Mar 31 21:12:27 2010 (r206003)
+++ stable/7/sys/sparc64/sparc64/tick.c Wed Mar 31 21:32:52 2010 (r206004)
@@ -120,7 +120,7 @@ cpu_initclocks(void)
*/
} else {
clock = PCPU_GET(clock);
- intr_setup(PIL_TICK, cpu_impl < CPU_IMPL_ULTRASPARCIII ?
+ intr_setup(PIL_TICK, PCPU_GET(impl) < CPU_IMPL_ULTRASPARCIII ?
tick_hardclock_bbwar : tick_hardclock, -1, NULL, NULL);
set_cputicker(tick_cputicks, clock, 0);
}
@@ -322,7 +322,7 @@ tick_start(void)
}
void
-tick_clear(void)
+tick_clear(u_int cpu_impl)
{
if (cpu_impl >= CPU_IMPL_ULTRASPARCIII)
@@ -331,7 +331,7 @@ tick_clear(void)
}
void
-tick_stop(void)
+tick_stop(u_int cpu_impl)
{
if (cpu_impl >= CPU_IMPL_ULTRASPARCIII)
Modified: stable/7/sys/sparc64/sparc64/trap.c
==============================================================================
--- stable/7/sys/sparc64/sparc64/trap.c Wed Mar 31 21:12:27 2010 (r206003)
+++ stable/7/sys/sparc64/sparc64/trap.c Wed Mar 31 21:32:52 2010 (r206004)
@@ -55,6 +55,7 @@ __FBSDID("$FreeBSD$");
#include <sys/lock.h>
#include <sys/mutex.h>
#include <sys/systm.h>
+#include <sys/pcpu.h>
#include <sys/pioctl.h>
#include <sys/ptrace.h>
#include <sys/proc.h>
@@ -380,7 +381,7 @@ trap(struct trapframe *tf)
if (tf->tf_tpc > (u_long)fas_nofault_begin &&
tf->tf_tpc < (u_long)fas_nofault_end) {
cache_flush();
- cache_enable();
+ cache_enable(PCPU_GET(impl));
tf->tf_tpc = (u_long)fas_fault;
tf->tf_tnpc = tf->tf_tpc + 4;
error = 0;
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