svn commit: r190080 - in stable/7/sys: . contrib/pf dev/cxgb
sparc64/include sparc64/sparc64
Marius Strobl
marius at FreeBSD.org
Thu Mar 19 09:37:34 PDT 2009
Author: marius
Date: Thu Mar 19 16:37:30 2009
New Revision: 190080
URL: http://svn.freebsd.org/changeset/base/190080
Log:
MFC: r186682
- Currently the PMAP code is laid out to let the kernel TSB cover the
whole KVA space using one locked 4MB dTLB entry per GB of physical
memory. On Cheetah-class machines only the dt16 can hold locked
entries though, which would be completely consumed for the kernel
TSB on machines with >= 16GB. Therefore limit the KVA space to use
no more than half of the lockable dTLB slots, given that we need
them also for other things.
- Add sanity checks which ensure that we don't exhaust the (lockable)
TLB slots.
Modified:
stable/7/sys/ (props changed)
stable/7/sys/contrib/pf/ (props changed)
stable/7/sys/dev/cxgb/ (props changed)
stable/7/sys/sparc64/include/tlb.h
stable/7/sys/sparc64/sparc64/machdep.c
stable/7/sys/sparc64/sparc64/pmap.c
Modified: stable/7/sys/sparc64/include/tlb.h
==============================================================================
--- stable/7/sys/sparc64/include/tlb.h Thu Mar 19 16:14:00 2009 (r190079)
+++ stable/7/sys/sparc64/include/tlb.h Thu Mar 19 16:37:30 2009 (r190080)
@@ -129,6 +129,8 @@ typedef void tlb_flush_user_t(void);
struct pmap;
struct tlb_entry;
+extern int dtlb_slots;
+extern int itlb_slots;
extern int kernel_tlb_slots;
extern struct tlb_entry *kernel_tlbs;
Modified: stable/7/sys/sparc64/sparc64/machdep.c
==============================================================================
--- stable/7/sys/sparc64/sparc64/machdep.c Thu Mar 19 16:14:00 2009 (r190079)
+++ stable/7/sys/sparc64/sparc64/machdep.c Thu Mar 19 16:37:30 2009 (r190080)
@@ -115,6 +115,8 @@ typedef int ofw_vec_t(void *);
extern vm_offset_t ksym_start, ksym_end;
#endif
+int dtlb_slots;
+int itlb_slots;
struct tlb_entry *kernel_tlbs;
int kernel_tlb_slots;
@@ -373,6 +375,19 @@ sparc64_init(caddr_t mdp, u_long o1, u_l
end = (vm_offset_t)_end;
}
+ /*
+ * Determine the TLB slot maxima, which are expected to be
+ * equal across all CPUs.
+ * NB: for Cheetah-class CPUs, these properties only refer
+ * to the t16s.
+ */
+ if (OF_getprop(pc->pc_node, "#dtlb-entries", &dtlb_slots,
+ sizeof(dtlb_slots)) == -1)
+ panic("sparc64_init: cannot determine number of dTLB slots");
+ if (OF_getprop(pc->pc_node, "#itlb-entries", &itlb_slots,
+ sizeof(itlb_slots)) == -1)
+ panic("sparc64_init: cannot determine number of iTLB slots");
+
cache_init(pc);
cache_enable();
uma_set_align(pc->pc_cache.dc_linesize - 1);
Modified: stable/7/sys/sparc64/sparc64/pmap.c
==============================================================================
--- stable/7/sys/sparc64/sparc64/pmap.c Thu Mar 19 16:14:00 2009 (r190079)
+++ stable/7/sys/sparc64/sparc64/pmap.c Thu Mar 19 16:37:30 2009 (r190080)
@@ -334,13 +334,23 @@ pmap_bootstrap(vm_offset_t ekva)
/*
* Calculate the size of kernel virtual memory, and the size and mask
- * for the kernel TSB.
+ * for the kernel TSB based on the phsyical memory size but limited
+ * by letting the kernel TSB take up no more than half of the dTLB
+ * slots available for locked entries.
*/
virtsz = roundup(physsz, PAGE_SIZE_4M << (PAGE_SHIFT - TTE_SHIFT));
+ virtsz = MIN(virtsz,
+ (dtlb_slots / 2 * PAGE_SIZE_4M) << (PAGE_SHIFT - TTE_SHIFT));
vm_max_kernel_address = VM_MIN_KERNEL_ADDRESS + virtsz;
tsb_kernel_size = virtsz >> (PAGE_SHIFT - TTE_SHIFT);
tsb_kernel_mask = (tsb_kernel_size >> TTE_SHIFT) - 1;
+ if (kernel_tlb_slots + PCPU_PAGES + tsb_kernel_size / PAGE_SIZE_4M +
+ 1 /* PROM page */ + 1 /* spare */ > dtlb_slots)
+ panic("pmap_bootstrap: insufficient dTLB entries");
+ if (kernel_tlb_slots + 1 /* PROM page */ + 1 /* spare */ > itlb_slots)
+ panic("pmap_bootstrap: insufficient iTLB entries");
+
/*
* Allocate the kernel TSB and lock it in the TLB.
*/
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