svn commit: r187572 - in stable/7/sys: . amd64/amd64 amd64/include contrib/pf dev/ath/ath_hal dev/cxgb i386/i386 i386/include

[Jung-uk Kim]

Author: jkim
Date: Wed Jan 21 21:28:21 2009
New Revision: 187572
URL: http://svn.freebsd.org/changeset/base/187572

Log:
  MFC: Set tsc_is_invariant for some known AMD CPUs even if BIOS does not
  advertise it.

Modified:
  stable/7/sys/   (props changed)
  stable/7/sys/amd64/amd64/identcpu.c
  stable/7/sys/amd64/include/specialreg.h
  stable/7/sys/contrib/pf/   (props changed)
  stable/7/sys/dev/ath/ath_hal/   (props changed)
  stable/7/sys/dev/cxgb/   (props changed)
  stable/7/sys/i386/i386/identcpu.c
  stable/7/sys/i386/include/specialreg.h

Modified: stable/7/sys/amd64/amd64/identcpu.c
==============================================================================
--- stable/7/sys/amd64/amd64/identcpu.c	Wed Jan 21 21:24:36 2009	(r187571)
+++ stable/7/sys/amd64/amd64/identcpu.c	Wed Jan 21 21:28:21 2009	(r187572)
@@ -345,10 +345,17 @@ printcpuinfo(void)
 			    "AuthenticAMD") == 0)
 				cpu_feature &= ~CPUID_HTT;
 
+			/*
+			 * If this CPU supports P-state invariant TSC then
+			 * mention the capability.
+			 */
 			if (!tsc_is_invariant &&
-			    (amd_pminfo & AMDPM_TSC_INVARIANT)) {
+			    (strcmp(cpu_vendor, "AuthenticAMD") == 0 &&
+			    ((amd_pminfo & AMDPM_TSC_INVARIANT) != 0 ||
+			    AMD64_CPU_FAMILY(cpu_id) >= 0x10 ||
+			    cpu_id == 0x60fb2))) {
 				tsc_is_invariant = 1;
-				printf("\n  P-state invariant TSC");
+				printf("\n  TSC: P-state invariant");
 			}
 
 			/*

Modified: stable/7/sys/amd64/include/specialreg.h
==============================================================================
--- stable/7/sys/amd64/include/specialreg.h	Wed Jan 21 21:24:36 2009	(r187571)
+++ stable/7/sys/amd64/include/specialreg.h	Wed Jan 21 21:28:21 2009	(r187572)
@@ -148,6 +148,21 @@
 #define	AMDID2_PREFETCH	0x00000100
 
 /*
+ * CPUID instruction 1 eax info
+ */
+#define	CPUID_STEPPING		0x0000000f
+#define	CPUID_MODEL		0x000000f0
+#define	CPUID_FAMILY		0x00000f00
+#define	CPUID_EXT_MODEL		0x000f0000
+#define	CPUID_EXT_FAMILY	0x0ff00000
+#define	AMD64_CPU_MODEL(id) \
+    ((((id) & CPUID_MODEL) >> 4) | \
+    (((id) & CPUID_EXT_MODEL) >> 12))
+#define	AMD64_CPU_FAMILY(id) \
+    ((((id) & CPUID_FAMILY) >> 8) + \
+    (((id) & CPUID_EXT_FAMILY) >> 20))
+
+/*
  * CPUID instruction 1 ebx info
  */
 #define	CPUID_BRAND_INDEX	0x000000ff

Modified: stable/7/sys/i386/i386/identcpu.c
==============================================================================
--- stable/7/sys/i386/i386/identcpu.c	Wed Jan 21 21:24:36 2009	(r187571)
+++ stable/7/sys/i386/i386/identcpu.c	Wed Jan 21 21:28:21 2009	(r187572)
@@ -842,10 +842,17 @@ printcpuinfo(void)
 			    "AuthenticAMD") == 0)
 				cpu_feature &= ~CPUID_HTT;
 
+			/*
+			 * If this CPU supports P-state invariant TSC then
+			 * mention the capability.
+			 */
 			if (!tsc_is_invariant &&
-			    (amd_pminfo & AMDPM_TSC_INVARIANT)) {
+			    (strcmp(cpu_vendor, "AuthenticAMD") == 0 &&
+			    ((amd_pminfo & AMDPM_TSC_INVARIANT) != 0 ||
+			    I386_CPU_FAMILY(cpu_id) >= 0x10 ||
+			    cpu_id == 0x60fb2))) {
 				tsc_is_invariant = 1;
-				printf("\n  P-state invariant TSC");
+				printf("\n  TSC: P-state invariant");
 			}
 
 			/*

Modified: stable/7/sys/i386/include/specialreg.h
==============================================================================
--- stable/7/sys/i386/include/specialreg.h	Wed Jan 21 21:24:36 2009	(r187571)
+++ stable/7/sys/i386/include/specialreg.h	Wed Jan 21 21:28:21 2009	(r187572)
@@ -150,6 +150,23 @@
 #define	AMDID2_PREFETCH	0x00000100
 
 /*
+ * CPUID instruction 1 eax info
+ */
+#define	CPUID_STEPPING		0x0000000f
+#define	CPUID_MODEL		0x000000f0
+#define	CPUID_FAMILY		0x00000f00
+#define	CPUID_EXT_MODEL		0x000f0000
+#define	CPUID_EXT_FAMILY	0x0ff00000
+#define	I386_CPU_MODEL(id) \
+    ((((id) & CPUID_MODEL) >> 4) | \
+    ((((id) & CPUID_FAMILY) >= 0x600) ? \
+    (((id) & CPUID_EXT_MODEL) >> 12) : 0))
+#define	I386_CPU_FAMILY(id) \
+    ((((id) & CPUID_FAMILY) >> 8) + \
+    ((((id) & CPUID_FAMILY) == 0xf00) ? \
+    (((id) & CPUID_EXT_FAMILY) >> 20) : 0))
+
+/*
  * CPUID instruction 1 ebx info
  */
 #define	CPUID_BRAND_INDEX	0x000000ff