svn commit: r337010 - in projects/clang700-import: lib/clang/libclang lib/clang/libllvm usr.bin/clang/clang

Tue Jul 31 21:07:21 UTC 2018

Author: dim
Date: Tue Jul 31 21:07:20 2018
New Revision: 337010
URL: https://svnweb.freebsd.org/changeset/base/337010

Log:
  Make the minimal clang executable build.

Modified:
  projects/clang700-import/lib/clang/libclang/Makefile
  projects/clang700-import/lib/clang/libllvm/Makefile
  projects/clang700-import/usr.bin/clang/clang/Makefile

Modified: projects/clang700-import/lib/clang/libclang/Makefile
==============================================================================

--- projects/clang700-import/lib/clang/libclang/Makefile	Tue Jul 31 21:06:28 2018	(r337009)
+++ projects/clang700-import/lib/clang/libclang/Makefile	Tue Jul 31 21:07:20 2018	(r337010)
@@ -56,6 +56,7 @@ SRCS_MIN+=	AST/CommentCommandTraits.cpp
 SRCS_MIN+=	AST/CommentLexer.cpp
 SRCS_MIN+=	AST/CommentParser.cpp
 SRCS_MIN+=	AST/CommentSema.cpp
+SRCS_MIN+=	AST/ComparisonCategories.cpp
 SRCS_FUL+=	AST/DataCollection.cpp
 SRCS_MIN+=	AST/Decl.cpp
 SRCS_MIN+=	AST/DeclBase.cpp
@@ -121,6 +122,7 @@ SRCS_MIN+=	Analysis/CloneDetection.cpp
 SRCS_MIN+=	Analysis/CocoaConventions.cpp
 SRCS_FUL+=	Analysis/CodeInjector.cpp
 SRCS_MIN+=	Analysis/Consumed.cpp
+SRCS_MIN+=	Analysis/ConstructionContext.cpp
 SRCS_FUL+=	Analysis/Dominators.cpp
 SRCS_MIN+=	Analysis/FormatString.cpp
 SRCS_MIN+=	Analysis/LiveVariables.cpp
@@ -175,6 +177,7 @@ SRCS_MIN+=	Basic/Targets/Nios2.cpp
 SRCS_MIN+=	Basic/Targets/OSTargets.cpp
 SRCS_MIN+=	Basic/Targets/PNaCl.cpp
 SRCS_MIN+=	Basic/Targets/PPC.cpp
+SRCS_MIN+=	Basic/Targets/RISCV.cpp
 SRCS_MIN+=	Basic/Targets/SPIR.cpp
 SRCS_MIN+=	Basic/Targets/Sparc.cpp
 SRCS_MIN+=	Basic/Targets/SystemZ.cpp
@@ -186,6 +189,7 @@ SRCS_MIN+=	Basic/TokenKinds.cpp
 SRCS_MIN+=	Basic/Version.cpp
 SRCS_MIN+=	Basic/VirtualFileSystem.cpp
 SRCS_MIN+=	Basic/Warnings.cpp
+SRCS_MIN+=	Basic/XRayInstr.cpp
 SRCS_MIN+=	Basic/XRayLists.cpp
 SRCS_MIN+=	CodeGen/BackendUtil.cpp
 SRCS_MIN+=	CodeGen/CGAtomic.cpp
@@ -211,6 +215,7 @@ SRCS_MIN+=	CodeGen/CGExprConstant.cpp
 SRCS_MIN+=	CodeGen/CGExprScalar.cpp
 SRCS_MIN+=	CodeGen/CGGPUBuiltin.cpp
 SRCS_MIN+=	CodeGen/CGLoopInfo.cpp
+SRCS_MIN+=	CodeGen/CGNonTrivialStruct.cpp
 SRCS_MIN+=	CodeGen/CGObjC.cpp
 SRCS_MIN+=	CodeGen/CGObjCGNU.cpp
 SRCS_MIN+=	CodeGen/CGObjCMac.cpp
@@ -259,6 +264,7 @@ SRCS_MIN+=	Driver/ToolChains/Arch/AArch64.cpp
 SRCS_MIN+=	Driver/ToolChains/Arch/ARM.cpp
 SRCS_MIN+=	Driver/ToolChains/Arch/Mips.cpp
 SRCS_MIN+=	Driver/ToolChains/Arch/PPC.cpp
+SRCS_MIN+=	Driver/ToolChains/Arch/RISCV.cpp
 SRCS_MIN+=	Driver/ToolChains/Arch/Sparc.cpp
 SRCS_MIN+=	Driver/ToolChains/Arch/SystemZ.cpp
 SRCS_MIN+=	Driver/ToolChains/Arch/X86.cpp
@@ -274,6 +280,7 @@ SRCS_MIN+=	Driver/ToolChains/DragonFly.cpp
 SRCS_MIN+=	Driver/ToolChains/FreeBSD.cpp
 SRCS_MIN+=	Driver/ToolChains/Fuchsia.cpp
 SRCS_MIN+=	Driver/ToolChains/Gnu.cpp
+SRCS_MIN+=	Driver/ToolChains/HIP.cpp
 SRCS_MIN+=	Driver/ToolChains/Haiku.cpp
 SRCS_MIN+=	Driver/ToolChains/Hexagon.cpp
 SRCS_MIN+=	Driver/ToolChains/Linux.cpp
@@ -325,6 +332,7 @@ SRCS_MIN+=	Frontend/DiagnosticRenderer.cpp
 SRCS_MIN+=	Frontend/FrontendAction.cpp
 SRCS_MIN+=	Frontend/FrontendActions.cpp
 SRCS_MIN+=	Frontend/FrontendOptions.cpp
+SRCS_MIN+=	Frontend/FrontendTiming.cpp
 SRCS_MIN+=	Frontend/HeaderIncludeGen.cpp
 SRCS_MIN+=	Frontend/InitHeaderSearch.cpp
 SRCS_MIN+=	Frontend/InitPreprocessor.cpp
@@ -410,6 +418,7 @@ SRCS_MIN+=	Sema/DelayedDiagnostic.cpp
 SRCS_MIN+=	Sema/IdentifierResolver.cpp
 SRCS_MIN+=	Sema/JumpDiagnostics.cpp
 SRCS_MIN+=	Sema/MultiplexExternalSemaSource.cpp
+SRCS_MIN+=	Sema/ParsedAttr.cpp
 SRCS_MIN+=	Sema/Scope.cpp
 SRCS_MIN+=	Sema/ScopeInfo.cpp
 SRCS_MIN+=	Sema/Sema.cpp
@@ -749,10 +758,16 @@ clang/Basic/DiagnosticIndexName.inc: \
 	    -o ${.TARGET} ${CLANG_SRCS}/include/clang/Basic/Diagnostic.td
 TGHDRS+=	clang/Basic/DiagnosticIndexName.inc
 
+clang/Basic/arm_fp16.inc: ${CLANG_SRCS}/include/clang/Basic/arm_fp16.td
+	${CLANG_TBLGEN} -gen-arm-neon-sema \
+	    -I ${CLANG_SRCS}/include/clang/Basic -d ${.TARGET:C/$/.d/} \
+	    -o ${.TARGET} ${CLANG_SRCS}/include/clang/Basic/arm_fp16.td
+TGHDRS+=	clang/Basic/arm_fp16.inc
+
 clang/Basic/arm_neon.inc: ${CLANG_SRCS}/include/clang/Basic/arm_neon.td
 	${CLANG_TBLGEN} -gen-arm-neon-sema \
-	    -d ${.TARGET:C/$/.d/} -o ${.TARGET} \
-	    ${CLANG_SRCS}/include/clang/Basic/arm_neon.td
+	    -I ${CLANG_SRCS}/include/clang/Basic -d ${.TARGET:C/$/.d/} \
+	    -o ${.TARGET} ${CLANG_SRCS}/include/clang/Basic/arm_neon.td
 TGHDRS+=	clang/Basic/arm_neon.inc
 
 clang/Driver/Options.inc: ${CLANG_SRCS}/include/clang/Driver/Options.td
@@ -822,7 +837,8 @@ TGHDRS+=	clang/Serialization/AttrPCHWrite.inc
 clang/StaticAnalyzer/Checkers/Checkers.inc: \
 	${CLANG_SRCS}/include/clang/StaticAnalyzer/Checkers/Checkers.td
 	${CLANG_TBLGEN} -gen-clang-sa-checkers \
-	    -I ${CLANG_SRCS}/include -d ${.TARGET:C/$/.d/} -o ${.TARGET} \
+	    -I ${CLANG_SRCS}/include/clang/StaticAnalyzer/Checkers \
+	    -d ${.TARGET:C/$/.d/} -o ${.TARGET} \
 	    ${CLANG_SRCS}/include/clang/StaticAnalyzer/Checkers/Checkers.td
 TGHDRS+=	clang/StaticAnalyzer/Checkers/Checkers.inc
 

Modified: projects/clang700-import/lib/clang/libllvm/Makefile
==============================================================================
--- projects/clang700-import/lib/clang/libllvm/Makefile	Tue Jul 31 21:06:28 2018	(r337009)
+++ projects/clang700-import/lib/clang/libllvm/Makefile	Tue Jul 31 21:07:20 2018	(r337010)
@@ -83,12 +83,14 @@ SRCS_MIN+=	Analysis/MemorySSA.cpp
 SRCS_MIN+=	Analysis/MemorySSAUpdater.cpp
 SRCS_MIN+=	Analysis/ModuleDebugInfoPrinter.cpp
 SRCS_MIN+=	Analysis/ModuleSummaryAnalysis.cpp
+SRCS_MIN+=	Analysis/MustExecute.cpp
 SRCS_MIN+=	Analysis/ObjCARCAliasAnalysis.cpp
 SRCS_MIN+=	Analysis/ObjCARCAnalysisUtils.cpp
 SRCS_MIN+=	Analysis/ObjCARCInstKind.cpp
 SRCS_MIN+=	Analysis/OptimizationRemarkEmitter.cpp
 SRCS_MIN+=	Analysis/OrderedBasicBlock.cpp
 SRCS_MIN+=	Analysis/PHITransAddr.cpp
+SRCS_MIN+=	Analysis/PhiValues.cpp
 SRCS_MIN+=	Analysis/PostDominators.cpp
 SRCS_MIN+=	Analysis/ProfileSummaryInfo.cpp
 SRCS_MIN+=	Analysis/PtrUseVisitor.cpp
@@ -100,6 +102,7 @@ SRCS_MIN+=	Analysis/ScalarEvolutionAliasAnalysis.cpp
 SRCS_MIN+=	Analysis/ScalarEvolutionExpander.cpp
 SRCS_MIN+=	Analysis/ScalarEvolutionNormalization.cpp
 SRCS_MIN+=	Analysis/ScopedNoAliasAA.cpp
+SRCS_MIN+=	Analysis/SyntheticCountsUtils.cpp
 SRCS_MIN+=	Analysis/TargetLibraryInfo.cpp
 SRCS_MIN+=	Analysis/TargetTransformInfo.cpp
 SRCS_MIN+=	Analysis/Trace.cpp
@@ -114,6 +117,7 @@ SRCS_MIN+=	AsmParser/LLParser.cpp
 SRCS_MIN+=	AsmParser/Parser.cpp
 SRCS_MIN+=	BinaryFormat/Dwarf.cpp
 SRCS_MIN+=	BinaryFormat/Magic.cpp
+SRCS_MIN+=	BinaryFormat/Wasm.cpp
 SRCS_MIN+=	Bitcode/Reader/BitReader.cpp
 SRCS_MIN+=	Bitcode/Reader/BitcodeReader.cpp
 SRCS_MIN+=	Bitcode/Reader/BitstreamReader.cpp
@@ -127,6 +131,7 @@ SRCS_MIN+=	CodeGen/AggressiveAntiDepBreaker.cpp
 SRCS_MIN+=	CodeGen/AllocationOrder.cpp
 SRCS_MIN+=	CodeGen/Analysis.cpp
 SRCS_MIN+=	CodeGen/AsmPrinter/ARMException.cpp
+SRCS_MIN+=	CodeGen/AsmPrinter/AccelTable.cpp
 SRCS_MIN+=	CodeGen/AsmPrinter/AddressPool.cpp
 SRCS_MIN+=	CodeGen/AsmPrinter/AsmPrinter.cpp
 SRCS_MIN+=	CodeGen/AsmPrinter/AsmPrinterDwarf.cpp
@@ -147,12 +152,15 @@ SRCS_MIN+=	CodeGen/AsmPrinter/DwarfUnit.cpp
 SRCS_MIN+=	CodeGen/AsmPrinter/EHStreamer.cpp
 SRCS_MIN+=	CodeGen/AsmPrinter/ErlangGCPrinter.cpp
 SRCS_MIN+=	CodeGen/AsmPrinter/OcamlGCPrinter.cpp
+SRCS_MIN+=	CodeGen/AsmPrinter/WinCFGuard.cpp
 SRCS_MIN+=	CodeGen/AsmPrinter/WinException.cpp
 SRCS_MIN+=	CodeGen/AtomicExpandPass.cpp
 SRCS_MIN+=	CodeGen/BasicTargetTransformInfo.cpp
 SRCS_MIN+=	CodeGen/BranchFolding.cpp
 SRCS_MIN+=	CodeGen/BranchRelaxation.cpp
+SRCS_MIN+=	CodeGen/BreakFalseDeps.cpp
 SRCS_MIN+=	CodeGen/BuiltinGCs.cpp
+SRCS_MIN+=	CodeGen/CFIInstrInserter.cpp
 SRCS_MIN+=	CodeGen/CalcSpillWeights.cpp
 SRCS_MIN+=	CodeGen/CallingConvLower.cpp
 SRCS_MIN+=	CodeGen/CodeGen.cpp
@@ -164,6 +172,7 @@ SRCS_MIN+=	CodeGen/DetectDeadLanes.cpp
 SRCS_MIN+=	CodeGen/DwarfEHPrepare.cpp
 SRCS_MIN+=	CodeGen/EarlyIfConversion.cpp
 SRCS_MIN+=	CodeGen/EdgeBundles.cpp
+SRCS_MIN+=	CodeGen/ExecutionDomainFix.cpp
 SRCS_MIN+=	CodeGen/ExpandISelPseudos.cpp
 SRCS_MIN+=	CodeGen/ExpandMemCmp.cpp
 SRCS_MIN+=	CodeGen/ExpandPostRAPseudos.cpp
@@ -180,6 +189,8 @@ SRCS_MIN+=	CodeGen/GlobalISel/GlobalISel.cpp
 SRCS_MIN+=	CodeGen/GlobalISel/IRTranslator.cpp
 SRCS_MIN+=	CodeGen/GlobalISel/InstructionSelect.cpp
 SRCS_MIN+=	CodeGen/GlobalISel/InstructionSelector.cpp
+SRCS_MIN+=	CodeGen/GlobalISel/LegalityPredicates.cpp
+SRCS_MIN+=	CodeGen/GlobalISel/LegalizeMutations.cpp
 SRCS_MIN+=	CodeGen/GlobalISel/Legalizer.cpp
 SRCS_MIN+=	CodeGen/GlobalISel/LegalizerHelper.cpp
 SRCS_MIN+=	CodeGen/GlobalISel/LegalizerInfo.cpp
@@ -215,6 +226,7 @@ SRCS_MIN+=	CodeGen/LiveRegUnits.cpp
 SRCS_MIN+=	CodeGen/LiveStacks.cpp
 SRCS_MIN+=	CodeGen/LiveVariables.cpp
 SRCS_MIN+=	CodeGen/LocalStackSlotAllocation.cpp
+SRCS_MIN+=	CodeGen/LoopTraversal.cpp
 SRCS_MIN+=	CodeGen/LowLevelType.cpp
 SRCS_MIN+=	CodeGen/LowerEmuTLS.cpp
 SRCS_MIN+=	CodeGen/MIRCanonicalizerPass.cpp
@@ -268,6 +280,7 @@ SRCS_MIN+=	CodeGen/PreISelIntrinsicLowering.cpp
 SRCS_MIN+=	CodeGen/ProcessImplicitDefs.cpp
 SRCS_MIN+=	CodeGen/PrologEpilogInserter.cpp
 SRCS_MIN+=	CodeGen/PseudoSourceValue.cpp
+SRCS_MIN+=	CodeGen/ReachingDefAnalysis.cpp
 SRCS_MIN+=	CodeGen/RegAllocBase.cpp
 SRCS_MIN+=	CodeGen/RegAllocBasic.cpp
 SRCS_MIN+=	CodeGen/RegAllocFast.cpp
@@ -339,7 +352,9 @@ SRCS_MIN+=	CodeGen/TargetSchedule.cpp
 SRCS_MIN+=	CodeGen/TargetSubtargetInfo.cpp
 SRCS_MIN+=	CodeGen/TwoAddressInstructionPass.cpp
 SRCS_MIN+=	CodeGen/UnreachableBlockElim.cpp
+SRCS_MIN+=	CodeGen/ValueTypes.cpp
 SRCS_MIN+=	CodeGen/VirtRegMap.cpp
+SRCS_MIN+=	CodeGen/WasmEHPrepare.cpp
 SRCS_MIN+=	CodeGen/WinEHPrepare.cpp
 SRCS_MIN+=	CodeGen/XRayInstrumentation.cpp
 SRCS_EXT+=	DebugInfo/CodeView/AppendingTypeTableBuilder.cpp
@@ -525,6 +540,7 @@ SRCS_MIN+=	IR/DebugLoc.cpp
 SRCS_MIN+=	IR/DiagnosticHandler.cpp
 SRCS_MIN+=	IR/DiagnosticInfo.cpp
 SRCS_MIN+=	IR/DiagnosticPrinter.cpp
+SRCS_MIN+=	IR/DomTreeUpdater.cpp
 SRCS_MIN+=	IR/Dominators.cpp
 SRCS_MIN+=	IR/Function.cpp
 SRCS_MIN+=	IR/GVMaterializer.cpp
@@ -576,6 +592,7 @@ SRCS_MIN+=	MC/MCAsmInfo.cpp
 SRCS_MIN+=	MC/MCAsmInfoCOFF.cpp
 SRCS_MIN+=	MC/MCAsmInfoDarwin.cpp
 SRCS_MIN+=	MC/MCAsmInfoELF.cpp
+SRCS_MIN+=	MC/MCAsmMacro.cpp
 SRCS_MIN+=	MC/MCAsmStreamer.cpp
 SRCS_MIN+=	MC/MCAssembler.cpp
 SRCS_MIN+=	MC/MCCodeEmitter.cpp
@@ -632,6 +649,7 @@ SRCS_MIN+=	MC/MCWinEH.cpp
 SRCS_MIN+=	MC/MachObjectWriter.cpp
 SRCS_MIN+=	MC/StringTableBuilder.cpp
 SRCS_MIN+=	MC/SubtargetFeature.cpp
+SRCS_MIN+=	MC/WasmObjectWriter.cpp
 SRCS_MIN+=	MC/WinCOFFObjectWriter.cpp
 SRCS_MIN+=	Object/Archive.cpp
 SRCS_MIN+=	Object/ArchiveWriter.cpp
@@ -702,6 +720,7 @@ SRCS_MIN+=	Support/ConvertUTF.cpp
 SRCS_MIN+=	Support/ConvertUTFWrapper.cpp
 SRCS_MIN+=	Support/CrashRecoveryContext.cpp
 SRCS_MIN+=	Support/DAGDeltaAlgorithm.cpp
+SRCS_MIN+=	Support/DJB.cpp
 SRCS_MIN+=	Support/DataExtractor.cpp
 SRCS_MIN+=	Support/Debug.cpp
 SRCS_MIN+=	Support/DebugCounter.cpp
@@ -719,6 +738,7 @@ SRCS_MIN+=	Support/GlobPattern.cpp
 SRCS_MIN+=	Support/GraphWriter.cpp
 SRCS_MIN+=	Support/Hashing.cpp
 SRCS_MIN+=	Support/Host.cpp
+SRCS_MIN+=	Support/InitLLVM.cpp
 SRCS_MIN+=	Support/IntEqClasses.cpp
 SRCS_MIN+=	Support/IntervalMap.cpp
 SRCS_MIN+=	Support/JamCRC.cpp
@@ -771,7 +791,9 @@ SRCS_MIN+=	Support/TrigramIndex.cpp
 SRCS_MIN+=	Support/Triple.cpp
 SRCS_MIN+=	Support/Twine.cpp
 SRCS_MIN+=	Support/Unicode.cpp
+SRCS_MIN+=	Support/UnicodeCaseFold.cpp
 SRCS_MIN+=	Support/Valgrind.cpp
+SRCS_MIN+=	Support/VersionTuple.cpp
 SRCS_MIN+=	Support/YAMLParser.cpp
 SRCS_MIN+=	Support/YAMLTraits.cpp
 SRCS_MIN+=	Support/circular_raw_ostream.cpp
@@ -851,6 +873,7 @@ SRCS_MIN+=	Target/ARM/ARMAsmPrinter.cpp
 SRCS_MIN+=	Target/ARM/ARMBaseInstrInfo.cpp
 SRCS_MIN+=	Target/ARM/ARMBaseRegisterInfo.cpp
 SRCS_MIN+=	Target/ARM/ARMCallLowering.cpp
+SRCS_MIN+=	Target/ARM/ARMCodeGenPrepare.cpp
 SRCS_MIN+=	Target/ARM/ARMComputeBlockSize.cpp
 SRCS_MIN+=	Target/ARM/ARMConstantIslandPass.cpp
 SRCS_MIN+=	Target/ARM/ARMConstantPoolValue.cpp
@@ -868,6 +891,7 @@ SRCS_MIN+=	Target/ARM/ARMMCInstLower.cpp
 SRCS_MIN+=	Target/ARM/ARMMachineFunctionInfo.cpp
 SRCS_MIN+=	Target/ARM/ARMMacroFusion.cpp
 SRCS_MIN+=	Target/ARM/ARMOptimizeBarriersPass.cpp
+SRCS_MIN+=	Target/ARM/ARMParallelDSP.cpp
 SRCS_MIN+=	Target/ARM/ARMRegisterBankInfo.cpp
 SRCS_MIN+=	Target/ARM/ARMRegisterInfo.cpp
 SRCS_MIN+=	Target/ARM/ARMSelectionDAGInfo.cpp
@@ -927,19 +951,25 @@ SRCS_MIN+=	Target/Mips/Mips16InstrInfo.cpp
 SRCS_MIN+=	Target/Mips/Mips16RegisterInfo.cpp
 SRCS_MIN+=	Target/Mips/MipsAnalyzeImmediate.cpp
 SRCS_MIN+=	Target/Mips/MipsAsmPrinter.cpp
+SRCS_MIN+=	Target/Mips/MipsBranchExpansion.cpp
 SRCS_MIN+=	Target/Mips/MipsCCState.cpp
+SRCS_MIN+=	Target/Mips/MipsCallLowering.cpp
 SRCS_MIN+=	Target/Mips/MipsConstantIslandPass.cpp
 SRCS_MIN+=	Target/Mips/MipsDelaySlotFiller.cpp
+SRCS_MIN+=	Target/Mips/MipsExpandPseudo.cpp
 SRCS_MIN+=	Target/Mips/MipsFastISel.cpp
 SRCS_MIN+=	Target/Mips/MipsFrameLowering.cpp
 SRCS_MIN+=	Target/Mips/MipsISelDAGToDAG.cpp
 SRCS_MIN+=	Target/Mips/MipsISelLowering.cpp
 SRCS_MIN+=	Target/Mips/MipsInstrInfo.cpp
+SRCS_MIN+=	Target/Mips/MipsInstructionSelector.cpp
+SRCS_MIN+=	Target/Mips/MipsLegalizerInfo.cpp
 SRCS_MIN+=	Target/Mips/MipsMCInstLower.cpp
 SRCS_MIN+=	Target/Mips/MipsMachineFunction.cpp
 SRCS_MIN+=	Target/Mips/MipsModuleISelDAGToDAG.cpp
 SRCS_MIN+=	Target/Mips/MipsOptimizePICCall.cpp
 SRCS_MIN+=	Target/Mips/MipsOs16.cpp
+SRCS_MIN+=	Target/Mips/MipsRegisterBankInfo.cpp
 SRCS_MIN+=	Target/Mips/MipsRegisterInfo.cpp
 SRCS_MIN+=	Target/Mips/MipsSEFrameLowering.cpp
 SRCS_MIN+=	Target/Mips/MipsSEISelDAGToDAG.cpp
@@ -1034,6 +1064,7 @@ SRCS_XDW+=	Target/X86/Disassembler/X86Disassembler.cpp
 SRCS_XDW+=	Target/X86/Disassembler/X86DisassemblerDecoder.cpp
 SRCS_MIN+=	Target/X86/InstPrinter/X86ATTInstPrinter.cpp
 SRCS_MIN+=	Target/X86/InstPrinter/X86InstComments.cpp
+SRCS_MIN+=	Target/X86/InstPrinter/X86InstPrinterCommon.cpp
 SRCS_MIN+=	Target/X86/InstPrinter/X86IntelInstPrinter.cpp
 SRCS_MIN+=	Target/X86/MCTargetDesc/X86AsmBackend.cpp
 SRCS_MIN+=	Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
@@ -1046,7 +1077,9 @@ SRCS_MIN+=	Target/X86/MCTargetDesc/X86WinCOFFStreamer.
 SRCS_MIN+=	Target/X86/MCTargetDesc/X86WinCOFFTargetStreamer.cpp
 SRCS_MIN+=	Target/X86/TargetInfo/X86TargetInfo.cpp
 SRCS_MIN+=	Target/X86/Utils/X86ShuffleDecode.cpp
+SRCS_MIN+=	Target/X86/ShadowCallStack.cpp
 SRCS_MIN+=	Target/X86/X86AsmPrinter.cpp
+SRCS_MIN+=	Target/X86/X86AvoidStoreForwardingBlocks.cpp
 SRCS_MIN+=	Target/X86/X86CallFrameOptimization.cpp
 SRCS_MIN+=	Target/X86/X86CallLowering.cpp
 SRCS_MIN+=	Target/X86/X86CallingConv.cpp
@@ -1063,7 +1096,9 @@ SRCS_MIN+=	Target/X86/X86FloatingPoint.cpp
 SRCS_MIN+=	Target/X86/X86FrameLowering.cpp
 SRCS_MIN+=	Target/X86/X86ISelDAGToDAG.cpp
 SRCS_MIN+=	Target/X86/X86ISelLowering.cpp
+SRCS_MIN+=	Target/X86/X86IndirectBranchTracking.cpp
 SRCS_MIN+=	Target/X86/X86InstrFMA3Info.cpp
+SRCS_MIN+=	Target/X86/X86InstrFoldTables.cpp
 SRCS_MIN+=	Target/X86/X86InstrInfo.cpp
 SRCS_MIN+=	Target/X86/X86InstructionSelector.cpp
 SRCS_MIN+=	Target/X86/X86InterleavedAccess.cpp
@@ -1078,6 +1113,7 @@ SRCS_MIN+=	Target/X86/X86RegisterInfo.cpp
 SRCS_MIN+=	Target/X86/X86RetpolineThunks.cpp
 SRCS_MIN+=	Target/X86/X86SelectionDAGInfo.cpp
 SRCS_MIN+=	Target/X86/X86ShuffleDecodeConstantPool.cpp
+SRCS_MIN+=	Target/X86/X86SpeculativeLoadHardening.cpp
 SRCS_MIN+=	Target/X86/X86Subtarget.cpp
 SRCS_MIN+=	Target/X86/X86TargetMachine.cpp
 SRCS_MIN+=	Target/X86/X86TargetObjectFile.cpp
@@ -1088,6 +1124,8 @@ SRCS_MIN+=	Target/X86/X86WinEHState.cpp
 .endif # MK_LLVM_TARGET_X86
 SRCS_EXT+=	ToolDrivers/llvm-dlltool/DlltoolDriver.cpp
 SRCS_EXL+=	ToolDrivers/llvm-lib/LibDriver.cpp
+SRCS_MIN+=	Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
+SRCS_MIN+=	Transforms/AggressiveInstCombine/TruncInstCombine.cpp
 SRCS_MIN+=	Transforms/Coroutines/CoroCleanup.cpp
 SRCS_MIN+=	Transforms/Coroutines/CoroEarly.cpp
 SRCS_MIN+=	Transforms/Coroutines/CoroElide.cpp
@@ -1121,9 +1159,11 @@ SRCS_MIN+=	Transforms/IPO/MergeFunctions.cpp
 SRCS_MIN+=	Transforms/IPO/PartialInlining.cpp
 SRCS_MIN+=	Transforms/IPO/PassManagerBuilder.cpp
 SRCS_MIN+=	Transforms/IPO/PruneEH.cpp
+SRCS_MIN+=	Transforms/IPO/SCCP.cpp
 SRCS_MIN+=	Transforms/IPO/SampleProfile.cpp
 SRCS_MIN+=	Transforms/IPO/StripDeadPrototypes.cpp
 SRCS_MIN+=	Transforms/IPO/StripSymbols.cpp
+SRCS_MIN+=	Transforms/IPO/SyntheticCountsPropagation.cpp
 SRCS_MIN+=	Transforms/IPO/ThinLTOBitcodeWriter.cpp
 SRCS_MIN+=	Transforms/IPO/WholeProgramDevirt.cpp
 SRCS_MIN+=	Transforms/InstCombine/InstCombineAddSub.cpp
@@ -1141,6 +1181,7 @@ SRCS_MIN+=	Transforms/InstCombine/InstCombineVectorOps
 SRCS_MIN+=	Transforms/InstCombine/InstructionCombining.cpp
 SRCS_MIN+=	Transforms/Instrumentation/AddressSanitizer.cpp
 SRCS_MIN+=	Transforms/Instrumentation/BoundsChecking.cpp
+SRCS_MIN+=	Transforms/Instrumentation/CGProfile.cpp
 SRCS_MIN+=	Transforms/Instrumentation/DataFlowSanitizer.cpp
 SRCS_MIN+=	Transforms/Instrumentation/EfficiencySanitizer.cpp
 SRCS_MIN+=	Transforms/Instrumentation/GCOVProfiling.cpp
@@ -1183,6 +1224,7 @@ SRCS_MIN+=	Transforms/Scalar/IVUsersPrinter.cpp
 SRCS_MIN+=	Transforms/Scalar/IndVarSimplify.cpp
 SRCS_MIN+=	Transforms/Scalar/InductiveRangeCheckElimination.cpp
 SRCS_EXT+=	Transforms/Scalar/InferAddressSpaces.cpp
+SRCS_MIN+=	Transforms/Scalar/InstSimplifyPass.cpp
 SRCS_MIN+=	Transforms/Scalar/JumpThreading.cpp
 SRCS_MIN+=	Transforms/Scalar/LICM.cpp
 SRCS_MIN+=	Transforms/Scalar/LoopAccessAnalysisPrinter.cpp
@@ -1201,6 +1243,7 @@ SRCS_MIN+=	Transforms/Scalar/LoopSimplifyCFG.cpp
 SRCS_MIN+=	Transforms/Scalar/LoopSink.cpp
 SRCS_MIN+=	Transforms/Scalar/LoopStrengthReduce.cpp
 SRCS_MIN+=	Transforms/Scalar/LoopUnrollPass.cpp
+SRCS_MIN+=	Transforms/Scalar/LoopUnrollAndJamPass.cpp
 SRCS_MIN+=	Transforms/Scalar/LoopUnswitch.cpp
 SRCS_MIN+=	Transforms/Scalar/LoopVersioningLICM.cpp
 SRCS_MIN+=	Transforms/Scalar/LowerAtomic.cpp
@@ -1256,7 +1299,9 @@ SRCS_MIN+=	Transforms/Utils/LCSSA.cpp
 SRCS_MIN+=	Transforms/Utils/LibCallsShrinkWrap.cpp
 SRCS_MIN+=	Transforms/Utils/Local.cpp
 SRCS_MIN+=	Transforms/Utils/LoopSimplify.cpp
+SRCS_MIN+=	Transforms/Utils/LoopRotationUtils.cpp
 SRCS_MIN+=	Transforms/Utils/LoopUnroll.cpp
+SRCS_MIN+=	Transforms/Utils/LoopUnrollAndJam.cpp
 SRCS_MIN+=	Transforms/Utils/LoopUnrollPeel.cpp
 SRCS_MIN+=	Transforms/Utils/LoopUnrollRuntime.cpp
 SRCS_MIN+=	Transforms/Utils/LoopUtils.cpp
@@ -1284,9 +1329,12 @@ SRCS_EXT+=	Transforms/Utils/Utils.cpp
 SRCS_MIN+=	Transforms/Utils/VNCoercion.cpp
 SRCS_MIN+=	Transforms/Utils/ValueMapper.cpp
 SRCS_MIN+=	Transforms/Vectorize/LoadStoreVectorizer.cpp
+SRCS_MIN+=	Transforms/Vectorize/LoopVectorizationLegality.cpp
 SRCS_MIN+=	Transforms/Vectorize/LoopVectorize.cpp
 SRCS_MIN+=	Transforms/Vectorize/SLPVectorizer.cpp
 SRCS_MIN+=	Transforms/Vectorize/VPlan.cpp
+SRCS_MIN+=	Transforms/Vectorize/VPlanHCFGBuilder.cpp
+SRCS_MIN+=	Transforms/Vectorize/VPlanVerifier.cpp
 SRCS_EXT+=	Transforms/Vectorize/Vectorize.cpp
 SRCS_EXT+=	XRay/InstrumentationMap.cpp
 
@@ -1320,24 +1368,36 @@ SRCS_ALL+=	${SRCS_XDW}
 .endif
 SRCS+=		${SRCS_ALL:O}
 
-llvm/IR/Attributes.gen: ${LLVM_SRCS}/include/llvm/IR/Attributes.td
+llvm/IR/Attributes.inc: ${LLVM_SRCS}/include/llvm/IR/Attributes.td
 	${LLVM_TBLGEN} -gen-attrs \
 	    -I ${LLVM_SRCS}/include -d ${.TARGET}.d -o ${.TARGET} \
 	    ${LLVM_SRCS}/include/llvm/IR/Attributes.td
-TGHDRS+=	llvm/IR/Attributes.gen
+TGHDRS+=	llvm/IR/Attributes.inc
 
-llvm/IR/Intrinsics.gen: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td
-	${LLVM_TBLGEN} -gen-intrinsic \
+llvm/IR/IntrinsicEnums.inc: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td
+	${LLVM_TBLGEN} -gen-intrinsic-enums \
 	    -I ${LLVM_SRCS}/include -d ${.TARGET}.d -o ${.TARGET} \
 	    ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td
-TGHDRS+=	llvm/IR/Intrinsics.gen
+TGHDRS+=	llvm/IR/IntrinsicEnums.inc
 
+llvm/IR/IntrinsicImpl.inc: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td
+	${LLVM_TBLGEN} -gen-intrinsic-impl \
+	    -I ${LLVM_SRCS}/include -d ${.TARGET}.d -o ${.TARGET} \
+	    ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td
+TGHDRS+=	llvm/IR/IntrinsicImpl.inc
+
 AttributesCompatFunc.inc: ${LLVM_SRCS}/lib/IR/AttributesCompatFunc.td
 	${LLVM_TBLGEN} -gen-attrs \
 	    -I ${LLVM_SRCS}/include -d ${.TARGET}.d -o ${.TARGET} \
 	    ${LLVM_SRCS}/lib/IR/AttributesCompatFunc.td
 TGHDRS+=	AttributesCompatFunc.inc
 
+InstCombineTables.inc: ${LLVM_SRCS}/lib/Transforms/InstCombine/InstCombineTables.td
+	${LLVM_TBLGEN} -gen-searchable-tables \
+	    -I ${LLVM_SRCS}/include -d ${.TARGET}.d -o ${.TARGET} \
+	    ${LLVM_SRCS}/lib/Transforms/InstCombine/InstCombineTables.td
+TGHDRS+=	InstCombineTables.inc
+
 llvm-lib/Options.inc: ${LLVM_SRCS}/lib/ToolDrivers/llvm-lib/Options.td
 	${LLVM_TBLGEN} -gen-opt-parser-defs \
 	    -I ${LLVM_SRCS}/include -d ${.TARGET}.d -o ${.TARGET} \
@@ -1431,9 +1491,11 @@ TGHDRS+=	MipsGenCallingConv.inc
 TGHDRS+=	MipsGenDAGISel.inc
 TGHDRS+=	MipsGenDisassemblerTables.inc
 TGHDRS+=	MipsGenFastISel.inc
+TGHDRS+=	MipsGenGlobalISel.inc
 TGHDRS+=	MipsGenInstrInfo.inc
 TGHDRS+=	MipsGenMCCodeEmitter.inc
 TGHDRS+=	MipsGenMCPseudoLowering.inc
+TGHDRS+=	MipsGenRegisterBank.inc
 TGHDRS+=	MipsGenRegisterInfo.inc
 TGHDRS+=	MipsGenSubtargetInfo.inc
 .endif # MK_LLVM_TARGET_MIPS

Modified: projects/clang700-import/usr.bin/clang/clang/Makefile
==============================================================================
--- projects/clang700-import/usr.bin/clang/clang/Makefile	Tue Jul 31 21:06:28 2018	(r337009)
+++ projects/clang700-import/usr.bin/clang/clang/Makefile	Tue Jul 31 21:07:20 2018	(r337010)
@@ -7,6 +7,7 @@ PROG_CXX=	clang
 SRCDIR=		tools/clang/tools/driver
 SRCS+=		cc1_main.cpp
 SRCS+=		cc1as_main.cpp
+SRCS+=		cc1gen_reproducer_main.cpp
 SRCS+=		driver.cpp
 
 .if ${MK_SHARED_TOOLCHAIN} == "no"
