svn commit: r336989 - in projects/clang700-import: lib/clang/libllvmminimal usr.bin/clang/llvm-tblgen

[Dimitry Andric]

Author: dim
Date: Tue Jul 31 18:25:33 2018
New Revision: 336989
URL: https://svnweb.freebsd.org/changeset/base/336989

Log:
  Make llvm-tblgen and clang-tblgen build.

Modified:
  projects/clang700-import/lib/clang/libllvmminimal/Makefile
  projects/clang700-import/usr.bin/clang/llvm-tblgen/Makefile

Modified: projects/clang700-import/lib/clang/libllvmminimal/Makefile
==============================================================================
--- projects/clang700-import/lib/clang/libllvmminimal/Makefile	Tue Jul 31 18:13:44 2018	(r336988)
+++ projects/clang700-import/lib/clang/libllvmminimal/Makefile	Tue Jul 31 18:25:33 2018	(r336989)
@@ -22,6 +22,7 @@ SRCS+=		Support/FormattedStream.cpp
 SRCS+=		Support/Hashing.cpp
 SRCS+=		Support/Host.cpp
 SRCS+=		Support/IntEqClasses.cpp
+SRCS+=		Support/JSON.cpp
 SRCS+=		Support/Locale.cpp
 SRCS+=		Support/LowLevelType.cpp
 SRCS+=		Support/MD5.cpp
@@ -50,6 +51,7 @@ SRCS+=		Support/ToolOutputFile.cpp
 SRCS+=		Support/Triple.cpp
 SRCS+=		Support/Twine.cpp
 SRCS+=		Support/Unicode.cpp
+SRCS+=		Support/WithColor.cpp
 SRCS+=		Support/circular_raw_ostream.cpp
 SRCS+=		Support/raw_ostream.cpp
 SRCS+=		Support/regcomp.c
@@ -58,6 +60,7 @@ SRCS+=		Support/regexec.c
 SRCS+=		Support/regfree.c
 SRCS+=		Support/regstrlcpy.c
 SRCS+=		TableGen/Error.cpp
+SRCS+=		TableGen/JSONBackend.cpp
 SRCS+=		TableGen/Main.cpp
 SRCS+=		TableGen/Record.cpp
 SRCS+=		TableGen/SetTheory.cpp

Modified: projects/clang700-import/usr.bin/clang/llvm-tblgen/Makefile
==============================================================================
--- projects/clang700-import/usr.bin/clang/llvm-tblgen/Makefile	Tue Jul 31 18:13:44 2018	(r336988)
+++ projects/clang700-import/usr.bin/clang/llvm-tblgen/Makefile	Tue Jul 31 18:25:33 2018	(r336989)
@@ -32,7 +32,9 @@ SRCS+=		InstrDocsEmitter.cpp
 SRCS+=		InstrInfoEmitter.cpp
 SRCS+=		IntrinsicEmitter.cpp
 SRCS+=		OptParserEmitter.cpp
+SRCS+=		PredicateExpander.cpp
 SRCS+=		PseudoLoweringEmitter.cpp
+SRCS+=		RISCVCompressInstEmitter.cpp
 SRCS+=		RegisterBankEmitter.cpp
 SRCS+=		RegisterInfoEmitter.cpp
 SRCS+=		SDNodeProperties.cpp
@@ -41,6 +43,7 @@ SRCS+=		SubtargetEmitter.cpp
 SRCS+=		SubtargetFeatureInfo.cpp
 SRCS+=		TableGen.cpp
 SRCS+=		Types.cpp
+SRCS+=		WebAssemblyDisassemblerEmitter.cpp
 SRCS+=		X86DisassemblerTables.cpp
 SRCS+=		X86EVEX2VEXTablesEmitter.cpp
 SRCS+=		X86FoldTablesEmitter.cpp