svn commit: r275161 - projects/clang350-import/contrib/llvm/patches

Dimitry Andric dim at FreeBSD.org
Thu Nov 27 00:39:01 UTC 2014


Author: dim
Date: Thu Nov 27 00:39:01 2014
New Revision: 275161
URL: https://svnweb.freebsd.org/changeset/base/275161

Log:
  Add patch file for r275160.

Added:
  projects/clang350-import/contrib/llvm/patches/patch-17-llvm-r222856-libapr-miscompile.diff

Added: projects/clang350-import/contrib/llvm/patches/patch-17-llvm-r222856-libapr-miscompile.diff
==============================================================================
--- /dev/null	00:00:00 1970	(empty, because file is newly added)
+++ projects/clang350-import/contrib/llvm/patches/patch-17-llvm-r222856-libapr-miscompile.diff	Thu Nov 27 00:39:01 2014	(r275161)
@@ -0,0 +1,190 @@
+Pull in r222856 from upstream llvm trunk (by David Majnemer):
+
+  Revert "Added inst combine transforms for single bit tests from Chris's note"
+
+  This reverts commit r210006, it miscompiled libapr which is used in who
+  knows how many projects.
+
+  A test has been added to ensure that we don't regress again.
+
+This fixes a miscompilation in libapr, which caused problems in svnlite.
+
+Introduced here: http://svnweb.freebsd.org/changeset/base/275160
+
+Index: lib/Transforms/InstCombine/InstCombineSelect.cpp
+===================================================================
+--- lib/Transforms/InstCombine/InstCombineSelect.cpp	(revision 17)
++++ lib/Transforms/InstCombine/InstCombineSelect.cpp	(revision 18)
+@@ -387,15 +387,7 @@ static Value *SimplifyWithOpReplaced(Value *V, Val
+ /// 1. The icmp predicate is inverted
+ /// 2. The select operands are reversed
+ /// 3. The magnitude of C2 and C1 are flipped
+-///
+-/// This also tries to turn
+-/// --- Single bit tests:
+-/// if ((x & C) == 0) x |= C	to  x |= C
+-/// if ((x & C) != 0) x ^= C	to  x &= ~C
+-/// if ((x & C) == 0) x ^= C	to  x |= C
+-/// if ((x & C) != 0) x &= ~C	to  x &= ~C
+-/// if ((x & C) == 0) x &= ~C	to  nothing
+-static Value *foldSelectICmpAndOr(SelectInst &SI, Value *TrueVal,
++static Value *foldSelectICmpAndOr(const SelectInst &SI, Value *TrueVal,
+                                   Value *FalseVal,
+                                   InstCombiner::BuilderTy *Builder) {
+   const ICmpInst *IC = dyn_cast<ICmpInst>(SI.getCondition());
+@@ -414,25 +406,6 @@ static Value *SimplifyWithOpReplaced(Value *V, Val
+     return nullptr;
+ 
+   const APInt *C2;
+-  if (match(TrueVal, m_Specific(X))) {
+-    // if ((X & C) != 0) X ^= C becomes X &= ~C
+-    if (match(FalseVal, m_Xor(m_Specific(X), m_APInt(C2))) && C1 == C2)
+-      return Builder->CreateAnd(X, ~(*C1));
+-    // if ((X & C) != 0) X &= ~C becomes X &= ~C
+-    if (match(FalseVal, m_And(m_Specific(X), m_APInt(C2))) && *C1 == ~(*C2))
+-      return FalseVal;
+-  } else if (match(FalseVal, m_Specific(X))) {
+-    // if ((X & C) == 0) X ^= C becomes X |= C
+-    if (match(TrueVal, m_Xor(m_Specific(X), m_APInt(C2))) && C1 == C2)
+-      return Builder->CreateOr(X, *C1);
+-    // if ((X & C) == 0) X &= ~C becomes nothing
+-    if (match(TrueVal, m_And(m_Specific(X), m_APInt(C2))) && *C1 == ~(*C2))
+-      return X;
+-    // if ((X & C) == 0) X |= C becomes X |= C
+-    if (match(TrueVal, m_Or(m_Specific(X), m_APInt(C2))) && C1 == C2)
+-      return TrueVal;
+-  }
+-
+   bool OrOnTrueVal = false;
+   bool OrOnFalseVal = match(FalseVal, m_Or(m_Specific(TrueVal), m_Power2(C2)));
+   if (!OrOnFalseVal)
+Index: test/Transforms/InstCombine/select.ll
+===================================================================
+--- test/Transforms/InstCombine/select.ll	(revision 17)
++++ test/Transforms/InstCombine/select.ll	(revision 18)
+@@ -996,111 +996,6 @@ define <2 x i32> @select_icmp_eq_and_1_0_or_vector
+   ret <2 x i32> %select
+ }
+ 
+-; CHECK-LABEL: @select_icmp_and_8_eq_0_or_8(
+-; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 %x, 8
+-; CHECK-NEXT: ret i32 [[OR]]
+-define i32 @select_icmp_and_8_eq_0_or_8(i32 %x) {
+-  %and = and i32 %x, 8
+-  %cmp = icmp eq i32 %and, 0
+-  %or = or i32 %x, 8
+-  %or.x = select i1 %cmp, i32 %or, i32 %x
+-  ret i32 %or.x
+-}
+-
+-; CHECK-LABEL: @select_icmp_and_8_ne_0_xor_8(
+-; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 %x, -9
+-; CHECK-NEXT: ret i32 [[AND]]
+-define i32 @select_icmp_and_8_ne_0_xor_8(i32 %x) {
+-  %and = and i32 %x, 8
+-  %cmp = icmp eq i32 %and, 0
+-  %xor = xor i32 %x, 8
+-  %x.xor = select i1 %cmp, i32 %x, i32 %xor
+-  ret i32 %x.xor
+-}
+-
+-; CHECK-LABEL: @select_icmp_and_8_eq_0_xor_8(
+-; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 %x, 8
+-; CHECK-NEXT: ret i32 [[OR]]
+-define i32 @select_icmp_and_8_eq_0_xor_8(i32 %x) {
+-  %and = and i32 %x, 8
+-  %cmp = icmp eq i32 %and, 0
+-  %xor = xor i32 %x, 8
+-  %xor.x = select i1 %cmp, i32 %xor, i32 %x
+-  ret i32 %xor.x
+-}
+-
+-; CHECK-LABEL: @select_icmp_and_8_ne_0_and_not_8(
+-; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 %x, -9
+-; CHECK-NEXT: ret i32 [[AND]]
+-define i32 @select_icmp_and_8_ne_0_and_not_8(i32 %x) {
+-  %and = and i32 %x, 8
+-  %cmp = icmp eq i32 %and, 0
+-  %and1 = and i32 %x, -9
+-  %x.and1 = select i1 %cmp, i32 %x, i32 %and1
+-  ret i32 %x.and1
+-}
+-
+-; CHECK-LABEL: @select_icmp_and_8_eq_0_and_not_8(
+-; CHECK-NEXT: ret i32 %x
+-define i32 @select_icmp_and_8_eq_0_and_not_8(i32 %x) {
+-  %and = and i32 %x, 8
+-  %cmp = icmp eq i32 %and, 0
+-  %and1 = and i32 %x, -9
+-  %and1.x = select i1 %cmp, i32 %and1, i32 %x
+-  ret i32 %and1.x
+-}
+-
+-; CHECK-LABEL: @select_icmp_x_and_8_eq_0_y_xor_8(
+-; CHECK: select i1 %cmp, i64 %y, i64 %xor
+-define i64 @select_icmp_x_and_8_eq_0_y_xor_8(i32 %x, i64 %y) {
+-  %and = and i32 %x, 8
+-  %cmp = icmp eq i32 %and, 0
+-  %xor = xor i64 %y, 8
+-  %y.xor = select i1 %cmp, i64 %y, i64 %xor
+-  ret i64 %y.xor
+-}
+-
+-; CHECK-LABEL: @select_icmp_x_and_8_eq_0_y_and_not_8(
+-; CHECK: select i1 %cmp, i64 %y, i64 %and1
+-define i64 @select_icmp_x_and_8_eq_0_y_and_not_8(i32 %x, i64 %y) {
+-  %and = and i32 %x, 8
+-  %cmp = icmp eq i32 %and, 0
+-  %and1 = and i64 %y, -9
+-  %y.and1 = select i1 %cmp, i64 %y, i64 %and1
+-  ret i64 %y.and1
+-}
+-
+-; CHECK-LABEL: @select_icmp_x_and_8_ne_0_y_xor_8(
+-; CHECK: select i1 %cmp, i64 %xor, i64 %y
+-define i64 @select_icmp_x_and_8_ne_0_y_xor_8(i32 %x, i64 %y) {
+-  %and = and i32 %x, 8
+-  %cmp = icmp eq i32 %and, 0
+-  %xor = xor i64 %y, 8
+-  %xor.y = select i1 %cmp, i64 %xor, i64 %y
+-  ret i64 %xor.y
+-}
+-
+-; CHECK-LABEL: @select_icmp_x_and_8_ne_0_y_and_not_8(
+-; CHECK: select i1 %cmp, i64 %and1, i64 %y
+-define i64 @select_icmp_x_and_8_ne_0_y_and_not_8(i32 %x, i64 %y) {
+-  %and = and i32 %x, 8
+-  %cmp = icmp eq i32 %and, 0
+-  %and1 = and i64 %y, -9
+-  %and1.y = select i1 %cmp, i64 %and1, i64 %y
+-  ret i64 %and1.y
+-}
+-
+-; CHECK-LABEL: @select_icmp_x_and_8_ne_0_y_or_8(
+-; CHECK: xor i64 %1, 8
+-; CHECK: or i64 %2, %y
+-define i64 @select_icmp_x_and_8_ne_0_y_or_8(i32 %x, i64 %y) {
+-  %and = and i32 %x, 8
+-  %cmp = icmp eq i32 %and, 0
+-  %or = or i64 %y, 8
+-  %or.y = select i1 %cmp, i64 %or, i64 %y
+-  ret i64 %or.y
+-}
+-
+ define i32 @test65(i64 %x) {
+   %1 = and i64 %x, 16
+   %2 = icmp ne i64 %1, 0
+@@ -1236,3 +1131,13 @@ define i32 @test75(i32 %x) {
+ ; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 68, i32 %x
+ ; CHECK-NEXT: ret i32 [[SEL]]
+ }
++
++define i32 @test87(i32 %x) {
++  %and = and i32 %x, 1
++  %cmp = icmp ne i32 %and, 0
++  %and1 = and i32 %x, -2
++  %and1.x = select i1 %cmp, i32 %and1, i32 %x
++  ret i32 %and1.x
++; CHECK-LABEL: @test87(
++; CHECK: and i32 %x, -2
++}


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