svn commit: r230362 - in projects/armv6/sys: arm/conf arm/omap
arm/omap/omap3 arm/omap/omap4 arm/omap/omap4/pandaboard conf
Oleksandr Tymoshenko
gonzo at FreeBSD.org
Fri Jan 20 05:05:48 UTC 2012
Author: gonzo
Date: Fri Jan 20 05:05:47 2012
New Revision: 230362
URL: http://svn.freebsd.org/changeset/base/230362
Log:
- Initial code drop for FreeBSD OMAP support. This is minimal bootable
subset of Ben's code from https://gitorious.org/+freebsd-omap-team/
repository. It will be used as a base for bringing the rest of
drivers into the tree.
Submitted by: Ben Gray <ben.r.gray at gmail.com>
Added:
projects/armv6/sys/arm/conf/PANDABOARD
projects/armv6/sys/arm/conf/PANDABOARD.hints
projects/armv6/sys/arm/omap/
projects/armv6/sys/arm/omap/omap.c
projects/armv6/sys/arm/omap/omap3/
projects/armv6/sys/arm/omap/omap3/omap35xx_reg.h
projects/armv6/sys/arm/omap/omap4/
projects/armv6/sys/arm/omap/omap4/files.omap44xx
projects/armv6/sys/arm/omap/omap4/omap44xx.c
projects/armv6/sys/arm/omap/omap4/omap44xx_reg.h
projects/armv6/sys/arm/omap/omap4/omap4_if.m
projects/armv6/sys/arm/omap/omap4/omap4_intr.c
projects/armv6/sys/arm/omap/omap4/omap4_prcm_clks.c
projects/armv6/sys/arm/omap/omap4/omap4_scm_padconf.c
projects/armv6/sys/arm/omap/omap4/omap4_timer.c
projects/armv6/sys/arm/omap/omap4/omap4var.h
projects/armv6/sys/arm/omap/omap4/pandaboard/
projects/armv6/sys/arm/omap/omap4/pandaboard/files.pandaboard
projects/armv6/sys/arm/omap/omap4/pandaboard/pandaboard.c
projects/armv6/sys/arm/omap/omap4/pandaboard/std.pandaboard
projects/armv6/sys/arm/omap/omap4/std.omap44xx
projects/armv6/sys/arm/omap/omap4/uart_cpu_omap4.c
projects/armv6/sys/arm/omap/omap_cpuid.c
projects/armv6/sys/arm/omap/omap_cpuid.h
projects/armv6/sys/arm/omap/omap_if.m
projects/armv6/sys/arm/omap/omap_machdep.c
projects/armv6/sys/arm/omap/omap_prcm.c
projects/armv6/sys/arm/omap/omap_prcm.h
projects/armv6/sys/arm/omap/omap_scm.c
projects/armv6/sys/arm/omap/omap_scm.h
projects/armv6/sys/arm/omap/omap_space_asm.S
projects/armv6/sys/arm/omap/omapvar.h
projects/armv6/sys/arm/omap/std.omap
Modified:
projects/armv6/sys/conf/options.arm
Added: projects/armv6/sys/arm/conf/PANDABOARD
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ projects/armv6/sys/arm/conf/PANDABOARD Fri Jan 20 05:05:47 2012 (r230362)
@@ -0,0 +1,130 @@
+# PANDABOARD -- Custom configuration for the PandaBoard ARM development
+# platform, check out www.pandaboard.org
+#
+# For more information on this file, please read the handbook section on
+# Kernel Configuration Files:
+#
+# http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html
+#
+# The handbook is also available locally in /usr/share/doc/handbook
+# if you've installed the doc distribution, otherwise always see the
+# FreeBSD World Wide Web server (http://www.FreeBSD.org/) for the
+# latest information.
+#
+# An exhaustive list of options and more detailed explanations of the
+# device lines is also present in the ../../conf/NOTES and NOTES files.
+# If you are in doubt as to the purpose or necessity of a line, check first
+# in NOTES.
+#
+# $FreeBSD$
+
+ident PANDABOARD
+
+
+
+# This probably wants to move somewhere else. Maybe we can create a basic
+# OMAP4340 config, then make a PANDABOARD config that includes the basic one,
+# adds the start addresses and custom devices plus pulls in this hints file.
+
+hints "PANDABOARD.hints"
+
+include "../omap/omap4/pandaboard/std.pandaboard"
+
+#To statically compile in device wiring instead of /boot/device.hints
+makeoptions MODULES_OVERRIDE=""
+makeoptions WITHOUT_MODULES="ahc"
+
+makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols
+options HZ=100
+
+options SCHED_4BSD #4BSD scheduler
+options INET #InterNETworking
+#options INET6 #IPv6 communications protocols
+options FFS #Berkeley Fast Filesystem
+options SOFTUPDATES #Enable FFS soft updates support
+options UFS_ACL #Support for access control lists
+options UFS_DIRHASH #Improve performance on big directories
+options NFSCLIENT #Network Filesystem Client
+device snp
+#options NFSCL
+#options NFSSERVER #Network Filesystem Server
+options NFS_ROOT #NFS usable as /, requires NFSCLIENT
+options BREAK_TO_DEBUGGER
+options BOOTP_NFSROOT
+options BOOTP_COMPAT
+options BOOTP
+options BOOTP_NFSV3
+options BOOTP_WIRED_TO=ue0
+options MSDOSFS #MSDOS Filesystem
+#options CD9660 #ISO 9660 Filesystem
+#options PROCFS #Process filesystem (requires PSEUDOFS)
+options PSEUDOFS #Pseudo-filesystem framework
+options COMPAT_43 #Compatible with BSD 4.3 [KEEP THIS!]
+options SCSI_DELAY=5000 #Delay (in ms) before probing SCSI
+options KTRACE #ktrace(1) support
+options SYSVSHM #SYSV-style shared memory
+options SYSVMSG #SYSV-style message queues
+options SYSVSEM #SYSV-style semaphores
+options _KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions
+options KBD_INSTALL_CDEV # install a CDEV entry in /dev
+
+options PREEMPTION
+
+# MMC/SD/SDIO Card slot support
+device mmc # mmc/sd bus
+device mmcsd # mmc/sd flash cards
+
+# I2C support
+#device iicbus
+#device iic
+#device omap3_i2c
+
+device loop
+device ether
+device mii
+device smc
+device smcphy
+device uart
+device uart_ns8250
+
+device gpio
+
+device pty
+
+# Debugging for use in -current
+#options VERBOSE_SYSINIT #Enable verbose sysinit messages
+options KDB
+options DDB #Enable the kernel debugger
+#options INVARIANTS #Enable calls of extra sanity checking
+#options INVARIANT_SUPPORT #Extra sanity checks of internal structures, required by INVARIANTS
+#options WITNESS #Enable checks to detect deadlocks and cycles
+#options WITNESS_SKIPSPIN #Don't run witness on spinlocks for speed
+#options DIAGNOSTIC
+
+device md
+
+# The following enables MFS as root, this seems similar to an initramfs or initrd
+# as used in Linux.
+# options MD_ROOT
+# options MD_ROOT_SIZE=7560
+
+device random # Entropy device
+
+# USB support
+device usb
+options USB_DEBUG
+#options USB_REQ_DEBUG
+#options USB_VERBOSE
+device ohci
+device ehci
+device umass
+device scbus # SCSI bus (required for SCSI)
+device da # Direct Access (disks)
+
+
+# USB Ethernet support, requires miibus
+device miibus
+device axe # ASIX Electronics USB Ethernet
+device smsc # SMSC LAN95xx USB Ethernet
+
+
Added: projects/armv6/sys/arm/conf/PANDABOARD.hints
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ projects/armv6/sys/arm/conf/PANDABOARD.hints Fri Jan 20 05:05:47 2012 (r230362)
@@ -0,0 +1,61 @@
+# $FreeBSD$
+
+# USB ECHI
+
+#
+# TI OMAP Power Management and System Companion Device sitting on the I2C bus
+# hint.tps65950.0.at="iicbus0"
+# hint.tps65950.0.addr=0xd0
+
+
+#
+# Defines the GPIO pin used to detect the Write Protect stat of the MMC/SD card.
+#hint.omap_mmc.0.wp_gpio="23"
+
+
+#
+# If 'phy_reset" is set, then the accompaning PHY is reset using one of the
+# GPIO pins. If the reset GPIO pin is not -1 then the pin will be toggled when
+# the USB driver is loaded.
+hint.ehci.0.phy_reset="0"
+
+#
+# Sets the PHY mode for the individual ports, the following values are allowed
+# - EHCI_HCD_OMAP3_MODE_UNKNOWN 0
+# - EHCI_HCD_OMAP3_MODE_PHY 1
+# - EHCI_HCD_OMAP3_MODE_TLL 2
+hint.ehci.0.phy_mode_0="1"
+hint.ehci.0.phy_mode_1="0"
+hint.ehci.0.phy_mode_2="0"
+
+#
+# If specified the value indicates a pin that is toggled as a heart-beat. The
+# heart beat pusle is triggered every 500ms using the system tick timer.
+hint.omap_clk.0.heartbeat_gpio="150"
+
+
+#
+# Padconf (pinmux) settings - typically this would be set by the boot-loader
+# but can be overridden here. These hints are applied to the H/W when the
+# SCM module is initialised.
+#
+# The format is:
+# hint.omap_scm.0.padconf.<padname>=<muxmode:options>
+#
+# Where the options can be one of the following:
+# output, input, input_pullup, input_pulldown
+#
+
+# Setup the pin settings for the HS USB Host (PHY mode)
+hint.omap44xx.0.padconf.ag19="usbb1_ulpiphy_stp:output"
+hint.omap44xx.0.padconf.ae18="usbb1_ulpiphy_clk:input_pulldown"
+hint.omap44xx.0.padconf.af19="usbb1_ulpiphy_dir:input_pulldown"
+hint.omap44xx.0.padconf.ae19="usbb1_ulpiphy_nxt:input_pulldown"
+hint.omap44xx.0.padconf.af18="usbb1_ulpiphy_dat0:input_pulldown"
+hint.omap44xx.0.padconf.ag18="usbb1_ulpiphy_dat1:input_pulldown"
+hint.omap44xx.0.padconf.ae17="usbb1_ulpiphy_dat2:input_pulldown"
+hint.omap44xx.0.padconf.af17="usbb1_ulpiphy_dat3:input_pulldown"
+hint.omap44xx.0.padconf.ah17="usbb1_ulpiphy_dat4:input_pulldown"
+hint.omap44xx.0.padconf.ae16="usbb1_ulpiphy_dat5:input_pulldown"
+hint.omap44xx.0.padconf.af16="usbb1_ulpiphy_dat6:input_pulldown"
+hint.omap44xx.0.padconf.ag16="usbb1_ulpiphy_dat7:input_pulldown"
Added: projects/armv6/sys/arm/omap/omap.c
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ projects/armv6/sys/arm/omap/omap.c Fri Jan 20 05:05:47 2012 (r230362)
@@ -0,0 +1,506 @@
+/*
+ * Copyright (c) 2010
+ * Ben Gray <ben.r.gray at gmail.com>.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by Ben Gray.
+ * 4. The name of the company nor the name of the author may be used to
+ * endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY BEN GRAY ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL BEN GRAY BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/bus.h>
+#include <sys/kernel.h>
+#include <sys/reboot.h>
+#include <sys/malloc.h>
+#include <sys/bus.h>
+#include <sys/interrupt.h>
+#include <sys/module.h>
+#include <sys/rman.h>
+#include <sys/kdb.h>
+
+#include <vm/vm.h>
+#include <vm/vm_extern.h>
+#include <vm/pmap.h>
+
+#include <machine/cpu.h>
+#include <machine/bus.h>
+#include <machine/intr.h>
+#include <machine/bus.h>
+#include <machine/bus.h>
+
+#include <arm/omap/omapvar.h>
+
+static int omap_probe(device_t);
+static void omap_identify(driver_t *, device_t);
+static int omap_attach(device_t);
+
+extern const struct pmap_devmap omap_devmap[];
+
+/* Proto types for all the bus_space structure functions */
+bs_protos(generic);
+bs_protos(generic_armv7);
+
+struct bus_space omap_bs_tag = {
+ /* cookie */
+ .bs_cookie = (void *) 0,
+
+ /* mapping/unmapping */
+ .bs_map = generic_bs_map,
+ .bs_unmap = generic_bs_unmap,
+ .bs_subregion = generic_bs_subregion,
+
+ /* allocation/deallocation */
+ .bs_alloc = generic_bs_alloc,
+ .bs_free = generic_bs_free,
+
+ /* barrier */
+ .bs_barrier = generic_bs_barrier,
+
+ /* read (single) */
+ .bs_r_1 = generic_bs_r_1,
+ .bs_r_2 = generic_armv7_bs_r_2,
+ .bs_r_4 = generic_bs_r_4,
+ .bs_r_8 = NULL,
+
+ /* read multiple */
+ .bs_rm_1 = generic_bs_rm_1,
+ .bs_rm_2 = generic_armv7_bs_rm_2,
+ .bs_rm_4 = generic_bs_rm_4,
+ .bs_rm_8 = NULL,
+
+ /* read region */
+ .bs_rr_1 = generic_bs_rr_1,
+ .bs_rr_2 = generic_armv7_bs_rr_2,
+ .bs_rr_4 = generic_bs_rr_4,
+ .bs_rr_8 = NULL,
+
+ /* write (single) */
+ .bs_w_1 = generic_bs_w_1,
+ .bs_w_2 = generic_armv7_bs_w_2,
+ .bs_w_4 = generic_bs_w_4,
+ .bs_w_8 = NULL,
+
+ /* write multiple */
+ .bs_wm_1 = generic_bs_wm_1,
+ .bs_wm_2 = generic_armv7_bs_wm_2,
+ .bs_wm_4 = generic_bs_wm_4,
+ .bs_wm_8 = NULL,
+
+ /* write region */
+ .bs_wr_1 = generic_bs_wr_1,
+ .bs_wr_2 = generic_armv7_bs_wr_2,
+ .bs_wr_4 = generic_bs_wr_4,
+ .bs_wr_8 = NULL,
+
+ /* set multiple */
+ /* XXX not implemented */
+
+ /* set region */
+ .bs_sr_1 = NULL,
+ .bs_sr_2 = generic_armv7_bs_sr_2,
+ .bs_sr_4 = generic_bs_sr_4,
+ .bs_sr_8 = NULL,
+
+ /* copy */
+ .bs_c_1 = NULL,
+ .bs_c_2 = generic_armv7_bs_c_2,
+ .bs_c_4 = NULL,
+ .bs_c_8 = NULL,
+};
+
+static void
+omap_identify(driver_t *driver, device_t parent)
+{
+ BUS_ADD_CHILD(parent, 0, "omap", 0);
+}
+
+/**
+ * omap_probe - driver probe function
+ * @dev: the root device
+ *
+ * Simply sets the name of this base driver
+ */
+static int
+omap_probe(device_t dev)
+{
+
+ device_set_desc(dev, "TI OMAP");
+ return (0);
+}
+
+/**
+ * omap_attach
+ */
+static int
+omap_attach(device_t dev)
+{
+ struct omap_softc *sc = device_get_softc(dev);
+ const struct pmap_devmap *pdevmap;
+
+ sc->sc_iotag = &omap_bs_tag;
+ sc->sc_dev = dev;
+
+
+ /* Set all interrupts as the resource */
+ sc->sc_irq_rman.rm_type = RMAN_ARRAY;
+ sc->sc_irq_rman.rm_descr = "OMAP IRQs";
+ if (rman_init(&sc->sc_irq_rman) != 0 ||
+ rman_manage_region(&sc->sc_irq_rman, 0, NIRQ) != 0) {
+ panic("%s: failed to set up IRQ rman", __func__);
+ }
+
+ /* Setup the memory map based on initial device map in *_machdep.c */
+ sc->sc_mem_rman.rm_type = RMAN_ARRAY;
+ sc->sc_mem_rman.rm_descr = "OMAP Memory";
+
+ if (rman_init(&sc->sc_mem_rman) != 0)
+ panic("%s: failed to set up memory rman", __func__);
+
+ for (pdevmap = omap_devmap; pdevmap->pd_va != 0; pdevmap++) {
+ if (rman_manage_region(&sc->sc_mem_rman, pdevmap->pd_pa,
+ pdevmap->pd_pa + pdevmap->pd_size - 1) != 0) {
+ panic("%s: failed to set up memory regions", __func__);
+ }
+ }
+
+ /* The device list will be created by the 'cpu' device when it is identified */
+ bus_generic_probe(dev);
+ bus_generic_attach(dev);
+ enable_interrupts(I32_bit | F32_bit);
+ return (0);
+}
+
+/**
+ * omap_devmap_phys2virt
+ *
+ * This function will be called when bus_alloc_resource(...) if the memory
+ * region requested is in the range of the managed values set by
+ * rman_manage_region(...) above.
+ *
+ * For SYS_RES_MEMORY resource types the omap_attach() calls rman_manage_region
+ * with the list of pyshical mappings defined in the omap_devmap region map.
+ * However because we are working with physical addresses, we need to convert
+ * the physical to virtual within this function and return the virtual address
+ * in the bus tag field.
+ *
+ */
+static u_long
+omap_devmap_phys2virt(u_long pa)
+{
+ const struct pmap_devmap *pdevmap;
+
+ for (pdevmap = omap_devmap; pdevmap->pd_va != 0; pdevmap++) {
+ if ((pa >= pdevmap->pd_pa) && (pa < (pdevmap->pd_pa + pdevmap->pd_size))) {
+ return (pdevmap->pd_va + (pa - pdevmap->pd_pa));
+ }
+ }
+
+ panic("%s: failed to find addr mapping for 0x%08lx", __func__, pa);
+ return (0);
+}
+
+/**
+ * omap_alloc_resource
+ *
+ * This function will be called when bus_alloc_resource(...) if the memory
+ * region requested is in the range of the managed values set by
+ * rman_manage_region(...) above.
+ *
+ * For SYS_RES_MEMORY resource types the omap_attach() calls rman_manage_region
+ * with the list of pyshical mappings defined in the omap_devmap region map.
+ * However because we are working with physical addresses, we need to convert
+ * the physical to virtual within this function and return the virtual address
+ * in the bus tag field.
+ *
+ */
+static struct resource *
+omap_alloc_resource(device_t dev, device_t child, int type, int *rid,
+ u_long start, u_long end, u_long count, u_int flags)
+{
+ struct omap_softc *sc = device_get_softc(dev);
+ struct resource_list_entry *rle;
+ struct omap_ivar *ivar = device_get_ivars(child);
+ struct resource_list *rl = &ivar->resources;
+
+ /* If we aren't the parent pass it onto the actual parent */
+ if (device_get_parent(child) != dev) {
+ return (BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
+ type, rid, start, end, count, flags));
+ }
+
+ /* Find the resource in the list */
+ rle = resource_list_find(rl, type, *rid);
+ if (rle == NULL)
+ return (NULL);
+ if (rle->res)
+ panic("Resource rid %d type %d already in use", *rid, type);
+
+ if (start == 0UL && end == ~0UL) {
+ start = rle->start;
+ count = ulmax(count, rle->count);
+ end = ulmax(rle->end, start + count - 1);
+ }
+
+ switch (type)
+ {
+ case SYS_RES_IRQ:
+ rle->res = rman_reserve_resource(&sc->sc_irq_rman,
+ start, end, count, flags, child);
+ break;
+ case SYS_RES_MEMORY:
+ rle->res = rman_reserve_resource(&sc->sc_mem_rman,
+ start, end, count, flags, child);
+ if (rle->res != NULL) {
+ rman_set_bustag(rle->res, &omap_bs_tag);
+ rman_set_bushandle(rle->res, omap_devmap_phys2virt(start));
+ }
+ break;
+ }
+
+ if (rle->res) {
+ rle->start = rman_get_start(rle->res);
+ rle->end = rman_get_end(rle->res);
+ rle->count = count;
+ rman_set_rid(rle->res, *rid);
+ }
+ return (rle->res);
+}
+
+/**
+ * omap_get_resource_list
+ *
+ */
+static struct resource_list *
+omap_get_resource_list(device_t dev, device_t child)
+{
+ struct omap_ivar *ivar;
+
+ ivar = device_get_ivars(child);
+ return (&(ivar->resources));
+}
+
+/**
+ * omap_release_resource
+ *
+ */
+static int
+omap_release_resource(device_t dev, device_t child, int type, int rid,
+ struct resource *r)
+{
+ struct resource_list *rl;
+ struct resource_list_entry *rle;
+
+ rl = omap_get_resource_list(dev, child);
+ if (rl == NULL)
+ return (EINVAL);
+
+ rle = resource_list_find(rl, type, rid);
+ if (rle == NULL)
+ return (EINVAL);
+
+ rman_release_resource(r);
+ rle->res = NULL;
+ return (0);
+}
+
+/**
+ * omap_activate_resource
+ *
+ *
+ *
+ */
+static int
+omap_activate_resource(device_t dev, device_t child, int type, int rid,
+ struct resource *r)
+{
+
+#if 0
+ struct omap3_softc *sc = device_get_softc(dev);
+ const struct hwvtrans *vtrans;
+ uint32_t start = rman_get_start(r);
+ uint32_t size = rman_get_size(r);
+
+ if (type == SYS_RES_MEMORY) {
+ vtrans = omap3_gethwvtrans(start, size);
+ if (vtrans == NULL) { /* NB: should not happen */
+ device_printf(child, "%s: no mapping for 0x%lx:0x%lx\n",
+ __func__, start, size);
+ return (ENOENT);
+ }
+ rman_set_bustag(r, sc->sc_iot);
+ rman_set_bushandle(r, vtrans->vbase + (start - vtrans->hwbase));
+ }
+#endif
+ return (rman_activate_resource(r));
+}
+
+
+/**
+ * omap_deactivate_resource
+ *
+ */
+static int
+omap_deactivate_resource(device_t bus, device_t child, int type, int rid,
+ struct resource *r)
+{
+ /* NB: no private resources, just deactive */
+ return (rman_deactivate_resource(r));
+}
+
+static device_t
+omap_add_child(device_t bus, u_int order, const char *name, int unit)
+{
+ device_t child;
+ struct omap_ivar *ivar;
+
+ ivar = malloc(sizeof(struct omap_ivar), M_DEVBUF, M_NOWAIT|M_ZERO);
+ if (!ivar)
+ return (0);
+ resource_list_init(&ivar->resources);
+
+ child = device_add_child_ordered(bus, order, name, unit);
+ if (child == NULL) {
+ device_printf(bus, "failed to add child: %s%d\n", name, unit);
+ return (0);
+ }
+
+ /* should we free this in nexus_child_detached? */
+ device_set_ivars(child, ivar);
+
+ return (child);
+}
+
+
+
+/**
+ * omap_print_child
+ *
+ */
+static int
+omap_print_child(device_t dev, device_t child)
+{
+ struct omap_ivar *ivars;
+ struct resource_list *rl;
+ int retval = 0;
+
+ ivars = device_get_ivars(child);
+ rl = &ivars->resources;
+
+ retval += bus_print_child_header(dev, child);
+
+ retval += resource_list_print_type(rl, "port", SYS_RES_IOPORT, "%#lx");
+ retval += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#lx");
+ retval += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%ld");
+ if (device_get_flags(dev))
+ retval += printf(" flags %#x", device_get_flags(dev));
+
+ retval += bus_print_child_footer(dev, child);
+
+ return (retval);
+}
+
+/**
+ * omap_setup_intr - initialises and unmasks the IRQ.
+ *
+ * RETURNS:
+ * 0 on success
+ */
+int
+omap_setup_intr(device_t dev, device_t child,
+ struct resource *res, int flags, driver_filter_t *filt,
+ driver_intr_t *intr, void *arg, void **cookiep)
+{
+ unsigned int i;
+
+ BUS_SETUP_INTR(device_get_parent(dev), child, res, flags, filt, intr,
+ arg, cookiep);
+
+ /* Enable all the interrupts in the range ... will probably be only one */
+ for (i = rman_get_start(res); (i < NIRQ) && (i <= rman_get_end(res)); i++) {
+ arm_unmask_irq(i);
+ }
+
+ return (0);
+}
+
+/**
+ * omap_teardown_intr
+ *
+ * RETURNS:
+ * 0 on success
+ */
+int
+omap_teardown_intr(device_t dev, device_t child, struct resource *res,
+ void *cookie)
+{
+ unsigned int i;
+
+ /* Mask (disable) all the interrupts in the range ... will probably be only one */
+ for (i = rman_get_start(res); (i < NIRQ) && (i <= rman_get_end(res)); i++) {
+ arm_mask_irq(i);
+ }
+
+ return (BUS_TEARDOWN_INTR(device_get_parent(dev), child, res, cookie));
+}
+
+
+
+static device_method_t omap_methods[] = {
+ /* Device interface */
+ DEVMETHOD(device_probe, omap_probe),
+ DEVMETHOD(device_attach, omap_attach),
+ DEVMETHOD(device_identify, omap_identify),
+
+ /* Bus interface */
+ DEVMETHOD(bus_alloc_resource, omap_alloc_resource),
+ DEVMETHOD(bus_activate_resource, omap_activate_resource),
+ DEVMETHOD(bus_deactivate_resource, omap_deactivate_resource),
+ DEVMETHOD(bus_get_resource_list, omap_get_resource_list),
+ DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource),
+ DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
+ DEVMETHOD(bus_release_resource, omap_release_resource),
+
+ DEVMETHOD(bus_setup_intr, omap_setup_intr),
+ DEVMETHOD(bus_teardown_intr, omap_teardown_intr),
+
+ DEVMETHOD(bus_add_child, omap_add_child),
+ DEVMETHOD(bus_print_child, omap_print_child),
+
+ {0, 0},
+};
+
+static driver_t omap_driver = {
+ "omap",
+ omap_methods,
+ sizeof(struct omap_softc),
+};
+static devclass_t omap_devclass;
+
+DRIVER_MODULE(omap, nexus, omap_driver, omap_devclass, 0, 0);
Added: projects/armv6/sys/arm/omap/omap3/omap35xx_reg.h
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ projects/armv6/sys/arm/omap/omap3/omap35xx_reg.h Fri Jan 20 05:05:47 2012 (r230362)
@@ -0,0 +1,778 @@
+/*-
+ * Copyright (c) 2011
+ * Ben Gray <ben.r.gray at gmail.com>.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*
+ * Texas Instruments - OMAP3xxx series processors
+ *
+ * Reference:
+ * OMAP35x Applications Processor
+ * Technical Reference Manual
+ * (omap35xx_techref.pdf)
+ *
+ *
+ * Note:
+ * The devices are mapped into address above 0xD000_0000 as the kernel space
+ * memory is at 0xC000_0000 and above. The first 256MB after this is reserved
+ * for the size of the kernel, everything above that is reserved for SoC
+ * devices.
+ *
+ */
+#ifndef _OMAP35XX_REG_H_
+#define _OMAP35XX_REG_H_
+
+#ifndef _LOCORE
+#include <sys/types.h> /* for uint32_t */
+#endif
+
+
+
+
+#define OMAP35XX_SDRAM0_START 0x80000000UL
+#define OMAP35XX_SDRAM1_START 0xA0000000UL
+#define OMAP35XX_SDRAM_BANKS 2
+#define OMAP35XX_SDRAM_BANK_SIZE 0x20000000UL
+
+
+/* Physical/Virtual address for SDRAM controller */
+
+#define OMAP35XX_SMS_VBASE 0x6C000000UL
+#define OMAP35XX_SMS_HWBASE 0x6C000000UL
+#define OMAP35XX_SMS_SIZE 0x01000000UL
+
+#define OMAP35XX_SDRC_VBASE 0x6D000000UL
+#define OMAP35XX_SDRC_HWBASE 0x6D000000UL
+#define OMAP35XX_SDRC_SIZE 0x01000000UL
+
+
+
+/* Physical/Virtual address for I/O space */
+
+#define OMAP35XX_L3_VBASE 0xD0000000UL
+#define OMAP35XX_L3_HWBASE 0x68000000UL
+#define OMAP35XX_L3_SIZE 0x01000000UL
+
+#define OMAP35XX_L4_CORE_VBASE 0xE8000000UL
+#define OMAP35XX_L4_CORE_HWBASE 0x48000000UL
+#define OMAP35XX_L4_CORE_SIZE 0x01000000UL
+
+#define OMAP35XX_L4_WAKEUP_VBASE 0xE8300000UL
+#define OMAP35XX_L4_WAKEUP_HWBASE 0x48300000UL
+#define OMAP35XX_L4_WAKEUP_SIZE 0x00040000UL
+
+#define OMAP35XX_L4_PERIPH_VBASE 0xE9000000UL
+#define OMAP35XX_L4_PERIPH_HWBASE 0x49000000UL
+#define OMAP35XX_L4_PERIPH_SIZE 0x00100000UL
+
+
+/*
+ * L4-CORE Physical/Virtual addresss offsets
+ */
+#define OMAP35XX_SCM_OFFSET 0x00002000UL
+#define OMAP35XX_CM_OFFSET 0x00004000UL
+#define OMAP35XX_SDMA_OFFSET 0x00056000UL
+#define OMAP35XX_I2C3_OFFSET 0x00060000UL
+#define OMAP35XX_USB_TLL_OFFSET 0x00062000UL
+#define OMAP35XX_USB_UHH_OFFSET 0x00064000UL
+#define OMAP35XX_USB_EHCI_OFFSET 0x00064800UL
+
+
+#define OMAP35XX_UART1_OFFSET 0x0006A000UL
+#define OMAP35XX_UART2_OFFSET 0x0006C000UL
+#define OMAP35XX_I2C1_OFFSET 0x00070000UL
+#define OMAP35XX_I2C2_OFFSET 0x00072000UL
+#define OMAP35XX_MCBSP1_OFFSET 0x00074000UL
+#define OMAP35XX_GPTIMER10_OFFSET 0x00086000UL
+#define OMAP35XX_GPTIMER11_OFFSET 0x00088000UL
+#define OMAP35XX_MCBSP5_OFFSET 0x00096000UL
+#define OMAP35XX_MMU1_OFFSET 0x000BD400UL
+#define OMAP35XX_INTCPS_OFFSET 0x00200000UL
+
+
+/*
+ * L4-WAKEUP Physical/Virtual addresss offsets
+ */
+#define OMAP35XX_PRM_OFFSET 0x00006000UL
+#define OMAP35XX_GPIO1_OFFSET 0x00010000UL
+#define OMAP35XX_GPTIMER1_OFFSET 0x00018000UL
+
+
+
+/*
+ * L4-PERIPH Physical/Virtual addresss offsets
+ */
+#define OMAP35XX_UART3_OFFSET 0x00020000UL
+#define OMAP35XX_MCBSP2_OFFSET 0x00022000UL
+#define OMAP35XX_MCBSP3_OFFSET 0x00024000UL
+#define OMAP35XX_MCBSP4_OFFSET 0x00026000UL
+#define OMAP35XX_SIDETONE_MCBSP2_OFFSET 0x00028000UL
+#define OMAP35XX_SIDETONE_MCBSP3_OFFSET 0x0002A000UL
+#define OMAP35XX_GPTIMER2_OFFSET 0x00032000UL
+#define OMAP35XX_GPTIMER3_OFFSET 0x00034000UL
+#define OMAP35XX_GPTIMER4_OFFSET 0x00036000UL
+#define OMAP35XX_GPTIMER5_OFFSET 0x00038000UL
+#define OMAP35XX_GPTIMER6_OFFSET 0x0003A000UL
+#define OMAP35XX_GPTIMER7_OFFSET 0x0003C000UL
+#define OMAP35XX_GPTIMER8_OFFSET 0x0003E000UL
+#define OMAP35XX_GPTIMER9_OFFSET 0x00040000UL
+#define OMAP35XX_GPIO2_OFFSET 0x00050000UL
+#define OMAP35XX_GPIO3_OFFSET 0x00052000UL
+#define OMAP35XX_GPIO4_OFFSET 0x00054000UL
+#define OMAP35XX_GPIO5_OFFSET 0x00056000UL
+#define OMAP35XX_GPIO6_OFFSET 0x00058000UL
+
+
+
+
+
+
+/*
+ * System Control Module
+ */
+#define OMAP35XX_SCM_HWBASE (OMAP35XX_L4_CORE_HWBASE + OMAP35XX_SCM_OFFSET)
+#define OMAP35XX_SCM_VBASE (OMAP35XX_L4_CORE_VBASE + OMAP35XX_SCM_OFFSET)
+#define OMAP35XX_SCM_SIZE 0x00001000UL
+
+#define OMAP35XX_SCM_REVISION 0x00000000UL
+#define OMAP35XX_SCM_SYSCONFIG 0x00000010UL
+#define OMAP35XX_SCM_PADCONFS_BASE 0x00000030UL
+#define OMAP35XX_SCM_DEVCONF0 0x00000274UL
+#define OMAP35XX_SCM_MEM_DFTRW0 0x00000278UL
+
+
+
+
+/*
+ *
+ */
+#define OMAP35XX_CM_HWBASE (OMAP35XX_L4_CORE_HWBASE + OMAP35XX_CM_OFFSET)
+#define OMAP35XX_CM_VBASE (OMAP35XX_L4_CORE_VBASE + OMAP35XX_CM_OFFSET)
+#define OMAP35XX_CM_SIZE 0x00001500UL
+
+#define OMAP35XX_CM_CORE_OFFSET 0x00000A00UL
+#define OMAP35XX_CM_CORE_SIZE 0x00000100UL
+#define OMAP35XX_CM_FCLKEN1_CORE (OMAP35XX_CM_CORE_OFFSET + 0x0000UL)
+#define OMAP35XX_CM_FCLKEN3_CORE (OMAP35XX_CM_CORE_OFFSET + 0x0008UL)
+#define OMAP35XX_CM_ICLKEN1_CORE (OMAP35XX_CM_CORE_OFFSET + 0x0010UL)
+#define OMAP35XX_CM_ICLKEN2_CORE (OMAP35XX_CM_CORE_OFFSET + 0x0014UL)
+#define OMAP35XX_CM_ICLKEN3_CORE (OMAP35XX_CM_CORE_OFFSET + 0x0018UL)
+#define OMAP35XX_CM_IDLEST1_CORE (OMAP35XX_CM_CORE_OFFSET + 0x0020UL)
+#define OMAP35XX_CM_IDLEST2_CORE (OMAP35XX_CM_CORE_OFFSET + 0x0024UL)
+#define OMAP35XX_CM_IDLEST3_CORE (OMAP35XX_CM_CORE_OFFSET + 0x0028UL)
+#define OMAP35XX_CM_AUTOIDLE1_CORE (OMAP35XX_CM_CORE_OFFSET + 0x0030UL)
+#define OMAP35XX_CM_AUTOIDLE2_CORE (OMAP35XX_CM_CORE_OFFSET + 0x0034UL)
+#define OMAP35XX_CM_AUTOIDLE3_CORE (OMAP35XX_CM_CORE_OFFSET + 0x0038UL)
+#define OMAP35XX_CM_CLKSEL_CORE (OMAP35XX_CM_CORE_OFFSET + 0x0040UL)
+#define OMAP35XX_CM_CLKSTCTRL_CORE (OMAP35XX_CM_CORE_OFFSET + 0x0048UL)
+#define OMAP35XX_CM_CLKSTST_CORE (OMAP35XX_CM_CORE_OFFSET + 0x004CUL)
+
+#define OMAP35XX_CM_WKUP_OFFSET 0x00000C00UL
+#define OMAP35XX_CM_WKUP_SIZE 0x00000100UL
+#define OMAP35XX_CM_FCLKEN_WKUP (OMAP35XX_CM_WKUP_OFFSET + 0x0000UL)
+#define OMAP35XX_CM_ICLKEN_WKUP (OMAP35XX_CM_WKUP_OFFSET + 0x0010UL)
+#define OMAP35XX_CM_IDLEST_WKUP (OMAP35XX_CM_WKUP_OFFSET + 0x0020UL)
+#define OMAP35XX_CM_AUTOIDLE_WKUP (OMAP35XX_CM_WKUP_OFFSET + 0x0030UL)
+#define OMAP35XX_CM_CLKSEL_WKUP (OMAP35XX_CM_WKUP_OFFSET + 0x0040UL)
+
+#define OMAP35XX_CM_PLL_OFFSET 0x00000D00UL
+#define OMAP35XX_CM_PLL_SIZE 0x00000100UL
+#define OMAP35XX_CM_CLKEN_PLL (OMAP35XX_CM_PLL_OFFSET + 0x0000UL)
+#define OMAP35XX_CM_CLKEN2_PLL (OMAP35XX_CM_PLL_OFFSET + 0x0004UL)
+#define OMAP35XX_CM_IDLEST_CKGEN (OMAP35XX_CM_PLL_OFFSET + 0x0020UL)
+#define OMAP35XX_CM_IDLEST2_CKGEN (OMAP35XX_CM_PLL_OFFSET + 0x0024UL)
+#define OMAP35XX_CM_AUTOIDLE_PLL (OMAP35XX_CM_PLL_OFFSET + 0x0030UL)
+#define OMAP35XX_CM_AUTOIDLE2_PLL (OMAP35XX_CM_PLL_OFFSET + 0x0034UL)
+#define OMAP35XX_CM_CLKSEL1_PLL (OMAP35XX_CM_PLL_OFFSET + 0x0040UL)
+#define OMAP35XX_CM_CLKSEL2_PLL (OMAP35XX_CM_PLL_OFFSET + 0x0044UL)
+#define OMAP35XX_CM_CLKSEL3_PLL (OMAP35XX_CM_PLL_OFFSET + 0x0048UL)
+#define OMAP35XX_CM_CLKSEL4_PLL (OMAP35XX_CM_PLL_OFFSET + 0x004CUL)
+#define OMAP35XX_CM_CLKSEL5_PLL (OMAP35XX_CM_PLL_OFFSET + 0x0050UL)
+#define OMAP35XX_CM_CLKOUT_CTRL (OMAP35XX_CM_PLL_OFFSET + 0x0070UL)
+
+#define OMAP35XX_CM_PER_OFFSET 0x00001000UL
+#define OMAP35XX_CM_PER_SIZE 0x00000100UL
+#define OMAP35XX_CM_FCLKEN_PER (OMAP35XX_CM_PER_OFFSET + 0x0000UL)
+#define OMAP35XX_CM_ICLKEN_PER (OMAP35XX_CM_PER_OFFSET + 0x0010UL)
+#define OMAP35XX_CM_IDLEST_PER (OMAP35XX_CM_PER_OFFSET + 0x0020UL)
+#define OMAP35XX_CM_AUTOIDLE_PER (OMAP35XX_CM_PER_OFFSET + 0x0030UL)
+#define OMAP35XX_CM_CLKSEL_PER (OMAP35XX_CM_PER_OFFSET + 0x0040UL)
+#define OMAP35XX_CM_SLEEPDEP_PER (OMAP35XX_CM_PER_OFFSET + 0x0044UL)
+#define OMAP35XX_CM_CLKSTCTRL_PER (OMAP35XX_CM_PER_OFFSET + 0x0048UL)
+#define OMAP35XX_CM_CLKSTST_PER (OMAP35XX_CM_PER_OFFSET + 0x004CUL)
+
+#define OMAP35XX_CM_USBHOST_OFFSET 0x00001400UL
+#define OMAP35XX_CM_USBHOST_SIZE 0x00000100UL
+#define OMAP35XX_CM_FCLKEN_USBHOST (OMAP35XX_CM_USBHOST_OFFSET + 0x0000UL)
+#define OMAP35XX_CM_ICLKEN_USBHOST (OMAP35XX_CM_USBHOST_OFFSET + 0x0010UL)
+#define OMAP35XX_CM_IDLEST_USBHOST (OMAP35XX_CM_USBHOST_OFFSET + 0x0020UL)
+#define OMAP35XX_CM_AUTOIDLE_USBHOST (OMAP35XX_CM_USBHOST_OFFSET + 0x0030UL)
+#define OMAP35XX_CM_SLEEPDEP_USBHOST (OMAP35XX_CM_USBHOST_OFFSET + 0x0044UL)
+#define OMAP35XX_CM_CLKSTCTRL_USBHOST (OMAP35XX_CM_USBHOST_OFFSET + 0x0048UL)
+#define OMAP35XX_CM_CLKSTST_USBHOST (OMAP35XX_CM_USBHOST_OFFSET + 0x004CUL)
+
+
+
+
+/*
+ *
+ */
+#define OMAP35XX_PRM_HWBASE (OMAP35XX_L4_WAKEUP_HWBASE + OMAP35XX_PRM_OFFSET)
+#define OMAP35XX_PRM_VBASE (OMAP35XX_L4_WAKEUP_VBASE + OMAP35XX_PRM_OFFSET)
+#define OMAP35XX_PRM_SIZE 0x00001600UL
+
+#define OMAP35XX_PRM_CLKCTRL_OFFSET 0x00000D00UL
+#define OMAP35XX_PRM_CLKCTRL_SIZE 0x00000100UL
+#define OMAP35XX_PRM_CLKSEL (OMAP35XX_PRM_CLKCTRL_OFFSET + 0x0040UL)
+#define OMAP35XX_PRM_CLKOUT_CTRL (OMAP35XX_PRM_CLKCTRL_OFFSET + 0x0070UL)
+
+#define OMAP35XX_PRM_GLOBAL_OFFSET 0x00001200UL
+#define OMAP35XX_PRM_GLOBAL_SIZE 0x00000100UL
+#define OMAP35XX_PRM_CLKSRC_CTRL (OMAP35XX_PRM_GLOBAL_OFFSET + 0x0070UL)
+
+
+
+
+
+/*
+ * Uarts
+ */
+#define OMAP35XX_UART1_HWBASE (OMAP35XX_L4_CORE_HWBASE + OMAP35XX_UART1_OFFSET)
+#define OMAP35XX_UART1_VBASE (OMAP35XX_L4_CORE_VBASE + OMAP35XX_UART1_OFFSET)
+#define OMAP35XX_UART1_SIZE 0x00001000UL
+
+#define OMAP35XX_UART2_HWBASE (OMAP35XX_L4_CORE_HWBASE + OMAP35XX_UART2_OFFSET)
+#define OMAP35XX_UART2_VBASE (OMAP35XX_L4_CORE_VBASE + OMAP35XX_UART2_OFFSET)
+#define OMAP35XX_UART2_SIZE 0x00001000UL
+
+#define OMAP35XX_UART3_HWBASE (OMAP35XX_L4_PERIPH_HWBASE + OMAP35XX_UART3_OFFSET)
+#define OMAP35XX_UART3_VBASE (OMAP35XX_L4_PERIPH_VBASE + OMAP35XX_UART3_OFFSET)
+#define OMAP35XX_UART3_SIZE 0x00001000UL
+
+
+
+
+/*
+ * I2C Modules
+ */
+#define OMAP35XX_I2C1_HWBASE (OMAP35XX_L4_CORE_HWBASE + OMAP35XX_I2C1_OFFSET)
+#define OMAP35XX_I2C1_VBASE (OMAP35XX_L4_CORE_VBASE + OMAP35XX_I2C1_OFFSET)
+#define OMAP35XX_I2C1_SIZE 0x00000080UL
+
+#define OMAP35XX_I2C2_HWBASE (OMAP35XX_L4_CORE_HWBASE + OMAP35XX_I2C2_OFFSET)
+#define OMAP35XX_I2C2_VBASE (OMAP35XX_L4_CORE_VBASE + OMAP35XX_I2C2_OFFSET)
+#define OMAP35XX_I2C2_SIZE 0x00000080UL
+
+#define OMAP35XX_I2C3_HWBASE (OMAP35XX_L4_CORE_HWBASE + OMAP35XX_I2C3_OFFSET)
+#define OMAP35XX_I2C3_VBASE (OMAP35XX_L4_CORE_VBASE + OMAP35XX_I2C3_OFFSET)
+#define OMAP35XX_I2C3_SIZE 0x00000080UL
+
*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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