svn commit: r233965 - in projects/armv6/sys: arm/ti/am335x
boot/fdt/dts
Damjan Marion
dmarion at FreeBSD.org
Fri Apr 6 22:51:03 UTC 2012
Author: dmarion
Date: Fri Apr 6 22:51:02 2012
New Revision: 233965
URL: http://svn.freebsd.org/changeset/base/233965
Log:
pinmux and clocks for MMC controllers on AM335x
Modified:
projects/armv6/sys/arm/ti/am335x/am335x_prcm.c
projects/armv6/sys/arm/ti/am335x/am335x_scm_padconf.c
projects/armv6/sys/boot/fdt/dts/beaglebone.dts
Modified: projects/armv6/sys/arm/ti/am335x/am335x_prcm.c
==============================================================================
--- projects/armv6/sys/arm/ti/am335x/am335x_prcm.c Fri Apr 6 22:33:13 2012 (r233964)
+++ projects/armv6/sys/arm/ti/am335x/am335x_prcm.c Fri Apr 6 22:51:02 2012 (r233965)
@@ -61,6 +61,7 @@ __FBSDID("$FreeBSD$");
#define CM_PER_CPGMAC0_CLKCTRL (CM_PER + 0x014)
#define CM_PER_USB0_CLKCTRL (CM_PER + 0x01C)
#define CM_PER_TPTC0_CLKCTRL (CM_PER + 0x024)
+#define CM_PER_MMC0_CLKCTRL (CM_PER + 0x03C)
#define CM_PER_I2C2_CLKCTRL (CM_PER + 0x044)
#define CM_PER_I2C1_CLKCTRL (CM_PER + 0x048)
#define CM_PER_TIMER7_CLKCTRL (CM_PER + 0x07C)
@@ -75,6 +76,8 @@ __FBSDID("$FreeBSD$");
#define CM_PER_L3_CLKCTRL (CM_PER + 0x0E0)
#define CM_PER_TIMER5_CLKCTRL (CM_PER + 0x0EC)
#define CM_PER_TIMER6_CLKCTRL (CM_PER + 0x0F0)
+#define CM_PER_MMC1_CLKCTRL (CM_PER + 0x0F4)
+#define CM_PER_MMC2_CLKCTRL (CM_PER + 0x0F8)
#define CM_PER_TPTC1_CLKCTRL (CM_PER + 0x0FC)
#define CM_PER_TPTC2_CLKCTRL (CM_PER + 0x100)
#define CM_PER_OCPWP_L3_CLKSTCTRL (CM_PER + 0x12C)
@@ -117,6 +120,7 @@ static struct am335x_prcm_softc *am335x_
static int am335x_clk_generic_activate(struct ti_clock_dev *clkdev);
static int am335x_clk_generic_deactivate(struct ti_clock_dev *clkdev);
static int am335x_clk_generic_set_source(struct ti_clock_dev *clkdev, clk_src_t clksrc);
+static int am335x_clk_hsmmc_get_source_freq(struct ti_clock_dev *clkdev, unsigned int *freq);
static int am335x_clk_get_sysclk_freq(struct ti_clock_dev *clkdev, unsigned int *freq);
static int am335x_clk_get_arm_fclk_freq(struct ti_clock_dev *clkdev, unsigned int *freq);
static void am335x_prcm_reset(void);
@@ -132,6 +136,15 @@ static int am335x_clk_musb0_activate(str
.clk_get_source_freq = NULL \
}
+#define AM335X_MMCHS_CLOCK_DEV(i) \
+ { .id = (i), \
+ .clk_activate = am335x_clk_generic_activate, \
+ .clk_deactivate = am335x_clk_generic_deactivate, \
+ .clk_set_source = am335x_clk_generic_set_source, \
+ .clk_accessible = NULL, \
+ .clk_get_source_freq = am335x_clk_hsmmc_get_source_freq \
+ }
+
struct ti_clock_dev ti_clk_devmap[] = {
/* System clocks */
{ .id = SYS_CLK,
@@ -192,6 +205,11 @@ struct ti_clock_dev ti_clk_devmap[] = {
AM335X_GENERIC_CLOCK_DEV(EDMA_TPTC1_CLK),
AM335X_GENERIC_CLOCK_DEV(EDMA_TPTC2_CLK),
+ /* MMCHS */
+ AM335X_MMCHS_CLOCK_DEV(MMC0_CLK),
+ AM335X_MMCHS_CLOCK_DEV(MMC1_CLK),
+ AM335X_MMCHS_CLOCK_DEV(MMC2_CLK),
+
{ INVALID_CLK_IDENT, NULL, NULL, NULL, NULL }
};
@@ -234,6 +252,11 @@ static struct am335x_clk_details g_am335
_CLK_DETAIL(EDMA_TPTC1_CLK, CM_PER_TPTC1_CLKCTRL, 0),
_CLK_DETAIL(EDMA_TPTC2_CLK, CM_PER_TPTC2_CLKCTRL, 0),
+ /* MMCHS modules*/
+ _CLK_DETAIL(MMC0_CLK, CM_PER_MMC0_CLKCTRL, 0),
+ _CLK_DETAIL(MMC1_CLK, CM_PER_MMC1_CLKCTRL, 0),
+ _CLK_DETAIL(MMC2_CLK, CM_PER_MMC1_CLKCTRL, 0),
+
{ INVALID_CLK_IDENT, 0},
};
@@ -248,9 +271,6 @@ void am335x_prcm_setup_dmtimer(int);
static int
am335x_prcm_probe(device_t dev)
{
- struct am335x_prcm_softc *sc;
- sc = (struct am335x_prcm_softc *)device_get_softc(dev);
-
if (ofw_bus_is_compatible(dev, "am335x,prcm")) {
device_set_desc(dev, "AM335x Power and Clock Management");
return(BUS_PROBE_DEFAULT);
@@ -399,6 +419,13 @@ am335x_clk_generic_set_source(struct ti_
}
static int
+am335x_clk_hsmmc_get_source_freq(struct ti_clock_dev *clkdev, unsigned int *freq)
+{
+ *freq = 96000000;
+ return (0);
+}
+
+static int
am335x_clk_get_sysclk_freq(struct ti_clock_dev *clkdev, unsigned int *freq)
{
uint32_t ctrl_status;
Modified: projects/armv6/sys/arm/ti/am335x/am335x_scm_padconf.c
==============================================================================
--- projects/armv6/sys/arm/ti/am335x/am335x_scm_padconf.c Fri Apr 6 22:33:13 2012 (r233964)
+++ projects/armv6/sys/arm/ti/am335x/am335x_scm_padconf.c Fri Apr 6 22:51:02 2012 (r233965)
@@ -140,13 +140,13 @@ const struct ti_scm_padconf ti_padconf_d
_PIN(0x8e4, "lcd_hsync", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),
_PIN(0x8e8, "lcd_pclk", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),
_PIN(0x8ec, "lcd_ac_bias_en", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),
- _PIN(0x8f0, "mmc0_dat3", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),
- _PIN(0x8f4, "mmc0_dat2", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),
- _PIN(0x8f8, "mmc0_dat1", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),
- _PIN(0x8fc, "mmc0_dat0", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),
- _PIN(0x900, "mmc0_clk", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),
- _PIN(0x904, "mmc0_cmd", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL),
#endif
+ _PIN(0x8f0, "MMC0_DAT3", 90, 7, "mmc0_dat3", "gpmc_a20", "uart4_ctsn", "timer5", "uart1_dcdn", "pr1_pru0_pru_r30_8", "pr1_pru0_pru_r31_8", "gpio2_26"),
+ _PIN(0x8f4, "MMC0_DAT2", 91, 7, "mmc0_dat2", "gpmc_a21", "uart4_rtsn", "timer6", "uart1_dsrn", "pr1_pru0_pru_r30_9", "pr1_pru0_pru_r31_9", "gpio2_27"),
+ _PIN(0x8f8, "MMC0_DAT1", 92, 7, "mmc0_dat1", "gpmc_a22", "uart5_ctsn", "uart3_rxd", "uart1_dtrn", "pr1_pru0_pru_r30_10", "pr1_pru0_pru_r31_10", "gpio2_28"),
+ _PIN(0x8fc, "MMC0_DAT0", 93, 7, "mmc0_dat0", "gpmc_a23", "uart5_rtsn", "uart3_txd", "uart1_rin", "pr1_pru0_pru_r30_11", "pr1_pru0_pru_r31_11", "gpio2_29"),
+ _PIN(0x900, "MMC0_CLK", 94, 7, "mmc0_clk", "gpmc_a24", "uart3_ctsn", "uart2_rxd", "dcan1_tx", "pr1_pru0_pru_r30_12", "pr1_pru0_pru_r31_12", "gpio2_30"),
+ _PIN(0x904, "MMC0_CMD", 95, 7, "mmc0_cmd", "gpmc_a25", "uart3_rtsn", "uart2_txd", "dcan1_rx", "pr1_pru0_pru_r30_13", "pr1_pru0_pru_r31_13", "gpio2_31"),
_PIN(0x908, "MII1_COL", 96, 7, "gmii1_col", "rmii2_refclk", "spi1_sclk", "uart5_rxd", "mcasp1_axr2", "mmc2_dat3", "mcasp0_axr2", "gpio3_0"),
_PIN(0x90c, "MII1_CRS", 97, 7, "gmii1_crs", "rmii1_crs_dv", "spi1_d0", "I2C1_SDA", "mcasp1_aclkx", "uart5_ctsn", "uart2_rxd", "gpio3_1"),
_PIN(0x910, "MII1_RX_ER", 98, 7, "gmii1_rxerr", "rmii1_rxerr", "spi1_d1", "I2C1_SCL", "mcasp1_fsx", "uart5_rtsn", "uart2_txd", "gpio3_2"),
Modified: projects/armv6/sys/boot/fdt/dts/beaglebone.dts
==============================================================================
--- projects/armv6/sys/boot/fdt/dts/beaglebone.dts Fri Apr 6 22:33:13 2012 (r233964)
+++ projects/armv6/sys/boot/fdt/dts/beaglebone.dts Fri Apr 6 22:51:02 2012 (r233965)
@@ -82,7 +82,14 @@
"MII1_RXD1", "gmii1_rxd1", "input",
"MII1_RXD0", "gmii1_rxd0", "input",
"MDIO", "mdio_data", "input_pullup_inact",
- "MDC", "mdio_clk", "output_pullup";
+ "MDC", "mdio_clk", "output_pullup",
+ /* MMCSD0 */
+ "MMC0_CMD", "mmc0_cmd", "input_pullup_inact",
+ "MMC0_CLK", "mmc0_clk", "input_pullup_inact",
+ "MMC0_DAT0", "mmc0_dat0", "input_pullup_inact",
+ "MMC0_DAT1", "mmc0_dat1", "input_pullup_inact",
+ "MMC0_DAT2", "mmc0_dat2", "input_pullup_inact",
+ "MMC0_DAT3", "mmc0_dat3", "input_pullup_inact";
};
prcm at 44E00000 {
@@ -118,6 +125,7 @@
0x481AE000 0x1000 >;
interrupts = < 17 19 21 23 >;
interrupt-parent = <&AINTC>;
+ mmchs-device-id = <0>;
};
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