svn commit: r219506 - in projects/sv: contrib/gcc contrib/gcc/config/i386 contrib/gcc/doc contrib/gdb/gdb contrib/libpcap contrib/top contrib/tzdata include lib/libc/stdlib lib/libpam/modules/pam_s...

Attilio Rao attilio at FreeBSD.org
Fri Mar 11 16:30:31 UTC 2011 

Author: attilio
Date: Fri Mar 11 16:30:30 2011
New Revision: 219506
URL: http://svn.freebsd.org/changeset/base/219506

Log:
  MFC

Added:
  projects/sv/contrib/gcc/config/i386/geode.md
     - copied unchanged from r219503, head/contrib/gcc/config/i386/geode.md
  projects/sv/sys/dev/ath/ath_hal/ah_regdomain/
     - copied from r219503, head/sys/dev/ath/ath_hal/ah_regdomain/
  projects/sv/sys/dev/ath/ath_hal/ah_regdomain.h
     - copied unchanged from r219503, head/sys/dev/ath/ath_hal/ah_regdomain.h
  projects/sv/sys/dev/ath/ath_hal/ar9002/ar9002phy.h
     - copied unchanged from r219503, head/sys/dev/ath/ath_hal/ar9002/ar9002phy.h
  projects/sv/sys/dev/ath/ath_hal/ar9002/ar9280_olc.c
     - copied unchanged from r219503, head/sys/dev/ath/ath_hal/ar9002/ar9280_olc.c
  projects/sv/sys/dev/ath/ath_hal/ar9002/ar9280_olc.h
     - copied unchanged from r219503, head/sys/dev/ath/ath_hal/ar9002/ar9280_olc.h
  projects/sv/sys/dev/ath/ath_hal/ar9002/ar9285_cal.c
     - copied unchanged from r219503, head/sys/dev/ath/ath_hal/ar9002/ar9285_cal.c
  projects/sv/sys/dev/ath/ath_hal/ar9002/ar9285_cal.h
     - copied unchanged from r219503, head/sys/dev/ath/ath_hal/ar9002/ar9285_cal.h
  projects/sv/sys/dev/ath/ath_hal/ar9002/ar9285phy.h
     - copied unchanged from r219503, head/sys/dev/ath/ath_hal/ar9002/ar9285phy.h
  projects/sv/tools/regression/bin/sh/builtins/dot3.0
     - copied unchanged from r219503, head/tools/regression/bin/sh/builtins/dot3.0
  projects/sv/tools/regression/pjdfstest/tests/ftruncate/
     - copied from r219503, head/tools/regression/pjdfstest/tests/ftruncate/
Deleted:
  projects/sv/sbin/bsdlabel/bsdlabel.5
  projects/sv/sbin/bsdlabel/runtest.sh
Modified:
  projects/sv/contrib/gcc/config.gcc
  projects/sv/contrib/gcc/config/i386/i386.c
  projects/sv/contrib/gcc/config/i386/i386.h
  projects/sv/contrib/gcc/config/i386/i386.md
  projects/sv/contrib/gcc/doc/gcc.1
  projects/sv/contrib/gcc/doc/invoke.texi
  projects/sv/contrib/gdb/gdb/i386-tdep.c
  projects/sv/contrib/libpcap/inet.c
  projects/sv/contrib/tzdata/leapseconds
  projects/sv/contrib/tzdata/northamerica
  projects/sv/contrib/tzdata/southamerica
  projects/sv/contrib/tzdata/zone.tab
  projects/sv/include/complex.h
  projects/sv/lib/libc/stdlib/malloc.3
  projects/sv/lib/libpam/modules/pam_ssh/pam_ssh.c
  projects/sv/libexec/rtld-elf/powerpc64/reloc.c
  projects/sv/release/Makefile.bsdinstall
  projects/sv/sbin/bsdlabel/Makefile
  projects/sv/sbin/bsdlabel/bsdlabel.8
  projects/sv/sbin/bsdlabel/bsdlabel.c
  projects/sv/sbin/geom/class/eli/geli.8
  projects/sv/sbin/geom/class/part/geom_part.c
  projects/sv/sbin/geom/class/part/gpart.8
  projects/sv/sbin/hastd/pjdlog.c
  projects/sv/sbin/hastd/primary.c
  projects/sv/sbin/hastd/secondary.c
  projects/sv/share/examples/etc/make.conf
  projects/sv/share/man/man4/u3g.4
  projects/sv/share/man/man4/uark.4
  projects/sv/share/man/man4/ubsa.4
  projects/sv/share/man/man4/uchcom.4
  projects/sv/share/man/man4/ufoma.4
  projects/sv/share/man/man4/uftdi.4
  projects/sv/share/man/man4/uipaq.4
  projects/sv/share/man/man4/umct.4
  projects/sv/share/man/man4/umodem.4
  projects/sv/share/man/man4/uplcom.4
  projects/sv/share/man/man4/uslcom.4
  projects/sv/share/man/man4/uvisor.4
  projects/sv/share/man/man4/uvscom.4
  projects/sv/share/misc/committers-doc.dot
  projects/sv/share/misc/committers-src.dot
  projects/sv/share/mk/bsd.cpu.mk
  projects/sv/sys/amd64/amd64/elf_machdep.c
  projects/sv/sys/amd64/amd64/identcpu.c
  projects/sv/sys/amd64/amd64/machdep.c
  projects/sv/sys/amd64/amd64/prof_machdep.c
  projects/sv/sys/amd64/conf/GENERIC
  projects/sv/sys/amd64/include/clock.h
  projects/sv/sys/amd64/linux32/linux32_sysvec.c
  projects/sv/sys/arm/arm/elf_machdep.c
  projects/sv/sys/boot/common/ufsread.c
  projects/sv/sys/boot/i386/boot2/boot2.c
  projects/sv/sys/boot/i386/gptboot/Makefile
  projects/sv/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_vnops.c
  projects/sv/sys/compat/ia32/ia32_sysvec.c
  projects/sv/sys/compat/linux/linux_emul.c
  projects/sv/sys/compat/linux/linux_emul.h
  projects/sv/sys/compat/linux/linux_futex.c
  projects/sv/sys/compat/svr4/svr4_sysvec.c
  projects/sv/sys/compat/x86bios/x86bios.c
  projects/sv/sys/conf/files
  projects/sv/sys/contrib/altq/altq/altq_cbq.c
  projects/sv/sys/contrib/altq/altq/altq_cdnr.c
  projects/sv/sys/contrib/altq/altq/altq_hfsc.c
  projects/sv/sys/contrib/altq/altq/altq_priq.c
  projects/sv/sys/contrib/altq/altq/altq_red.c
  projects/sv/sys/contrib/altq/altq/altq_rio.c
  projects/sv/sys/contrib/altq/altq/altq_rmclass.c
  projects/sv/sys/contrib/altq/altq/altq_subr.c
  projects/sv/sys/contrib/altq/altq/altq_var.h
  projects/sv/sys/contrib/altq/altq/if_altq.h
  projects/sv/sys/dev/ath/ath_hal/ah_eeprom.h
  projects/sv/sys/dev/ath/ath_hal/ah_eeprom_v14.c
  projects/sv/sys/dev/ath/ath_hal/ah_eeprom_v14.h
  projects/sv/sys/dev/ath/ath_hal/ah_regdomain.c
  projects/sv/sys/dev/ath/ath_hal/ar5212/ar5212.h
  projects/sv/sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
  projects/sv/sys/dev/ath/ath_hal/ar5416/ar5416.h
  projects/sv/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c
  projects/sv/sys/dev/ath/ath_hal/ar5416/ar5416_cal.c
  projects/sv/sys/dev/ath/ath_hal/ar5416/ar5416_cal.h
  projects/sv/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c
  projects/sv/sys/dev/ath/ath_hal/ar9002/ar9280.h
  projects/sv/sys/dev/ath/ath_hal/ar9002/ar9280_attach.c
  projects/sv/sys/dev/ath/ath_hal/ar9002/ar9285.h
  projects/sv/sys/dev/ath/ath_hal/ar9002/ar9285_attach.c
  projects/sv/sys/dev/ath/ath_hal/ar9002/ar9285_reset.c
  projects/sv/sys/dev/cxgbe/adapter.h
  projects/sv/sys/dev/cxgbe/t4_main.c
  projects/sv/sys/dev/cxgbe/t4_sge.c
  projects/sv/sys/dev/dc/if_dc.c
  projects/sv/sys/dev/isp/isp_pci.c
  projects/sv/sys/dev/usb/usb_generic.c
  projects/sv/sys/geom/label/g_label_ext2fs.c
  projects/sv/sys/i386/conf/GENERIC
  projects/sv/sys/i386/i386/elf_machdep.c
  projects/sv/sys/i386/i386/identcpu.c
  projects/sv/sys/i386/i386/machdep.c
  projects/sv/sys/i386/ibcs2/ibcs2_sysvec.c
  projects/sv/sys/i386/include/clock.h
  projects/sv/sys/i386/isa/prof_machdep.c
  projects/sv/sys/i386/linux/linux_sysvec.c
  projects/sv/sys/ia64/ia64/elf_machdep.c
  projects/sv/sys/ia64/ia64/machdep.c
  projects/sv/sys/kern/imgact_aout.c
  projects/sv/sys/kern/init_main.c
  projects/sv/sys/kern/kern_cpuset.c
  projects/sv/sys/kern/kern_fork.c
  projects/sv/sys/kern/vfs_subr.c
  projects/sv/sys/mips/mips/elf64_machdep.c
  projects/sv/sys/mips/mips/elf_machdep.c
  projects/sv/sys/modules/ath/Makefile
  projects/sv/sys/net80211/_ieee80211.h
  projects/sv/sys/net80211/ieee80211.c
  projects/sv/sys/net80211/ieee80211_ht.c
  projects/sv/sys/net80211/ieee80211_ht.h
  projects/sv/sys/netinet/sctp.h
  projects/sv/sys/netinet/sctp_cc_functions.c
  projects/sv/sys/netinet/sctp_constants.h
  projects/sv/sys/netinet/sctp_indata.c
  projects/sv/sys/netinet/sctp_input.c
  projects/sv/sys/netinet/sctp_output.c
  projects/sv/sys/netinet/sctp_pcb.c
  projects/sv/sys/netinet/sctp_structs.h
  projects/sv/sys/netinet/sctp_sysctl.c
  projects/sv/sys/netinet/sctp_sysctl.h
  projects/sv/sys/netinet/sctp_timer.c
  projects/sv/sys/netinet/sctputil.c
  projects/sv/sys/pc98/conf/GENERIC
  projects/sv/sys/pc98/pc98/machdep.c
  projects/sv/sys/powerpc/aim/machdep.c
  projects/sv/sys/powerpc/ofw/ofw_machdep.c
  projects/sv/sys/powerpc/powerpc/elf32_machdep.c
  projects/sv/sys/powerpc/powerpc/elf64_machdep.c
  projects/sv/sys/sparc64/conf/GENERIC
  projects/sv/sys/sparc64/sparc64/elf_machdep.c
  projects/sv/sys/sparc64/sparc64/machdep.c
  projects/sv/sys/sun4v/conf/GENERIC
  projects/sv/sys/sun4v/sun4v/machdep.c
  projects/sv/sys/sys/eventhandler.h
  projects/sv/sys/sys/kernel.h
  projects/sv/sys/sys/param.h
  projects/sv/sys/sys/sysent.h
  projects/sv/sys/ufs/ufs/dirhash.h
  projects/sv/sys/ufs/ufs/ufs_dirhash.c
  projects/sv/sys/ufs/ufs/ufs_quota.c
  projects/sv/sys/vm/device_pager.c
  projects/sv/sys/vm/sg_pager.c
  projects/sv/sys/vm/vm_page.c
  projects/sv/sys/vm/vm_page.h
  projects/sv/sys/x86/isa/clock.c
  projects/sv/sys/x86/x86/tsc.c
  projects/sv/tools/regression/pjdfstest/Makefile
  projects/sv/tools/regression/pjdfstest/pjdfstest.c
  projects/sv/tools/regression/pjdfstest/tests/chmod/12.t
  projects/sv/tools/tools/ath/ath_ee_v14_print/ath_ee_v14_print.c
  projects/sv/tools/tools/ath/ath_ee_v4k_print/v4k.c
  projects/sv/tools/tools/ath/athrd/athrd.c
  projects/sv/usr.bin/calendar/calendars/calendar.freebsd
  projects/sv/usr.bin/find/find.1
  projects/sv/usr.sbin/bsdinstall/partedit/partedit.c
  projects/sv/usr.sbin/newsyslog/newsyslog.8
  projects/sv/usr.sbin/newsyslog/newsyslog.c
  projects/sv/usr.sbin/pw/cpdir.c
  projects/sv/usr.sbin/pw/pw.h
  projects/sv/usr.sbin/pw/pw_conf.c
  projects/sv/usr.sbin/pw/pw_user.c
Directory Properties:
  projects/sv/   (props changed)
  projects/sv/cddl/contrib/opensolaris/   (props changed)
  projects/sv/contrib/bind9/   (props changed)
  projects/sv/contrib/binutils/   (props changed)
  projects/sv/contrib/bzip2/   (props changed)
  projects/sv/contrib/dialog/   (props changed)
  projects/sv/contrib/ee/   (props changed)
  projects/sv/contrib/expat/   (props changed)
  projects/sv/contrib/file/   (props changed)
  projects/sv/contrib/gdb/   (props changed)
  projects/sv/contrib/gdtoa/   (props changed)
  projects/sv/contrib/gnu-sort/   (props changed)
  projects/sv/contrib/groff/   (props changed)
  projects/sv/contrib/less/   (props changed)
  projects/sv/contrib/libpcap/   (props changed)
  projects/sv/contrib/llvm/   (props changed)
  projects/sv/contrib/llvm/tools/clang/   (props changed)
  projects/sv/contrib/ncurses/   (props changed)
  projects/sv/contrib/netcat/   (props changed)
  projects/sv/contrib/ntp/   (props changed)
  projects/sv/contrib/one-true-awk/   (props changed)
  projects/sv/contrib/openbsm/   (props changed)
  projects/sv/contrib/openpam/   (props changed)
  projects/sv/contrib/pf/   (props changed)
  projects/sv/contrib/sendmail/   (props changed)
  projects/sv/contrib/tcpdump/   (props changed)
  projects/sv/contrib/tcsh/   (props changed)
  projects/sv/contrib/top/   (props changed)
  projects/sv/contrib/top/install-sh   (props changed)
  projects/sv/contrib/tzcode/stdtime/   (props changed)
  projects/sv/contrib/tzcode/zic/   (props changed)
  projects/sv/contrib/tzdata/   (props changed)
  projects/sv/contrib/wpa/   (props changed)
  projects/sv/contrib/xz/   (props changed)
  projects/sv/crypto/openssh/   (props changed)
  projects/sv/crypto/openssl/   (props changed)
  projects/sv/gnu/lib/   (props changed)
  projects/sv/gnu/usr.bin/binutils/   (props changed)
  projects/sv/gnu/usr.bin/cc/cc_tools/   (props changed)
  projects/sv/gnu/usr.bin/gdb/   (props changed)
  projects/sv/lib/libc/   (props changed)
  projects/sv/lib/libc/stdtime/   (props changed)
  projects/sv/lib/libutil/   (props changed)
  projects/sv/lib/libz/   (props changed)
  projects/sv/sbin/   (props changed)
  projects/sv/sbin/ipfw/   (props changed)
  projects/sv/share/mk/bsd.arch.inc.mk   (props changed)
  projects/sv/share/zoneinfo/   (props changed)
  projects/sv/sys/   (props changed)
  projects/sv/sys/amd64/include/xen/   (props changed)
  projects/sv/sys/boot/i386/efi/   (props changed)
  projects/sv/sys/boot/ia64/efi/   (props changed)
  projects/sv/sys/boot/ia64/ski/   (props changed)
  projects/sv/sys/boot/powerpc/boot1.chrp/   (props changed)
  projects/sv/sys/boot/powerpc/ofw/   (props changed)
  projects/sv/sys/cddl/contrib/opensolaris/   (props changed)
  projects/sv/sys/conf/   (props changed)
  projects/sv/sys/contrib/dev/acpica/   (props changed)
  projects/sv/sys/contrib/octeon-sdk/   (props changed)
  projects/sv/sys/contrib/pf/   (props changed)
  projects/sv/sys/contrib/x86emu/   (props changed)
  projects/sv/usr.bin/calendar/   (props changed)
  projects/sv/usr.bin/csup/   (props changed)
  projects/sv/usr.bin/procstat/   (props changed)
  projects/sv/usr.sbin/ndiscvt/   (props changed)
  projects/sv/usr.sbin/zic/   (props changed)

Modified: projects/sv/contrib/gcc/config.gcc
==============================================================================
--- projects/sv/contrib/gcc/config.gcc	Fri Mar 11 16:24:49 2011	(r219505)
+++ projects/sv/contrib/gcc/config.gcc	Fri Mar 11 16:30:30 2011	(r219506)
@@ -1207,14 +1207,14 @@ i[34567]86-*-solaris2*)
 		# FIXME: -m64 for i[34567]86-*-* should be allowed just
 		# like -m32 for x86_64-*-*.
 		case X"${with_cpu}" in
-		Xgeneric|Xnocona|Xx86-64|Xk8|Xopteron|Xathlon64|Xathlon-fx)
+		Xgeneric|Xcore2|Xnocona|Xx86-64|Xk8|Xopteron|Xathlon64|Xathlon-fx)
 			;;
 		X)
 			with_cpu=generic
 			;;
 		*)
 			echo "Unsupported CPU used in --with-cpu=$with_cpu, supported values:" 1>&2
-			echo "generic nocona x86-64 k8 opteron athlon64 athlon-fx" 1>&2
+			echo "generic core2 nocona x86-64 k8 opteron athlon64 athlon-fx" 1>&2
 			exit 1
 			;;
 		esac
@@ -2537,6 +2537,9 @@ if test x$with_cpu = x ; then
         nocona-*)
           with_cpu=nocona
           ;;
+	core2-*)
+	  with_cpu=core2
+	  ;;
         pentium_m-*)
           with_cpu=pentium-m
           ;;
@@ -2556,6 +2559,9 @@ if test x$with_cpu = x ; then
         nocona-*)
           with_cpu=nocona
           ;;
+	core2-*)
+	  with_cpu=core2
+	  ;;
         *)
           with_cpu=generic
           ;;
@@ -2787,7 +2793,7 @@ case "${target}" in
 				esac
 				# OK
 				;;
-			"" | k8 | opteron | athlon64 | athlon-fx | nocona | generic)
+			"" | k8 | opteron | athlon64 | athlon-fx | nocona | core2 | generic)
 				# OK
 				;;
 			*)

Copied: projects/sv/contrib/gcc/config/i386/geode.md (from r219503, head/contrib/gcc/config/i386/geode.md)
==============================================================================
--- /dev/null	00:00:00 1970	(empty, because file is newly added)
+++ projects/sv/contrib/gcc/config/i386/geode.md	Fri Mar 11 16:30:30 2011	(r219506, copy of r219503, head/contrib/gcc/config/i386/geode.md)
@@ -0,0 +1,153 @@
+;; Geode Scheduling
+;; Copyright (C) 2006
+;; Free Software Foundation, Inc.
+;;
+;; This file is part of GCC.
+;;
+;; GCC is free software; you can redistribute it and/or modify
+;; it under the terms of the GNU General Public License as published by
+;; the Free Software Foundation; either version 2, or (at your option)
+;; any later version.
+;;
+;; GCC is distributed in the hope that it will be useful,
+;; but WITHOUT ANY WARRANTY; without even the implied warranty of
+;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+;; GNU General Public License for more details.
+;;
+;; You should have received a copy of the GNU General Public License
+;; along with GCC; see the file COPYING.  If not, write to
+;; the Free Software Foundation, 51 Franklin Street, Fifth Floor,
+;; Boston, MA 02110-1301, USA.
+;;
+;; The Geode architecture is one insn issue processor.
+;;
+;; This description is based on data from the following documents:
+;;
+;;    "AMD Geode GX Processor Data Book"
+;;    Advanced Micro Devices, Inc., Aug 2005.
+;;
+;;    "AMD Geode LX Processor Data Book"
+;;    Advanced Micro Devices, Inc., Jan 2006.
+;;
+;;
+;; CPU execution units of the Geode:
+;;
+;; issue	describes the issue pipeline.
+;; alu		describes the Integer unit
+;; fpu		describes the FP unit
+;;
+;; The fp unit is out of order execution unit with register renaming.
+;; There is also memory management unit and execution pipeline for
+;; load/store operations.  We ignore it and difference between insns
+;; using memory and registers.
+
+(define_automaton "geode")
+
+(define_cpu_unit "geode_issue,geode_alu,geode_fpu" "geode")
+
+(define_insn_reservation "alu" 1
+			 (and (eq_attr "cpu" "geode")
+			      (eq_attr "type" "alu,alu1,negnot,icmp,lea,test,imov,imovx,icmov,incdec,setcc"))
+			 "geode_issue,geode_alu")
+
+(define_insn_reservation "shift" 2
+			 (and (eq_attr "cpu" "geode")
+			      (eq_attr "type" "ishift,ishift1,rotate,rotate1,cld"))
+			 "geode_issue,geode_alu*2")
+
+(define_insn_reservation "imul" 7
+			 (and (eq_attr "cpu" "geode")
+			      (eq_attr "type" "imul"))
+			 "geode_issue,geode_alu*7")
+
+(define_insn_reservation "idiv" 40
+			 (and (eq_attr "cpu" "geode")
+			      (eq_attr "type" "idiv"))
+			 "geode_issue,geode_alu*40")
+
+;; The branch unit.
+(define_insn_reservation "call" 2
+			 (and (eq_attr "cpu" "geode")
+			      (eq_attr "type" "call,callv"))
+			 "geode_issue,geode_alu*2")
+
+(define_insn_reservation "geode_branch" 1
+			 (and (eq_attr "cpu" "geode")
+			      (eq_attr "type" "ibr"))
+			 "geode_issue,geode_alu")
+
+(define_insn_reservation "geode_pop_push" 1
+			 (and (eq_attr "cpu" "geode")
+			      (eq_attr "type" "pop,push"))
+			 "geode_issue,geode_alu")
+
+(define_insn_reservation "geode_leave" 2
+			 (and (eq_attr "cpu" "geode")
+			      (eq_attr "type" "leave"))
+			 "geode_issue,geode_alu*2")
+
+(define_insn_reservation "geode_load_str" 4
+			 (and (eq_attr "cpu" "geode")
+			      (and (eq_attr "type" "str")
+				   (eq_attr "memory" "load,both")))
+			 "geode_issue,geode_alu*4")
+
+(define_insn_reservation "geode_store_str" 2
+			 (and (eq_attr "cpu" "geode")
+			      (and (eq_attr "type" "str")
+				   (eq_attr "memory" "store")))
+			 "geode_issue,geode_alu*2")
+
+;; Be optimistic
+(define_insn_reservation "geode_unknown" 1
+			 (and (eq_attr "cpu" "geode")
+			      (eq_attr "type" "multi,other"))
+			 "geode_issue,geode_alu")
+
+;; FPU
+
+(define_insn_reservation "geode_fop" 6
+			 (and (eq_attr "cpu" "geode")
+			      (eq_attr "type" "fop,fcmp"))
+			 "geode_issue,geode_fpu*6")
+
+(define_insn_reservation "geode_fsimple" 1
+			 (and (eq_attr "cpu" "geode")
+			      (eq_attr "type" "fmov,fcmov,fsgn,fxch"))
+			 "geode_issue,geode_fpu")
+
+(define_insn_reservation "geode_fist" 4
+			 (and (eq_attr "cpu" "geode")
+			      (eq_attr "type" "fistp,fisttp"))
+			 "geode_issue,geode_fpu*4")
+
+(define_insn_reservation "geode_fmul" 10
+			 (and (eq_attr "cpu" "geode")
+			      (eq_attr "type" "fmul"))
+			 "geode_issue,geode_fpu*10")
+
+(define_insn_reservation "geode_fdiv" 47
+			 (and (eq_attr "cpu" "geode")
+			      (eq_attr "type" "fdiv"))
+			 "geode_issue,geode_fpu*47")
+
+;; We use minimal latency (fsin) here
+(define_insn_reservation "geode_fpspc" 54
+			 (and (eq_attr "cpu" "geode")
+			      (eq_attr "type" "fpspc"))
+			 "geode_issue,geode_fpu*54")
+
+(define_insn_reservation "geode_frndint" 12
+			 (and (eq_attr "cpu" "geode")
+			      (eq_attr "type" "frndint"))
+			 "geode_issue,geode_fpu*12")
+
+(define_insn_reservation "geode_mmxmov" 1
+			 (and (eq_attr "cpu" "geode")
+			      (eq_attr "type" "mmxmov"))
+			 "geode_issue,geode_fpu")
+
+(define_insn_reservation "geode_mmx" 2
+			 (and (eq_attr "cpu" "geode")
+			      (eq_attr "type" "mmx,mmxadd,mmxmul,mmxcmp,mmxcvt,mmxshft"))
+			 "geode_issue,geode_fpu*2")

Modified: projects/sv/contrib/gcc/config/i386/i386.c
==============================================================================
--- projects/sv/contrib/gcc/config/i386/i386.c	Fri Mar 11 16:24:49 2011	(r219505)
+++ projects/sv/contrib/gcc/config/i386/i386.c	Fri Mar 11 16:30:30 2011	(r219506)
@@ -336,6 +336,60 @@ struct processor_costs pentiumpro_cost =
 };
 
 static const
+struct processor_costs geode_cost = {
+  COSTS_N_INSNS (1),			/* cost of an add instruction */
+  COSTS_N_INSNS (1),			/* cost of a lea instruction */
+  COSTS_N_INSNS (2),			/* variable shift costs */
+  COSTS_N_INSNS (1),			/* constant shift costs */
+  {COSTS_N_INSNS (3),			/* cost of starting multiply for QI */
+   COSTS_N_INSNS (4),			/*                               HI */
+   COSTS_N_INSNS (7),			/*                               SI */
+   COSTS_N_INSNS (7),			/*                               DI */
+   COSTS_N_INSNS (7)},			/*                               other */
+  0,					/* cost of multiply per each bit set */
+  {COSTS_N_INSNS (15),			/* cost of a divide/mod for QI */
+   COSTS_N_INSNS (23),			/*                          HI */
+   COSTS_N_INSNS (39),			/*                          SI */
+   COSTS_N_INSNS (39),			/*                          DI */
+   COSTS_N_INSNS (39)},			/*                          other */
+  COSTS_N_INSNS (1),			/* cost of movsx */
+  COSTS_N_INSNS (1),			/* cost of movzx */
+  8,					/* "large" insn */
+  4,					/* MOVE_RATIO */
+  1,					/* cost for loading QImode using movzbl */
+  {1, 1, 1},				/* cost of loading integer registers
+					   in QImode, HImode and SImode.
+					   Relative to reg-reg move (2).  */
+  {1, 1, 1},				/* cost of storing integer registers */
+  1,					/* cost of reg,reg fld/fst */
+  {1, 1, 1},				/* cost of loading fp registers
+					   in SFmode, DFmode and XFmode */
+  {4, 6, 6},				/* cost of storing fp registers
+					   in SFmode, DFmode and XFmode */
+
+  1,					/* cost of moving MMX register */
+  {1, 1},				/* cost of loading MMX registers
+					   in SImode and DImode */
+  {1, 1},				/* cost of storing MMX registers
+					   in SImode and DImode */
+  1,					/* cost of moving SSE register */
+  {1, 1, 1},				/* cost of loading SSE registers
+					   in SImode, DImode and TImode */
+  {1, 1, 1},				/* cost of storing SSE registers
+					   in SImode, DImode and TImode */
+  1,					/* MMX or SSE register to integer */
+  32,					/* size of prefetch block */
+  1,					/* number of parallel prefetches */
+  1,					/* Branch cost */
+  COSTS_N_INSNS (6),			/* cost of FADD and FSUB insns.  */
+  COSTS_N_INSNS (11),			/* cost of FMUL instruction.  */
+  COSTS_N_INSNS (47),			/* cost of FDIV instruction.  */
+  COSTS_N_INSNS (1),			/* cost of FABS instruction.  */
+  COSTS_N_INSNS (1),			/* cost of FCHS instruction.  */
+  COSTS_N_INSNS (54),			/* cost of FSQRT instruction.  */
+};
+
+static const
 struct processor_costs k6_cost = {
   COSTS_N_INSNS (1),			/* cost of an add instruction */
   COSTS_N_INSNS (2),			/* cost of a lea instruction */
@@ -600,6 +654,58 @@ struct processor_costs nocona_cost = {
   COSTS_N_INSNS (44),			/* cost of FSQRT instruction.  */
 };
 
+static const
+struct processor_costs core2_cost = {
+  COSTS_N_INSNS (1),			/* cost of an add instruction */
+  COSTS_N_INSNS (1) + 1,		/* cost of a lea instruction */
+  COSTS_N_INSNS (1),			/* variable shift costs */
+  COSTS_N_INSNS (1),			/* constant shift costs */
+  {COSTS_N_INSNS (3),			/* cost of starting multiply for QI */
+   COSTS_N_INSNS (3),			/*                               HI */
+   COSTS_N_INSNS (3),			/*                               SI */
+   COSTS_N_INSNS (3),			/*                               DI */
+   COSTS_N_INSNS (3)},			/*                               other */
+  0,					/* cost of multiply per each bit set */
+  {COSTS_N_INSNS (22),			/* cost of a divide/mod for QI */
+   COSTS_N_INSNS (22),			/*                          HI */
+   COSTS_N_INSNS (22),			/*                          SI */
+   COSTS_N_INSNS (22),			/*                          DI */
+   COSTS_N_INSNS (22)},			/*                          other */
+  COSTS_N_INSNS (1),			/* cost of movsx */
+  COSTS_N_INSNS (1),			/* cost of movzx */
+  8,					/* "large" insn */
+  16,					/* MOVE_RATIO */
+  2,					/* cost for loading QImode using movzbl */
+  {6, 6, 6},				/* cost of loading integer registers
+					   in QImode, HImode and SImode.
+					   Relative to reg-reg move (2).  */
+  {4, 4, 4},				/* cost of storing integer registers */
+  2,					/* cost of reg,reg fld/fst */
+  {6, 6, 6},				/* cost of loading fp registers
+					   in SFmode, DFmode and XFmode */
+  {4, 4, 4},				/* cost of loading integer registers */
+  2,					/* cost of moving MMX register */
+  {6, 6},				/* cost of loading MMX registers
+					   in SImode and DImode */
+  {4, 4},				/* cost of storing MMX registers
+					   in SImode and DImode */
+  2,					/* cost of moving SSE register */
+  {6, 6, 6},				/* cost of loading SSE registers
+					   in SImode, DImode and TImode */
+  {4, 4, 4},				/* cost of storing SSE registers
+					   in SImode, DImode and TImode */
+  2,					/* MMX or SSE register to integer */
+  128,					/* size of prefetch block */
+  8,					/* number of parallel prefetches */
+  3,					/* Branch cost */
+  COSTS_N_INSNS (3),			/* cost of FADD and FSUB insns.  */
+  COSTS_N_INSNS (5),			/* cost of FMUL instruction.  */
+  COSTS_N_INSNS (32),			/* cost of FDIV instruction.  */
+  COSTS_N_INSNS (1),			/* cost of FABS instruction.  */
+  COSTS_N_INSNS (1),			/* cost of FCHS instruction.  */
+  COSTS_N_INSNS (58),			/* cost of FSQRT instruction.  */
+};
+
 /* Generic64 should produce code tuned for Nocona and K8.  */
 static const
 struct processor_costs generic64_cost = {
@@ -721,38 +827,41 @@ const struct processor_costs *ix86_cost 
 #define m_486 (1<<PROCESSOR_I486)
 #define m_PENT (1<<PROCESSOR_PENTIUM)
 #define m_PPRO (1<<PROCESSOR_PENTIUMPRO)
+#define m_GEODE  (1<<PROCESSOR_GEODE)
+#define m_K6_GEODE  (m_K6 | m_GEODE)
 #define m_K6  (1<<PROCESSOR_K6)
 #define m_ATHLON  (1<<PROCESSOR_ATHLON)
 #define m_PENT4  (1<<PROCESSOR_PENTIUM4)
 #define m_K8  (1<<PROCESSOR_K8)
 #define m_ATHLON_K8  (m_K8 | m_ATHLON)
 #define m_NOCONA  (1<<PROCESSOR_NOCONA)
+#define m_CORE2  (1<<PROCESSOR_CORE2)
 #define m_GENERIC32 (1<<PROCESSOR_GENERIC32)
 #define m_GENERIC64 (1<<PROCESSOR_GENERIC64)
 #define m_GENERIC (m_GENERIC32 | m_GENERIC64)
 
 /* Generic instruction choice should be common subset of supported CPUs
-   (PPro/PENT4/NOCONA/Athlon/K8).  */
+   (PPro/PENT4/NOCONA/CORE2/Athlon/K8).  */
 
 /* Leave is not affecting Nocona SPEC2000 results negatively, so enabling for
    Generic64 seems like good code size tradeoff.  We can't enable it for 32bit
    generic because it is not working well with PPro base chips.  */
-const int x86_use_leave = m_386 | m_K6 | m_ATHLON_K8 | m_GENERIC64;
-const int x86_push_memory = m_386 | m_K6 | m_ATHLON_K8 | m_PENT4 | m_NOCONA | m_GENERIC;
+const int x86_use_leave = m_386 | m_K6_GEODE | m_ATHLON_K8 | m_CORE2 | m_GENERIC64;
+const int x86_push_memory = m_386 | m_K6_GEODE | m_ATHLON_K8 | m_PENT4 | m_NOCONA | m_CORE2 | m_GENERIC;
 const int x86_zero_extend_with_and = m_486 | m_PENT;
-const int x86_movx = m_ATHLON_K8 | m_PPRO | m_PENT4 | m_NOCONA | m_GENERIC /* m_386 | m_K6 */;
+const int x86_movx = m_ATHLON_K8 | m_PPRO | m_PENT4 | m_NOCONA | m_CORE2 | m_GENERIC | m_GEODE /* m_386 | m_K6 */;
 const int x86_double_with_add = ~m_386;
 const int x86_use_bit_test = m_386;
-const int x86_unroll_strlen = m_486 | m_PENT | m_PPRO | m_ATHLON_K8 | m_K6 | m_GENERIC;
-const int x86_cmove = m_PPRO | m_ATHLON_K8 | m_PENT4 | m_NOCONA;
+const int x86_unroll_strlen = m_486 | m_PENT | m_PPRO | m_ATHLON_K8 | m_K6 | m_CORE2 | m_GENERIC;
+const int x86_cmove = m_PPRO | m_GEODE | m_ATHLON_K8 | m_PENT4 | m_NOCONA;
 const int x86_3dnow_a = m_ATHLON_K8;
-const int x86_deep_branch = m_PPRO | m_K6 | m_ATHLON_K8 | m_PENT4 | m_NOCONA | m_GENERIC;
+const int x86_deep_branch = m_PPRO | m_K6_GEODE | m_ATHLON_K8 | m_PENT4 | m_NOCONA | m_CORE2 | m_GENERIC;
 /* Branch hints were put in P4 based on simulation result. But
    after P4 was made, no performance benefit was observed with
    branch hints. It also increases the code size. As the result,
    icc never generates branch hints.  */
 const int x86_branch_hints = 0;
-const int x86_use_sahf = m_PPRO | m_K6 | m_PENT4 | m_NOCONA | m_GENERIC32; /*m_GENERIC | m_ATHLON_K8 ? */
+const int x86_use_sahf = m_PPRO | m_K6_GEODE | m_PENT4 | m_NOCONA | m_GENERIC32; /*m_GENERIC | m_ATHLON_K8 ? */
 /* We probably ought to watch for partial register stalls on Generic32
    compilation setting as well.  However in current implementation the
    partial register stalls are not eliminated very well - they can
@@ -762,15 +871,15 @@ const int x86_use_sahf = m_PPRO | m_K6 |
    with partial reg. dependencies used by Athlon/P4 based chips, it is better
    to leave it off for generic32 for now.  */
 const int x86_partial_reg_stall = m_PPRO;
-const int x86_partial_flag_reg_stall = m_GENERIC;
-const int x86_use_himode_fiop = m_386 | m_486 | m_K6;
-const int x86_use_simode_fiop = ~(m_PPRO | m_ATHLON_K8 | m_PENT | m_GENERIC);
+const int x86_partial_flag_reg_stall =  m_CORE2 | m_GENERIC;
+const int x86_use_himode_fiop = m_386 | m_486 | m_K6_GEODE;
+const int x86_use_simode_fiop = ~(m_PPRO | m_ATHLON_K8 | m_PENT | m_CORE2 | m_GENERIC);
 const int x86_use_mov0 = m_K6;
-const int x86_use_cltd = ~(m_PENT | m_K6 | m_GENERIC);
+const int x86_use_cltd = ~(m_PENT | m_K6 | m_CORE2 | m_GENERIC);
 const int x86_read_modify_write = ~m_PENT;
 const int x86_read_modify = ~(m_PENT | m_PPRO);
 const int x86_split_long_moves = m_PPRO;
-const int x86_promote_QImode = m_K6 | m_PENT | m_386 | m_486 | m_ATHLON_K8 | m_GENERIC; /* m_PENT4 ? */
+const int x86_promote_QImode = m_K6_GEODE | m_PENT | m_386 | m_486 | m_ATHLON_K8 | m_CORE2 | m_GENERIC; /* m_PENT4 ? */
 const int x86_fast_prefix = ~(m_PENT | m_486 | m_386);
 const int x86_single_stringop = m_386 | m_PENT4 | m_NOCONA;
 const int x86_qimode_math = ~(0);
@@ -780,18 +889,18 @@ const int x86_promote_qi_regs = 0;
    if our scheme for avoiding partial stalls was more effective.  */
 const int x86_himode_math = ~(m_PPRO);
 const int x86_promote_hi_regs = m_PPRO;
-const int x86_sub_esp_4 = m_ATHLON_K8 | m_PPRO | m_PENT4 | m_NOCONA | m_GENERIC;
-const int x86_sub_esp_8 = m_ATHLON_K8 | m_PPRO | m_386 | m_486 | m_PENT4 | m_NOCONA | m_GENERIC;
-const int x86_add_esp_4 = m_ATHLON_K8 | m_K6 | m_PENT4 | m_NOCONA | m_GENERIC;
-const int x86_add_esp_8 = m_ATHLON_K8 | m_PPRO | m_K6 | m_386 | m_486 | m_PENT4 | m_NOCONA | m_GENERIC;
-const int x86_integer_DFmode_moves = ~(m_ATHLON_K8 | m_PENT4 | m_NOCONA | m_PPRO | m_GENERIC);
-const int x86_partial_reg_dependency = m_ATHLON_K8 | m_PENT4 | m_NOCONA | m_GENERIC;
-const int x86_memory_mismatch_stall = m_ATHLON_K8 | m_PENT4 | m_NOCONA | m_GENERIC;
-const int x86_accumulate_outgoing_args = m_ATHLON_K8 | m_PENT4 | m_NOCONA | m_PPRO | m_GENERIC;
-const int x86_prologue_using_move = m_ATHLON_K8 | m_PPRO | m_GENERIC;
-const int x86_epilogue_using_move = m_ATHLON_K8 | m_PPRO | m_GENERIC;
+const int x86_sub_esp_4 = m_ATHLON_K8 | m_PPRO | m_PENT4 | m_NOCONA | m_CORE2 | m_GENERIC;
+const int x86_sub_esp_8 = m_ATHLON_K8 | m_PPRO | m_386 | m_486 | m_PENT4 | m_NOCONA | m_CORE2 | m_GENERIC;
+const int x86_add_esp_4 = m_ATHLON_K8 | m_K6_GEODE | m_PENT4 | m_NOCONA | m_CORE2 | m_GENERIC;
+const int x86_add_esp_8 = m_ATHLON_K8 | m_PPRO | m_K6_GEODE | m_386 | m_486 | m_PENT4 | m_NOCONA | m_CORE2 | m_GENERIC;
+const int x86_integer_DFmode_moves = ~(m_ATHLON_K8 | m_PENT4 | m_NOCONA | m_PPRO | m_CORE2 | m_GENERIC | m_GEODE);
+const int x86_partial_reg_dependency = m_ATHLON_K8 | m_PENT4 | m_NOCONA | m_CORE2 | m_GENERIC;
+const int x86_memory_mismatch_stall = m_ATHLON_K8 | m_PENT4 | m_NOCONA | m_CORE2 | m_GENERIC;
+const int x86_accumulate_outgoing_args = m_ATHLON_K8 | m_PENT4 | m_NOCONA | m_PPRO | m_CORE2 | m_GENERIC;
+const int x86_prologue_using_move = m_ATHLON_K8 | m_PPRO | m_CORE2 | m_GENERIC;
+const int x86_epilogue_using_move = m_ATHLON_K8 | m_PPRO | m_CORE2 | m_GENERIC;
 const int x86_shift1 = ~m_486;
-const int x86_arch_always_fancy_math_387 = m_PENT | m_PPRO | m_ATHLON_K8 | m_PENT4 | m_NOCONA | m_GENERIC;
+const int x86_arch_always_fancy_math_387 = m_PENT | m_PPRO | m_ATHLON_K8 | m_PENT4 | m_NOCONA | m_CORE2 | m_GENERIC;
 /* In Generic model we have an conflict here in between PPro/Pentium4 based chips
    that thread 128bit SSE registers as single units versus K8 based chips that
    divide SSE registers to two 64bit halves.
@@ -801,7 +910,7 @@ const int x86_arch_always_fancy_math_387
    this option on P4 brings over 20% SPECfp regression, while enabling it on
    K8 brings roughly 2.4% regression that can be partly masked by careful scheduling
    of moves.  */
-const int x86_sse_partial_reg_dependency = m_PENT4 | m_NOCONA | m_PPRO | m_GENERIC;
+const int x86_sse_partial_reg_dependency = m_PENT4 | m_NOCONA | m_PPRO | m_CORE2 | m_GENERIC;
 /* Set for machines where the type and dependencies are resolved on SSE
    register parts instead of whole registers, so we may maintain just
    lower part of scalar values in proper format leaving the upper part
@@ -810,18 +919,18 @@ const int x86_sse_split_regs = m_ATHLON_
 const int x86_sse_typeless_stores = m_ATHLON_K8;
 const int x86_sse_load0_by_pxor = m_PPRO | m_PENT4 | m_NOCONA;
 const int x86_use_ffreep = m_ATHLON_K8;
-const int x86_rep_movl_optimal = m_386 | m_PENT | m_PPRO | m_K6;
-const int x86_use_incdec = ~(m_PENT4 | m_NOCONA | m_GENERIC);
+const int x86_rep_movl_optimal = m_386 | m_PENT | m_PPRO | m_K6_GEODE | m_CORE2;
+const int x86_use_incdec = ~(m_PENT4 | m_NOCONA | m_CORE2 | m_GENERIC);
 
 /* ??? Allowing interunit moves makes it all too easy for the compiler to put
    integer data in xmm registers.  Which results in pretty abysmal code.  */
 const int x86_inter_unit_moves = 0 /* ~(m_ATHLON_K8) */;
 
-const int x86_ext_80387_constants = m_K6 | m_ATHLON | m_PENT4 | m_NOCONA | m_PPRO | m_GENERIC32;
+const int x86_ext_80387_constants = m_K6_GEODE | m_ATHLON | m_PENT4 | m_NOCONA | m_PPRO | m_GENERIC32;
 /* Some CPU cores are not able to predict more than 4 branch instructions in
    the 16 byte window.  */
-const int x86_four_jump_limit = m_PPRO | m_ATHLON_K8 | m_PENT4 | m_NOCONA | m_GENERIC;
-const int x86_schedule = m_PPRO | m_ATHLON_K8 | m_K6 | m_PENT | m_GENERIC;
+const int x86_four_jump_limit = m_PPRO | m_ATHLON_K8 | m_PENT4 | m_NOCONA | m_CORE2 | m_GENERIC;
+const int x86_schedule = m_PPRO | m_ATHLON_K8 | m_K6_GEODE | m_PENT | m_CORE2 | m_GENERIC;
 const int x86_use_bt = m_ATHLON_K8;
 /* Compare and exchange was added for 80486.  */
 const int x86_cmpxchg = ~m_386;
@@ -831,7 +940,7 @@ const int x86_cmpxchg8b = ~(m_386 | m_48
 const int x86_cmpxchg16b = m_NOCONA;
 /* Exchange and add was added for 80486.  */
 const int x86_xadd = ~m_386;
-const int x86_pad_returns = m_ATHLON_K8 | m_GENERIC;
+const int x86_pad_returns = m_ATHLON_K8 | m_CORE2 | m_GENERIC;
 
 /* In case the average insn count for single function invocation is
    lower than this constant, emit fast (but longer) prologue and
@@ -1455,11 +1564,13 @@ override_options (void)
       {&i486_cost, 0, 0, 16, 15, 16, 15, 16},
       {&pentium_cost, 0, 0, 16, 7, 16, 7, 16},
       {&pentiumpro_cost, 0, 0, 16, 15, 16, 7, 16},
+      {&geode_cost, 0, 0, 0, 0, 0, 0, 0},
       {&k6_cost, 0, 0, 32, 7, 32, 7, 32},
       {&athlon_cost, 0, 0, 16, 7, 16, 7, 16},
       {&pentium4_cost, 0, 0, 0, 0, 0, 0, 0},
       {&k8_cost, 0, 0, 16, 7, 16, 7, 16},
       {&nocona_cost, 0, 0, 0, 0, 0, 0, 0},
+      {&core2_cost, 0, 0, 16, 7, 16, 7, 16},
       {&generic32_cost, 0, 0, 16, 7, 16, 7, 16},
       {&generic64_cost, 0, 0, 16, 7, 16, 7, 16}
     };
@@ -1506,6 +1617,11 @@ override_options (void)
 				        | PTA_MMX | PTA_PREFETCH_SSE},
       {"nocona", PROCESSOR_NOCONA, PTA_SSE | PTA_SSE2 | PTA_SSE3 | PTA_64BIT
 				        | PTA_MMX | PTA_PREFETCH_SSE},
+      {"core2", PROCESSOR_CORE2, PTA_SSE | PTA_SSE2 | PTA_SSE3
+                                        | PTA_64BIT | PTA_MMX
+                                        | PTA_PREFETCH_SSE},
+      {"geode", PROCESSOR_GEODE, PTA_MMX | PTA_PREFETCH_SSE | PTA_3DNOW
+				   | PTA_3DNOW_A},
       {"k6", PROCESSOR_K6, PTA_MMX},
       {"k6-2", PROCESSOR_K6, PTA_MMX | PTA_3DNOW},
       {"k6-3", PROCESSOR_K6, PTA_MMX | PTA_3DNOW},
@@ -13706,6 +13822,9 @@ ix86_issue_rate (void)
     case PROCESSOR_GENERIC64:
       return 3;
 
+    case PROCESSOR_CORE2:
+      return 4;
+
     default:
       return 1;
     }

Modified: projects/sv/contrib/gcc/config/i386/i386.h
==============================================================================
--- projects/sv/contrib/gcc/config/i386/i386.h	Fri Mar 11 16:24:49 2011	(r219505)
+++ projects/sv/contrib/gcc/config/i386/i386.h	Fri Mar 11 16:30:30 2011	(r219506)
@@ -130,12 +130,14 @@ extern const struct processor_costs *ix8
 #define TARGET_486 (ix86_tune == PROCESSOR_I486)
 #define TARGET_PENTIUM (ix86_tune == PROCESSOR_PENTIUM)
 #define TARGET_PENTIUMPRO (ix86_tune == PROCESSOR_PENTIUMPRO)
+#define TARGET_GEODE (ix86_tune == PROCESSOR_GEODE)
 #define TARGET_K6 (ix86_tune == PROCESSOR_K6)
 #define TARGET_ATHLON (ix86_tune == PROCESSOR_ATHLON)
 #define TARGET_PENTIUM4 (ix86_tune == PROCESSOR_PENTIUM4)
 #define TARGET_K8 (ix86_tune == PROCESSOR_K8)
 #define TARGET_ATHLON_K8 (TARGET_K8 || TARGET_ATHLON)
 #define TARGET_NOCONA (ix86_tune == PROCESSOR_NOCONA)
+#define TARGET_CORE2 (ix86_tune == PROCESSOR_CORE2)
 #define TARGET_GENERIC32 (ix86_tune == PROCESSOR_GENERIC32)
 #define TARGET_GENERIC64 (ix86_tune == PROCESSOR_GENERIC64)
 #define TARGET_GENERIC (TARGET_GENERIC32 || TARGET_GENERIC64)
@@ -376,6 +378,10 @@ extern const char *host_detect_local_cpu
 	      break;						\
 	    }							\
 	}							\
+      else if (TARGET_GEODE)					\
+	{							\
+	  builtin_define ("__tune_geode__");			\
+	}							\
       else if (TARGET_K6)					\
 	{							\
 	  builtin_define ("__tune_k6__");			\
@@ -397,6 +403,8 @@ extern const char *host_detect_local_cpu
 	builtin_define ("__tune_pentium4__");			\
       else if (TARGET_NOCONA)					\
 	builtin_define ("__tune_nocona__");			\
+      else if (TARGET_CORE2)					\
+	builtin_define ("__tune_core2__");			\
 								\
       if (TARGET_MMX)						\
 	builtin_define ("__MMX__");				\
@@ -437,6 +445,11 @@ extern const char *host_detect_local_cpu
 	  builtin_define ("__pentiumpro");			\
 	  builtin_define ("__pentiumpro__");			\
 	}							\
+      else if (ix86_arch == PROCESSOR_GEODE)			\
+	{							\
+	  builtin_define ("__geode");				\
+	  builtin_define ("__geode__");				\
+	}							\
       else if (ix86_arch == PROCESSOR_K6)			\
 	{							\
 								\
@@ -470,6 +483,11 @@ extern const char *host_detect_local_cpu
 	  builtin_define ("__nocona");				\
 	  builtin_define ("__nocona__");			\
 	}							\
+      else if (ix86_arch == PROCESSOR_CORE2)			\
+	{							\
+	  builtin_define ("__core2");				\
+	  builtin_define ("__core2__");				\
+	}							\
     }								\
   while (0)
 
@@ -481,23 +499,25 @@ extern const char *host_detect_local_cpu
 #define TARGET_CPU_DEFAULT_pentium2 5
 #define TARGET_CPU_DEFAULT_pentium3 6
 #define TARGET_CPU_DEFAULT_pentium4 7
-#define TARGET_CPU_DEFAULT_k6 8
-#define TARGET_CPU_DEFAULT_k6_2 9
-#define TARGET_CPU_DEFAULT_k6_3 10
-#define TARGET_CPU_DEFAULT_athlon 11
-#define TARGET_CPU_DEFAULT_athlon_sse 12
-#define TARGET_CPU_DEFAULT_k8 13
-#define TARGET_CPU_DEFAULT_pentium_m 14
-#define TARGET_CPU_DEFAULT_prescott 15
-#define TARGET_CPU_DEFAULT_nocona 16
-#define TARGET_CPU_DEFAULT_generic 17
+#define TARGET_CPU_DEFAULT_geode 8
+#define TARGET_CPU_DEFAULT_k6 9
+#define TARGET_CPU_DEFAULT_k6_2 10
+#define TARGET_CPU_DEFAULT_k6_3 11
+#define TARGET_CPU_DEFAULT_athlon 12
+#define TARGET_CPU_DEFAULT_athlon_sse 13
+#define TARGET_CPU_DEFAULT_k8 14
+#define TARGET_CPU_DEFAULT_pentium_m 15
+#define TARGET_CPU_DEFAULT_prescott 16
+#define TARGET_CPU_DEFAULT_nocona 17
+#define TARGET_CPU_DEFAULT_core2 18
+#define TARGET_CPU_DEFAULT_generic 19
 
 #define TARGET_CPU_DEFAULT_NAMES {"i386", "i486", "pentium", "pentium-mmx",\
 				  "pentiumpro", "pentium2", "pentium3", \
-				  "pentium4", "k6", "k6-2", "k6-3",\
+                                  "pentium4", "geode", "k6", "k6-2", "k6-3", \
 				  "athlon", "athlon-4", "k8", \
 				  "pentium-m", "prescott", "nocona", \
-				  "generic"}
+				  "core2", "generic"}
 
 #ifndef CC1_SPEC
 #define CC1_SPEC "%(cc1_cpu) "
@@ -2077,11 +2097,13 @@ enum processor_type
   PROCESSOR_I486,			/* 80486DX, 80486SX, 80486DX[24] */
   PROCESSOR_PENTIUM,
   PROCESSOR_PENTIUMPRO,
+  PROCESSOR_GEODE,
   PROCESSOR_K6,
   PROCESSOR_ATHLON,
   PROCESSOR_PENTIUM4,
   PROCESSOR_K8,
   PROCESSOR_NOCONA,
+  PROCESSOR_CORE2,
   PROCESSOR_GENERIC32,
   PROCESSOR_GENERIC64,
   PROCESSOR_max

Modified: projects/sv/contrib/gcc/config/i386/i386.md
==============================================================================
--- projects/sv/contrib/gcc/config/i386/i386.md	Fri Mar 11 16:24:49 2011	(r219505)
+++ projects/sv/contrib/gcc/config/i386/i386.md	Fri Mar 11 16:30:30 2011	(r219506)
@@ -187,7 +187,7 @@
 
 ;; Processor type.  This attribute must exactly match the processor_type
 ;; enumeration in i386.h.
-(define_attr "cpu" "i386,i486,pentium,pentiumpro,k6,athlon,pentium4,k8,nocona,generic32,generic64"
+(define_attr "cpu" "i386,i486,pentium,pentiumpro,geode,k6,athlon,pentium4,k8,nocona,core2,generic32,generic64"
   (const (symbol_ref "ix86_tune")))
 
 ;; A basic instruction type.  Refinements due to arguments to be
@@ -473,6 +473,7 @@
 (include "ppro.md")
 (include "k6.md")
 (include "athlon.md")
+(include "geode.md")
 
 
 ;; Operand and operator predicates and constraints

Modified: projects/sv/contrib/gcc/doc/gcc.1
==============================================================================
--- projects/sv/contrib/gcc/doc/gcc.1	Fri Mar 11 16:24:49 2011	(r219505)
+++ projects/sv/contrib/gcc/doc/gcc.1	Fri Mar 11 16:30:30 2011	(r219506)
@@ -129,7 +129,7 @@
 .\" ========================================================================
 .\"
 .IX Title "GCC 1"
-.TH GCC 1 "2011-02-20" "gcc-4.2.1" "GNU"
+.TH GCC 1 "2011-03-07" "gcc-4.2.1" "GNU"
 .SH "NAME"
 gcc \- GNU project C and C++ compiler
 .SH "SYNOPSIS"
@@ -8733,6 +8733,10 @@ set support.
 .IX Item "nocona"
 Improved version of Intel Pentium4 \s-1CPU\s0 with 64\-bit extensions, \s-1MMX\s0, \s-1SSE\s0,
 \&\s-1SSE2\s0 and \s-1SSE3\s0 instruction set support.
+.IP "\fIcore2\fR" 4
+.IX Item "core2"
+Intel Core2 \s-1CPU\s0 with 64\-bit extensions, \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0 and \s-1SSE3\s0
+instruction set support.
 .IP "\fIk6\fR" 4
 .IX Item "k6"
 \&\s-1AMD\s0 K6 \s-1CPU\s0 with \s-1MMX\s0 instruction set support.
@@ -8770,6 +8774,9 @@ implemented for this chip.)
 .IX Item "c3-2"
 Via C3\-2 \s-1CPU\s0 with \s-1MMX\s0 and \s-1SSE\s0 instruction set support.  (No scheduling is
 implemented for this chip.)
+.IP "\fIgeode\fR" 4
+.IX Item "geode"
+Embedded AMD \s-1CPU\s0 with \s-1MMX\s0 and 3dNOW! instruction set support.
 .RE
 .RS 4
 .Sp

Modified: projects/sv/contrib/gcc/doc/invoke.texi
==============================================================================
--- projects/sv/contrib/gcc/doc/invoke.texi	Fri Mar 11 16:24:49 2011	(r219505)
+++ projects/sv/contrib/gcc/doc/invoke.texi	Fri Mar 11 16:30:30 2011	(r219506)
@@ -9369,6 +9369,9 @@ set support.
 @item nocona
 Improved version of Intel Pentium4 CPU with 64-bit extensions, MMX, SSE,
 SSE2 and SSE3 instruction set support.
+ at item core2
+Intel Core2 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3 and SSSE3
+instruction set support.
 @item k6
 AMD K6 CPU with MMX instruction set support.
 @item k6-2, k6-3
@@ -9396,6 +9399,8 @@ implemented for this chip.)
 @item c3-2
 Via C3-2 CPU with MMX and SSE instruction set support.  (No scheduling is
 implemented for this chip.)
+ at item geode
+Embedded AMD CPU with MMX and 3dNOW! instruction set support.
 @end table
 
 While picking a specific @var{cpu-type} will schedule things appropriately

Modified: projects/sv/contrib/gdb/gdb/i386-tdep.c
==============================================================================
--- projects/sv/contrib/gdb/gdb/i386-tdep.c	Fri Mar 11 16:24:49 2011	(r219505)
+++ projects/sv/contrib/gdb/gdb/i386-tdep.c	Fri Mar 11 16:30:30 2011	(r219506)
@@ -735,7 +735,7 @@ i386_skip_prologue (CORE_ADDR start_pc)
 
       /* addl y,%ebx */
       if (delta > 0 && op == 0x81
-	  && read_memory_unsigned_integer (pc + delta + 1, 1) == 0xc3);
+	  && read_memory_unsigned_integer (pc + delta + 1, 1) == 0xc3)
 	{
 	  pc += delta + 6;
 	}

Modified: projects/sv/contrib/libpcap/inet.c
==============================================================================
--- projects/sv/contrib/libpcap/inet.c	Fri Mar 11 16:24:49 2011	(r219505)
+++ projects/sv/contrib/libpcap/inet.c	Fri Mar 11 16:30:30 2011	(r219506)
@@ -431,26 +431,54 @@ add_addr_to_iflist(pcap_if_t **alldevs, 
 	strlcpy(ifrdesc.ifr_name, name, sizeof ifrdesc.ifr_name);
 	s = socket(AF_INET, SOCK_DGRAM, 0);
 	if (s >= 0) {
+#ifdef __FreeBSD__
+		/*
+		 * On FreeBSD, if the buffer isn't big enough for the
+		 * description, the ioctl succeeds, but the description
+		 * isn't copied, ifr_buffer.length is set to the description
+		 * length, and ifr_buffer.buffer is set to NULL.
+		 */
 		for (;;) {
 			free(description);
 			if ((description = malloc(descrlen)) != NULL) {
-#ifdef __FreeBSD__
 				ifrdesc.ifr_buffer.buffer = description;
 				ifrdesc.ifr_buffer.length = descrlen;
-#else /* __FreeBSD__ */
-				ifrdesc.ifr_data = (caddr_t)description;
-#endif /* __FreeBSD__ */
-				if (ioctl(s, SIOCGIFDESCR, &ifrdesc) == 0)
-					break;
-#ifdef __FreeBSD__
-				else if (errno == ENAMETOOLONG)
-					descrlen = ifrdesc.ifr_buffer.length;
-#endif /* __FreeBSD__ */
-				else
+				if (ioctl(s, SIOCGIFDESCR, &ifrdesc) == 0) {
+					if (ifrdesc.ifr_buffer.buffer ==
+					    description)
+						break;
+					else
+						descrlen = ifrdesc.ifr_buffer.length;
+				} else {
+					/*
+					 * Failed to get interface description.
+					 */
+					free(description);
+					description = NULL;
 					break;
+				}
 			} else
 				break;
 		}
+#else /* __FreeBSD__ */
+		/*
+		 * The only other OS that currently supports
+		 * SIOCGIFDESCR is OpenBSD, and it has no way
+		 * to get the description length - it's clamped
+		 * to a maximum of IFDESCRSIZE.
+		 */
+		if ((description = malloc(descrlen)) != NULL) {
+			ifrdesc.ifr_data = (caddr_t)description;
+			if (ioctl(s, SIOCGIFDESCR, &ifrdesc) != 0) {
+				/*
+				 * Failed to get interface description.
+				 */
+				free(description);
+				description = NULL;
+			}
+		} else
+			break;
+#endif /* __FreeBSD__ */
 		close(s);
 		if (description != NULL && strlen(description) == 0) {
 			free(description);

Modified: projects/sv/contrib/tzdata/leapseconds
==============================================================================
--- projects/sv/contrib/tzdata/leapseconds	Fri Mar 11 16:24:49 2011	(r219505)
+++ projects/sv/contrib/tzdata/leapseconds	Fri Mar 11 16:30:30 2011	(r219506)
@@ -1,5 +1,5 @@
 # <pre>
-# @(#)leapseconds	8.10
+# @(#)leapseconds	8.11
 # This file is in the public domain, so clarified as of
 # 2009-05-17 by Arthur David Olson.
 
@@ -56,13 +56,13 @@ Leap	2008	Dec	31	23:59:60	+	S
 # SERVICE DE LA ROTATION TERRESTRE
 # OBSERVATOIRE DE PARIS
 # 61, Av. de l'Observatoire 75014 PARIS (France)
-# Tel.      : 33 (0) 1 40 51 22 26
+# Tel.      : 33 (0) 1 40 51 22 29
 # FAX       : 33 (0) 1 40 51 22 91
 # Internet  : services.iers at obspm.fr
 #
-# Paris, 14 July 2010
+# Paris, 2 February 2011
 #
-# Bulletin C 40
+# Bulletin C 41
 #
 # To authorities responsible
 # for the measurement and
@@ -70,9 +70,9 @@ Leap	2008	Dec	31	23:59:60	+	S
 #
 # INFORMATION ON UTC - TAI
 #
-# NO positive leap second will be introduced at the end of December 2010.
+# NO positive leap second will be introduced at the end of June 2011.
 # The difference between Coordinated Universal Time UTC and the
-# International Atomic Time TAI is :
+# International Atomic Time TAI is :		
 #
 # from 2009 January 1, 0h UTC, until further notice : UTC-TAI = -34 s
 #
@@ -82,6 +82,6 @@ Leap	2008	Dec	31	23:59:60	+	S
 # will be no time step at the next possible date.
 #
 # Daniel GAMBIS
-# Director
-# Earth Orientation Center of IERS
+# Head			
+# Earth Orientation Center of the IERS
 # Observatoire de Paris, France

Modified: projects/sv/contrib/tzdata/northamerica
==============================================================================
--- projects/sv/contrib/tzdata/northamerica	Fri Mar 11 16:24:49 2011	(r219505)
+++ projects/sv/contrib/tzdata/northamerica	Fri Mar 11 16:30:30 2011	(r219506)
@@ -1,5 +1,5 @@
 # <pre>
-# @(#)northamerica	8.40
+# @(#)northamerica	8.41
 # This file is in the public domain, so clarified as of
 # 2009-05-17 by Arthur David Olson.
 
@@ -426,15 +426,74 @@ Zone America/Los_Angeles -7:52:58 -	LMT	
 # were nearby inhabitants in some cases and for our purposes perhaps
 # it's best to simply use the official transition.
 #
+
+# From Steve Ferguson (2011-01-31):
+# The author lives in Alaska and many of the references listed are only
+# available to Alaskan residents.
+#
+# <a href="http://www.alaskahistoricalsociety.org/index.cfm?section=discover%20alaska&page=Glimpses%20of%20the%20Past&viewpost=2&ContentId=98">
+# http://www.alaskahistoricalsociety.org/index.cfm?section=discover%20alaska&page=Glimpses%20of%20the%20Past&viewpost=2&ContentId=98
+# </a>
+
+# From Arthur David Olson (2011-02-01):
+# Here's database-relevant material from the 2001 "Alaska History" article:
+#
+# On September 20 [1979]...DOT...officials decreed that on April 27,
+# 1980, Juneau and other nearby communities would move to Yukon Time.
+# Sitka, Petersburg, Wrangell, and Ketchikan, however, would remain on
+# Pacific Time.
+#
+# ...on September 22, 1980, DOT Secretary Neil E. Goldschmidt rescinded the
+# Department's September 1979 decision. Juneau and other communities in
+# northern Southeast reverted to Pacific Time on October 26.
+#
+# On October 28 [1983]...the Metlakatla Indian Community Council voted
+# unanimously to keep the reservation on Pacific Time.
+#
+# According to DOT official Joanne Petrie, Indian reservations are not
+# bound to follow time zones imposed by neighboring jurisdictions.
+#
+# (The last is consistent with how the database now handles the Navajo
+# Nation.)
+
+# From Arthur David Olson (2011-02-09):
+# I just spoke by phone with a staff member at the Metlakatla Indian
+# Community office (using contact information available at
+# <a href="http://www.commerce.state.ak.us/dca/commdb/CIS.cfm?Comm_Boro_name=Metlakatla">
+# http://www.commerce.state.ak.us/dca/commdb/CIS.cfm?Comm_Boro_name=Metlakatla
+# </a>).
+# It's shortly after 1:00 here on the east coast of the United States;
+# the staffer said it was shortly after 10:00 there. When I asked whether
+# that meant they were on Pacific time, they said no--they were on their
+# own time. I asked about daylight saving; they said it wasn't used. I
+# did not inquire about practices in the past.
+
 # Zone	NAME		GMTOFF	RULES	FORMAT	[UNTIL]
 Zone America/Juneau	 15:02:19 -	LMT	1867 Oct 18
 			 -8:57:41 -	LMT	1900 Aug 20 12:00
 			 -8:00	-	PST	1942
 			 -8:00	US	P%sT	1946
 			 -8:00	-	PST	1969
+			 -8:00	US	P%sT	1980 Apr 27 2:00
+			 -9:00	US	Y%sT	1980 Oct 26 2:00	
+			 -8:00	US	P%sT	1983 Oct 30 2:00
+			 -9:00	US	Y%sT	1983 Nov 30
+			 -9:00	US	AK%sT
+Zone America/Sitka	 -14:58:47 -	LMT	1867 Oct 18
+			 -9:01:13 -	LMT	1900 Aug 20 12:00
+			 -8:00	-	PST	1942
+			 -8:00	US	P%sT	1946
+			 -8:00	-	PST	1969
 			 -8:00	US	P%sT	1983 Oct 30 2:00
 			 -9:00	US	Y%sT	1983 Nov 30
 			 -9:00	US	AK%sT
+Zone America/Metlakatla	 15:13:42 -	LMT	1867 Oct 18
+			 -8:46:18 -	LMT	1900 Aug 20 12:00
+			 -8:00	-	PST	1942
+			 -8:00	US	P%sT	1946
+			 -8:00	-	PST	1969
+			 -8:00	US	P%sT	1983 Oct 30 2:00
+			 -8:00	US	MeST
 Zone America/Yakutat	 14:41:05 -	LMT	1867 Oct 18
 			 -9:18:55 -	LMT	1900 Aug 20 12:00
 			 -9:00	-	YST	1942

Modified: projects/sv/contrib/tzdata/southamerica
==============================================================================
--- projects/sv/contrib/tzdata/southamerica	Fri Mar 11 16:24:49 2011	(r219505)
+++ projects/sv/contrib/tzdata/southamerica	Fri Mar 11 16:30:30 2011	(r219506)
@@ -1,5 +1,5 @@
 # <pre>
-# @(#)southamerica	8.44
+# @(#)southamerica	8.45
 # This file is in the public domain, so clarified as of
 # 2009-05-17 by Arthur David Olson.
 
@@ -1154,6 +1154,23 @@ Zone America/Rio_Branco	-4:31:12 -	LMT	1
 # From Arthur Daivd Olson (2010-03-06):
 # Angel Chiang's message confirmed by Julio Pacheco; Julio provided a patch.
 
+# From Glenn Eychaner (2011-03-02): [geychaner at mac.com]
+# It appears that the Chilean government has decided to postpone the
+# change from summer time to winter time again, by three weeks to April
+# 2nd:
+# <a href="http://www.emol.com/noticias/nacional/detalle/detallenoticias.asp?idnoticia=467651">
+# http://www.emol.com/noticias/nacional/detalle/detallenoticias.asp?idnoticia=467651
+# </a>
+#
+# This is not yet reflected in the offical "cambio de hora" site, but
+# probably will be soon:
+# <a href="http://www.horaoficial.cl/cambio.htm">
+# http://www.horaoficial.cl/cambio.htm
+# </a>
+
+# From Arthur David Olson (2011-03-02):
+# The emol.com article mentions a water shortage as the cause of the
+# postponement, which may mean that it's not a permanent change.
 # Rule	NAME	FROM	TO	TYPE	IN	ON	AT	SAVE	LETTER/S
 Rule	Chile	1927	1932	-	Sep	 1	0:00	1:00	S
 Rule	Chile	1928	1932	-	Apr	 1	0:00	0	-
@@ -1189,8 +1206,8 @@ Rule	Chile	2000	2007	-	Mar	Sun>=9	3:00u	
 # which is used below in specifying the transition.
 Rule	Chile	2008	only	-	Mar	30	3:00u	0	-
 Rule	Chile	2009	only	-	Mar	Sun>=9	3:00u	0	-
-Rule	Chile	2010	only	-	Apr	 4	3:00u	0	-
-Rule	Chile	2011	max	-	Mar	Sun>=9	3:00u	0	-
+Rule	Chile	2010	2011	-	Apr	Sun>=1	3:00u	0	-
+Rule	Chile	2012	max	-	Mar	Sun>=9	3:00u	0	-
 # IATA SSIM anomalies: (1992-02) says 1992-03-14;
 # (1996-09) says 1998-03-08.  Ignore these.
 # Zone	NAME		GMTOFF	RULES	FORMAT	[UNTIL]

Modified: projects/sv/contrib/tzdata/zone.tab
==============================================================================
--- projects/sv/contrib/tzdata/zone.tab	Fri Mar 11 16:24:49 2011	(r219505)
+++ projects/sv/contrib/tzdata/zone.tab	Fri Mar 11 16:30:30 2011	(r219506)
@@ -1,5 +1,5 @@
 # <pre>
-# @(#)zone.tab	8.40
+# @(#)zone.tab	8.41
 # This file is in the public domain, so clarified as of
 # 2009-05-17 by Arthur David Olson.
 #
@@ -412,9 +412,11 @@ US	+332654-1120424	America/Phoenix	Mount
 US	+340308-1181434	America/Los_Angeles	Pacific Time
 US	+611305-1495401	America/Anchorage	Alaska Time
 US	+581807-1342511	America/Juneau	Alaska Time - Alaska panhandle
+US	+571035-1351807	America/Sitka	Alaska Time - southeast Alaska panhandle
 US	+593249-1394338	America/Yakutat	Alaska Time - Alaska panhandle neck
 US	+643004-1652423	America/Nome	Alaska Time - west Alaska
 US	+515248-1763929	America/Adak	Aleutian Islands
+US	+550737-1313435	America/Metlakatla	Metlakatla Time - Annette Island
 US	+211825-1575130	Pacific/Honolulu	Hawaii
 UY	-3453-05611	America/Montevideo
 UZ	+3940+06648	Asia/Samarkand	west Uzbekistan

Modified: projects/sv/include/complex.h
==============================================================================
--- projects/sv/include/complex.h	Fri Mar 11 16:24:49 2011	(r219505)
+++ projects/sv/include/complex.h	Fri Mar 11 16:30:30 2011	(r219506)
@@ -49,6 +49,8 @@ long double	cabsl(long double complex);
 double		carg(double complex);
 float		cargf(float complex);
 long double	cargl(long double complex);
+double complex	cexp(double complex);
+float complex	cexpf(float complex);
 double		cimag(double complex) __pure2;
 float		cimagf(float complex) __pure2;
 long double	cimagl(long double complex) __pure2;

Modified: projects/sv/lib/libc/stdlib/malloc.3
==============================================================================
--- projects/sv/lib/libc/stdlib/malloc.3	Fri Mar 11 16:24:49 2011	(r219505)
+++ projects/sv/lib/libc/stdlib/malloc.3	Fri Mar 11 16:30:30 2011	(r219506)
@@ -218,7 +218,7 @@ thread-specific cache garbage collection
 Garbage collection is actually performed incrementally, one size
 class at a time, in order to avoid large collection pauses.
 The default sweep interval is 8192;
-.Ev JEMALLOC_OPTIONS=14g
+.Ev MALLOC_OPTIONS=14g
 will disable garbage collection.
 .It H
 Double/halve the number of thread-specific cache slots per size
@@ -232,7 +232,7 @@ See the
 .Dq G
 option for related tuning information.
 The default number of cache slots is 128;
-.Ev JEMALLOC_OPTIONS=7h
+.Ev MALLOC_OPTIONS=7h
 will disable thread-specific caching.
 Note that one cache slot per size class is not a valid
 configuration due to implementation details.

Modified: projects/sv/lib/libpam/modules/pam_ssh/pam_ssh.c
==============================================================================
--- projects/sv/lib/libpam/modules/pam_ssh/pam_ssh.c	Fri Mar 11 16:24:49 2011	(r219505)
+++ projects/sv/lib/libpam/modules/pam_ssh/pam_ssh.c	Fri Mar 11 16:30:30 2011	(r219506)
@@ -103,11 +103,11 @@ pam_ssh_load_key(const char *dir, const 
 	comment = NULL;

*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***

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