svn commit: r221147 - in projects/altix/sys/ia64: ia64 include

Marcel Moolenaar marcel at FreeBSD.org
Thu Apr 28 03:33:13 UTC 2011


Author: marcel
Date: Thu Apr 28 03:33:12 2011
New Revision: 221147
URL: http://svn.freebsd.org/changeset/base/221147

Log:
  Re-implement os_boot_rendez to work with PBVM.

Modified:
  projects/altix/sys/ia64/ia64/mp_locore.S
  projects/altix/sys/ia64/ia64/mp_machdep.c
  projects/altix/sys/ia64/include/smp.h

Modified: projects/altix/sys/ia64/ia64/mp_locore.S
==============================================================================
--- projects/altix/sys/ia64/ia64/mp_locore.S	Thu Apr 28 00:40:23 2011	(r221146)
+++ projects/altix/sys/ia64/ia64/mp_locore.S	Thu Apr 28 03:33:12 2011	(r221147)
@@ -42,86 +42,176 @@
  */
 	.align	32
 ENTRY_NOPROFILE(os_boot_rendez,0)
-	mov	r16=cr.ivr	// clear IRR bit
+{	.mmi
+	mov	r8 = cr.ivr		// clear IRR bit
 	;;
 	srlz.d
-	mov	cr.eoi=r0	// ACK the wake-up
+	mov	r16 = (IA64_PBVM_RR << 8) | (IA64_PBVM_PAGE_SHIFT << 2)
+}
+{	.mmi
+	mov	cr.eoi = r0		// ACK the wake-up
 	;;
 	srlz.d
-	rsm	IA64_PSR_IC|IA64_PSR_I
-	;;
-	mov     r16 = (4<<8)|(16<<2)
-	movl    r17 = 4<<61
+	dep.z	r17 = IA64_PBVM_RR, 61, 3
 	;;
+}
+{	.mmi
+	rsm	IA64_PSR_IC | IA64_PSR_I
 	mov     rr[r17] = r16
+	add	r2 = 8, r1
+	;;
+}
+{	.mlx
+	srlz.i
+	movl	r16 = IA64_PBVM_PGTBL
+	;;
+}
+{	.mmi
+	ld8	r17 = [r1], 16		// as_pgtbl_pte
+	ld8	r18 = [r2], 16		// as_pgtbl_itir
+	mov	r8 = r0
+	;;
+}
+{	.mmi
+	mov	cr.ifa = r16
+	mov	cr.itir = r18
+	mov	r9 = r0
 	;;
+}
+{	.mmi
 	srlz.d
-	mov	r16 = (5<<8)|(PAGE_SHIFT<<2)|1
-	movl	r17 = 5<<61
+	ptr.d	r16, r18
+	nop	0
 	;;
-	mov	rr[r17] = r16
+}
+{	.mmi
+	srlz.d
+	itr.d	dtr[r8] = r17
+	nop	0
 	;;
+}
+{	.mmi
 	srlz.d
-	mov	r16 = (6<<8)|(PAGE_SHIFT<<2)
-	movl	r17 = 6<<61
+	ld8	r16 = [r1], 16		// as_text_va
+	add	r8 = 1, r8
+	;;
+}
+{	.mmi
+	ld8	r17 = [r2], 16		// as_text_pte
+	ld8	r18 = [r1], 16		// as_text_itir
+	nop	0
 	;;
-	mov	rr[r17] = r16
+}
+{	.mmi
+	mov	cr.ifa = r16
+	mov	cr.itir = r18
+	nop	0
 	;;
+}
+{	.mmi
 	srlz.d
-	mov	r16 = (7<<8)|(PAGE_SHIFT<<2)
-	movl	r17 = 7<<61
+	ptr.d	r16, r18
+	nop	0
 	;;
-	mov	rr[r17] = r16
+}
+{	.mmi
+	srlz.d
+	itr.d	dtr[r8] = r17
+	nop	0
 	;;
+}
+{	.mmi
 	srlz.d
-	mov	r18 = 28<<2
-	movl	r16 = PTE_PRESENT+PTE_MA_WB+PTE_ACCESSED+PTE_DIRTY+ \
-			PTE_PL_KERN+PTE_AR_RWX+PTE_ED
+	ptr.i	r16, r18
+	add	r8 = 1, r8
 	;;
-	mov	cr.ifa = r17
-	mov	cr.itir = r18
-	ptr.d	r17, r18
-	ptr.i	r17, r18
+}
+{	.mmi
+	srlz.i
 	;;
+	itr.i	itr[r9] = r17
+	nop	0
+	;;
+}
+{	.mmi
 	srlz.i
 	;;
-	itr.d	dtr[r0] = r16
-	mov	r18 = IA64_DCR_DEFAULT
+	ld8	r16 = [r2], 16          // as_data_va
+	add	r9 = 1, r9
+	;;
+}
+{	.mmi
+	ld8	r17 = [r1], 16		// as_data_pte
+	ld8	r18 = [r2], 16		// as_data_itir
+	nop	0
 	;;
-	itr.i	itr[r0] = r16
-	mov	cr.dcr = r18
+}
+{	.mmi
+	mov	cr.ifa = r16
+	mov	cr.itir = r18
+	nop	0
 	;;
-	srlz.i
+}
+{	.mmi
+	srlz.d
+	ptr.d	r16, r18
+	nop	0
+	;;
+}
+{	.mmi
+	srlz.d
+	itr.d	dtr[r8] = r17
+	mov	r19 = IA64_DCR_DEFAULT
 	;;
-1:	mov	r16 = ip
-	add	r17 = 2f-1b, r17
-	movl	r18 = (IA64_PSR_AC|IA64_PSR_BN|IA64_PSR_DFH|IA64_PSR_DT|IA64_PSR_IC|IA64_PSR_IT|IA64_PSR_RT)
+}
+{	.mmi
+	srlz.d
+	ld8	r16 = [r1], 16		// as_kstack
+	add	r8 = 1, r8
 	;;
-	add	r17 = r17, r16
+}
+{	.mmi
+	ld8	r17 = [r2], 16		// as_kstack_top
+	mov	cr.dcr = r19
+	nop	0
+	;;
+}
+{	.mlx
+	srlz.i
+	movl	r18 = IA64_PSR_BN | IA64_PSR_IT | IA64_PSR_DT | IA64_PSR_IC | \
+			IA64_PSR_RT | IA64_PSR_DFH
+	;;
+}
+1:
+{	.mii
 	mov	cr.ipsr = r18
-	mov	cr.ifs = r0
+	mov	r19 = ip
 	;;
-	mov	cr.iip = r17
+	add	r19 = 2f-1b, r19
 	;;
+}
+{	.mmi
+	mov	cr.ifs = r0
+	mov	cr.iip = r19
+	nop	0
+	;;
+}
+
 	rfi
+	;;
 
 	.align	32
 2:
 {	.mlx
 	mov	ar.rsc = 0
-	movl	r16 = ia64_vector_table			// set up IVT early
-	;;
-}
-{	.mlx
-	mov	cr.iva = r16
-	movl	r16 = ap_stack
+	movl	r18 = ia64_vector_table		// set up IVT early
 	;;
 }
 {	.mmi
-	srlz.i
+	mov	cr.iva = r18
 	;;
-	ld8	r16 = [r16]
-	mov	r18 = KSTACK_PAGES*PAGE_SIZE-SIZEOF_PCB-SIZEOF_TRAPFRAME-16
+	srlz.i
+	nop	0
 	;;
 }
 {	.mlx
@@ -132,8 +222,8 @@ ENTRY_NOPROFILE(os_boot_rendez,0)
 {	.mmi
 	loadrs
 	;;
-	alloc	r17 = ar.pfs, 0, 0, 0, 0
-	add	sp = r18, r16
+	alloc	r18 = ar.pfs, 0, 0, 0, 0
+	add	sp = -16, r17
 	;;
 }
 {	.mib

Modified: projects/altix/sys/ia64/ia64/mp_machdep.c
==============================================================================
--- projects/altix/sys/ia64/ia64/mp_machdep.c	Thu Apr 28 00:40:23 2011	(r221146)
+++ projects/altix/sys/ia64/ia64/mp_machdep.c	Thu Apr 28 03:33:12 2011	(r221147)
@@ -174,7 +174,7 @@ ia64_ap_startup(void)
 {
 	uint64_t vhpt;
 
-	pcpup = ap_pcpu;
+	pcpup = ia64_ap_state.as_pcpu;
 	ia64_set_k4((intptr_t)pcpup);
 
 	vhpt = PCPU_GET(md.vhpt);
@@ -182,8 +182,8 @@ ia64_ap_startup(void)
 	ia64_set_pta(vhpt + (1 << 8) + (pmap_vhpt_log2size << 2) + 1);
 	ia64_srlz_i();
 
-	ap_awake = 1;
-	ap_delay = 0;
+	ia64_ap_state.as_awake = 1;
+	ia64_ap_state.as_delay = 0;
 
 	map_pal_code();
 	map_gateway_page();
@@ -191,14 +191,14 @@ ia64_ap_startup(void)
 	ia64_set_fpsr(IA64_FPSR_DEFAULT);
 
 	/* Wait until it's time for us to be unleashed */
-	while (ap_spin)
+	while (ia64_ap_state.as_spin)
 		cpu_spinwait();
 
 	/* Initialize curthread. */
 	KASSERT(PCPU_GET(idlethread) != NULL, ("no idle thread"));
 	PCPU_SET(curthread, PCPU_GET(idlethread));
 
-	atomic_add_int(&ap_awake, 1);
+	atomic_add_int(&ia64_ap_state.as_awake, 1);
 	while (!smp_started)
 		cpu_spinwait();
 
@@ -301,28 +301,32 @@ cpu_mp_start()
 	struct ia64_sal_result result;
 	struct ia64_fdesc *fd;
 	struct pcpu *pc;
+	u_char *stp;
 
-	ap_spin = 1;
+	ia64_ap_state.as_spin = 1;
 
 	fd = (struct ia64_fdesc *) os_boot_rendez;
 	result = ia64_sal_entry(SAL_SET_VECTORS, SAL_OS_BOOT_RENDEZ,
-	    ia64_tpa(fd->func), ia64_tpa(ia64_ap_state), 0, 0, 0, 0);
+	    ia64_tpa(fd->func), ia64_tpa((uintptr_t)&ia64_ap_state),
+	    0, 0, 0, 0);
 
 	SLIST_FOREACH(pc, &cpuhead, pc_allcpu) {
 		pc->pc_md.current_pmap = kernel_pmap;
 		pc->pc_other_cpus = all_cpus & ~pc->pc_cpumask;
 		if (pc->pc_cpuid > 0) {
-			ap_pcpu = pc;
+			ia64_ap_state.as_pcpu = pc;
 			pc->pc_md.vhpt = pmap_alloc_vhpt();
 			if (pc->pc_md.vhpt == 0) {
 				printf("SMP: WARNING: unable to allocate VHPT"
 				    " for cpu%d", pc->pc_cpuid);
 				continue;
 			}
-			ap_stack = malloc(KSTACK_PAGES * PAGE_SIZE, M_SMP,
-			    M_WAITOK);
-			ap_delay = 2000;
-			ap_awake = 0;
+			stp = malloc(KSTACK_PAGES * PAGE_SIZE, M_SMP, M_WAITOK);
+			ia64_ap_state.as_kstack = stp;
+			ia64_ap_state.as_kstack_top = stp + KSTACK_PAGES *
+			    PAGE_SIZE - 16;
+			ia64_ap_state.as_delay = 2000;
+			ia64_ap_state.as_awake = 0;
 
 			if (bootverbose)
 				printf("SMP: waking up cpu%d\n", pc->pc_cpuid);
@@ -331,10 +335,10 @@ cpu_mp_start()
 
 			do {
 				DELAY(1000);
-			} while (--ap_delay > 0);
-			pc->pc_md.awake = ap_awake;
+			} while (--ia64_ap_state.as_delay > 0);
+			pc->pc_md.awake = ia64_ap_state.as_awake;
 
-			if (!ap_awake)
+			if (!ia64_ap_state.as_awake)
 				printf("SMP: WARNING: cpu%d did not wake up\n",
 				    pc->pc_cpuid);
 		} else
@@ -374,10 +378,10 @@ cpu_mp_unleash(void *dummy)
 		}
 	}
 
-	ap_awake = 1;
-	ap_spin = 0;
+	ia64_ap_state.as_awake = 1;
+	ia64_ap_state.as_spin = 0;
 
-	while (ap_awake != smp_cpus)
+	while (ia64_ap_state.as_awake != smp_cpus)
 		cpu_spinwait();
 
 	if (smp_cpus != cpus || cpus != mp_ncpus) {

Modified: projects/altix/sys/ia64/include/smp.h
==============================================================================
--- projects/altix/sys/ia64/include/smp.h	Thu Apr 28 00:40:23 2011	(r221146)
+++ projects/altix/sys/ia64/include/smp.h	Thu Apr 28 03:33:12 2011	(r221147)
@@ -17,17 +17,16 @@
 struct pcpu;
 
 struct ia64_ap_state {
-	uint64_t	as_pgtbl_pa;
-	uint64_t	as_pgtbl_va;
-	uint32_t	as_pgtblsz;
-	uint64_t	as_text_pa;
+	uint64_t	as_pgtbl_pte;
+	uint64_t	as_pgtbl_itir;
 	uint64_t	as_text_va;
-	uint32_t	as_textsz;
-	uint64_t	as_data_pa;
+	uint64_t	as_text_pte;
+	uint64_t	as_text_itir;
 	uint64_t	as_data_va;
-	uint32_t	as_datasz;
-	uint64_t	as_kstack;
-	uint64_t	as_kstack_top;
+	uint64_t	as_data_pte;
+	uint64_t	as_data_itir;
+	void		*as_kstack;
+	void		*as_kstack_top;
 	struct pcpu	*as_pcpu;
 	volatile u_int	as_delay;
 	volatile u_int	as_awake;


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