svn commit: r365617 - head/sys/dev/ice

Eric Joyner erj at FreeBSD.org
Thu Sep 10 23:46:14 UTC 2020


Author: erj
Date: Thu Sep 10 23:46:13 2020
New Revision: 365617
URL: https://svnweb.freebsd.org/changeset/base/365617

Log:
  ice(4): Update to 0.26.16
  
  Summary of changes:
  
  - Assorted bug fixes
  - Support for newer versions of the device firmware
  - Suspend/resume support
  - Support for Lenient Link Mode for E82X devices (e.g. can try to link with
    SFP/QSFP modules with bad EEPROMs)
  - Adds port-level rx_discards sysctl, similar to ixl(4)'s
  
  This version of the driver is intended to be used with DDP package 1.3.16.0,
  which has already been updated in a previous commit.
  
  Tested by:	Jeffrey Pieper <jeffrey.e.pieper at intel.com>
  MFC after:	3 days
  MFC with:	r365332, r365550
  Sponsored by:	Intel Corporation
  Differential Revision:	https://reviews.freebsd.org/D26322

Modified:
  head/sys/dev/ice/ice_adminq_cmd.h
  head/sys/dev/ice/ice_bitops.h
  head/sys/dev/ice/ice_common.c
  head/sys/dev/ice/ice_common.h
  head/sys/dev/ice/ice_controlq.c
  head/sys/dev/ice/ice_controlq.h
  head/sys/dev/ice/ice_dcb.c
  head/sys/dev/ice/ice_dcb.h
  head/sys/dev/ice/ice_drv_info.h
  head/sys/dev/ice/ice_flex_pipe.c
  head/sys/dev/ice/ice_flex_pipe.h
  head/sys/dev/ice/ice_flex_type.h
  head/sys/dev/ice/ice_flow.c
  head/sys/dev/ice/ice_flow.h
  head/sys/dev/ice/ice_hw_autogen.h
  head/sys/dev/ice/ice_lan_tx_rx.h
  head/sys/dev/ice/ice_lib.c
  head/sys/dev/ice/ice_lib.h
  head/sys/dev/ice/ice_nvm.c
  head/sys/dev/ice/ice_nvm.h
  head/sys/dev/ice/ice_protocol_type.h
  head/sys/dev/ice/ice_sched.c
  head/sys/dev/ice/ice_sched.h
  head/sys/dev/ice/ice_status.h
  head/sys/dev/ice/ice_strings.c
  head/sys/dev/ice/ice_switch.c
  head/sys/dev/ice/ice_switch.h
  head/sys/dev/ice/ice_type.h
  head/sys/dev/ice/if_ice_iflib.c
  head/sys/dev/ice/virtchnl.h
  head/sys/dev/ice/virtchnl_inline_ipsec.h

Modified: head/sys/dev/ice/ice_adminq_cmd.h
==============================================================================
--- head/sys/dev/ice/ice_adminq_cmd.h	Thu Sep 10 22:22:23 2020	(r365616)
+++ head/sys/dev/ice/ice_adminq_cmd.h	Thu Sep 10 23:46:13 2020	(r365617)
@@ -156,12 +156,13 @@ struct ice_aqc_list_caps_elem {
 #define ICE_AQC_CAPS_MSIX				0x0043
 #define ICE_AQC_CAPS_MAX_MTU				0x0047
 #define ICE_AQC_CAPS_NVM_VER				0x0048
+#define ICE_AQC_CAPS_OROM_VER				0x004A
+#define ICE_AQC_CAPS_NET_VER				0x004C
 #define ICE_AQC_CAPS_CEM				0x00F2
 #define ICE_AQC_CAPS_IWARP				0x0051
 #define ICE_AQC_CAPS_LED				0x0061
 #define ICE_AQC_CAPS_SDP				0x0062
 #define ICE_AQC_CAPS_WR_CSR_PROT			0x0064
-#define ICE_AQC_CAPS_NO_DROP_POLICY			0x0065
 #define ICE_AQC_CAPS_LOGI_TO_PHYSI_PORT_MAP		0x0073
 #define ICE_AQC_CAPS_SKU				0x0074
 #define ICE_AQC_CAPS_PORT_MAP				0x0075
@@ -281,13 +282,6 @@ struct ice_aqc_get_sw_cfg_resp_elem {
 #define ICE_AQC_GET_SW_CONF_RESP_IS_VF		BIT(15)
 };
 
-/* The response buffer is as follows. Note that the length of the
- * elements array varies with the length of the command response.
- */
-struct ice_aqc_get_sw_cfg_resp {
-	struct ice_aqc_get_sw_cfg_resp_elem elements[1];
-};
-
 /* Set Port parameters, (direct, 0x0203) */
 struct ice_aqc_set_port_params {
 	__le16 cmd_flags;
@@ -338,8 +332,6 @@ struct ice_aqc_set_port_params {
 #define ICE_AQC_RES_TYPE_SWITCH_PROF_BLDR_TCAM		0x49
 #define ICE_AQC_RES_TYPE_ACL_PROF_BLDR_PROFID		0x50
 #define ICE_AQC_RES_TYPE_ACL_PROF_BLDR_TCAM		0x51
-#define ICE_AQC_RES_TYPE_FD_PROF_BLDR_PROFID		0x58
-#define ICE_AQC_RES_TYPE_FD_PROF_BLDR_TCAM		0x59
 #define ICE_AQC_RES_TYPE_HASH_PROF_BLDR_PROFID		0x60
 #define ICE_AQC_RES_TYPE_HASH_PROF_BLDR_TCAM		0x61
 /* Resource types 0x62-67 are reserved for Hash profile builder */
@@ -372,15 +364,6 @@ struct ice_aqc_get_res_resp_elem {
 	__le16 total_free; /* Resources un-allocated/not reserved by any PF */
 };
 
-/* Buffer for Get Resource command */
-struct ice_aqc_get_res_resp {
-	/* Number of resource entries to be calculated using
-	 * datalen/sizeof(struct ice_aqc_cmd_resp)).
-	 * Value of 'datalen' gets updated as part of response.
-	 */
-	struct ice_aqc_get_res_resp_elem elem[1];
-};
-
 /* Allocate Resources command (indirect 0x0208)
  * Free Resources command (indirect 0x0209)
  */
@@ -406,7 +389,7 @@ struct ice_aqc_alloc_free_res_elem {
 #define ICE_AQC_RES_TYPE_VSI_PRUNE_LIST_M	\
 				(0xF << ICE_AQC_RES_TYPE_VSI_PRUNE_LIST_S)
 	__le16 num_elems;
-	struct ice_aqc_res_elem elem[1];
+	struct ice_aqc_res_elem elem[STRUCT_HACK_VAR_LEN];
 };
 
 /* Get Allocated Resource Descriptors Command (indirect 0x020A) */
@@ -428,10 +411,6 @@ struct ice_aqc_get_allocd_res_desc {
 	__le32 addr_low;
 };
 
-struct ice_aqc_get_allocd_res_desc_resp {
-	struct ice_aqc_res_elem elem[1];
-};
-
 /* Add VSI (indirect 0x0210)
  * Update VSI (indirect 0x0211)
  * Get VSI (indirect 0x0212)
@@ -758,7 +737,6 @@ struct ice_aqc_sw_rules {
 	__le32 addr_low;
 };
 
-#pragma pack(1)
 /* Add/Update/Get/Remove lookup Rx/Tx command/response entry
  * This structures describes the lookup rules and associated actions. "index"
  * is returned as part of a response to a successful Add command, and can be
@@ -841,9 +819,8 @@ struct ice_sw_rule_lkup_rx_tx {
 	 * lookup-type
 	 */
 	__le16 hdr_len;
-	u8 hdr[1];
+	u8 hdr[STRUCT_HACK_VAR_LEN];
 };
-#pragma pack()
 
 /* Add/Update/Remove large action command/response entry
  * "index" is returned as part of a response to a successful Add command, and
@@ -852,7 +829,6 @@ struct ice_sw_rule_lkup_rx_tx {
 struct ice_sw_rule_lg_act {
 	__le16 index; /* Index in large action table */
 	__le16 size;
-	__le32 act[1]; /* array of size for actions */
 	/* Max number of large actions */
 #define ICE_MAX_LG_ACT	4
 	/* Bit 0:1 - Action type */
@@ -903,6 +879,7 @@ struct ice_sw_rule_lg_act {
 #define ICE_LG_ACT_STAT_COUNT		0x7
 #define ICE_LG_ACT_STAT_COUNT_S		3
 #define ICE_LG_ACT_STAT_COUNT_M		(0x7F << ICE_LG_ACT_STAT_COUNT_S)
+	__le32 act[STRUCT_HACK_VAR_LEN]; /* array of size for actions */
 };
 
 /* Add/Update/Remove VSI list command/response entry
@@ -912,7 +889,7 @@ struct ice_sw_rule_lg_act {
 struct ice_sw_rule_vsi_list {
 	__le16 index; /* Index of VSI/Prune list */
 	__le16 number_vsi;
-	__le16 vsi[1]; /* Array of number_vsi VSI numbers */
+	__le16 vsi[STRUCT_HACK_VAR_LEN]; /* Array of number_vsi VSI numbers */
 };
 
 #pragma pack(1)
@@ -977,8 +954,10 @@ struct ice_aqc_set_query_pfc_mode {
 struct ice_aqc_set_dcb_params {
 	u8 cmd_flags; /* unused in response */
 #define ICE_AQC_LINK_UP_DCB_CFG    BIT(0)
+#define ICE_AQC_PERSIST_DCB_CFG    BIT(1)
 	u8 valid_flags; /* unused in response */
 #define ICE_AQC_LINK_UP_DCB_CFG_VALID    BIT(0)
+#define ICE_AQC_PERSIST_DCB_CFG_VALID    BIT(1)
 	u8 rsvd[14];
 };
 
@@ -1008,14 +987,6 @@ struct ice_aqc_sched_elem_cmd {
 	__le32 addr_low;
 };
 
-/* This is the buffer for:
- * Suspend Nodes (indirect 0x0409)
- * Resume Nodes (indirect 0x040A)
- */
-struct ice_aqc_suspend_resume_elem {
-	__le32 teid[1];
-};
-
 struct ice_aqc_txsched_move_grp_info_hdr {
 	__le32 src_parent_teid;
 	__le32 dest_parent_teid;
@@ -1025,7 +996,7 @@ struct ice_aqc_txsched_move_grp_info_hdr {
 
 struct ice_aqc_move_elem {
 	struct ice_aqc_txsched_move_grp_info_hdr hdr;
-	__le32 teid[1];
+	__le32 teid[STRUCT_HACK_VAR_LEN];
 };
 
 struct ice_aqc_elem_info_bw {
@@ -1078,17 +1049,9 @@ struct ice_aqc_txsched_topo_grp_info_hdr {
 
 struct ice_aqc_add_elem {
 	struct ice_aqc_txsched_topo_grp_info_hdr hdr;
-	struct ice_aqc_txsched_elem_data generic[1];
+	struct ice_aqc_txsched_elem_data generic[STRUCT_HACK_VAR_LEN];
 };
 
-struct ice_aqc_conf_elem {
-	struct ice_aqc_txsched_elem_data generic[1];
-};
-
-struct ice_aqc_get_elem {
-	struct ice_aqc_txsched_elem_data generic[1];
-};
-
 struct ice_aqc_get_topo_elem {
 	struct ice_aqc_txsched_topo_grp_info_hdr hdr;
 	struct ice_aqc_txsched_elem_data
@@ -1097,7 +1060,7 @@ struct ice_aqc_get_topo_elem {
 
 struct ice_aqc_delete_elem {
 	struct ice_aqc_txsched_topo_grp_info_hdr hdr;
-	__le32 teid[1];
+	__le32 teid[STRUCT_HACK_VAR_LEN];
 };
 
 /* Query Port ETS (indirect 0x040E)
@@ -1160,10 +1123,6 @@ struct ice_aqc_rl_profile_elem {
 	__le16 rl_encode;
 };
 
-struct ice_aqc_rl_profile_generic_elem {
-	struct ice_aqc_rl_profile_elem generic[1];
-};
-
 /* Configure L2 Node CGD (indirect 0x0414)
  * This indirect command allows configuring a congestion domain for given L2
  * node TEIDs in the scheduler topology.
@@ -1181,10 +1140,6 @@ struct ice_aqc_cfg_l2_node_cgd_elem {
 	u8 reserved[3];
 };
 
-struct ice_aqc_cfg_l2_node_cgd_data {
-	struct ice_aqc_cfg_l2_node_cgd_elem elem[1];
-};
-
 /* Query Scheduler Resource Allocation (indirect 0x0412)
  * This indirect command retrieves the scheduler resources allocated by
  * EMP Firmware to the given PF.
@@ -1330,7 +1285,7 @@ struct ice_aqc_get_phy_caps {
 #define ICE_PHY_TYPE_HIGH_100G_CAUI2		BIT_ULL(2)
 #define ICE_PHY_TYPE_HIGH_100G_AUI2_AOC_ACC	BIT_ULL(3)
 #define ICE_PHY_TYPE_HIGH_100G_AUI2		BIT_ULL(4)
-#define ICE_PHY_TYPE_HIGH_MAX_INDEX		19
+#define ICE_PHY_TYPE_HIGH_MAX_INDEX		5
 
 struct ice_aqc_get_phy_caps_data {
 	__le64 phy_type_low; /* Use values from ICE_PHY_TYPE_LOW_* */
@@ -1381,6 +1336,7 @@ struct ice_aqc_get_phy_caps_data {
 	u8 module_type[ICE_MODULE_TYPE_TOTAL_BYTE];
 #define ICE_AQC_MOD_TYPE_BYTE0_SFP_PLUS			0xA0
 #define ICE_AQC_MOD_TYPE_BYTE0_QSFP_PLUS		0x80
+#define ICE_AQC_MOD_TYPE_IDENT				1
 #define ICE_AQC_MOD_TYPE_BYTE1_SFP_PLUS_CU_PASSIVE	BIT(0)
 #define ICE_AQC_MOD_TYPE_BYTE1_SFP_PLUS_CU_ACTIVE	BIT(1)
 #define ICE_AQC_MOD_TYPE_BYTE1_10G_BASE_SR		BIT(4)
@@ -1490,6 +1446,9 @@ struct ice_aqc_get_link_status_data {
 #define ICE_AQ_LINK_TOPO_UNSUPP_MEDIA	BIT(7)
 	u8 link_cfg_err;
 #define ICE_AQ_LINK_CFG_ERR		BIT(0)
+#define ICE_AQ_LINK_ACT_PORT_OPT_INVAL	BIT(2)
+#define ICE_AQ_LINK_FEAT_ID_OR_CONFIG_ID_INVAL	BIT(3)
+#define ICE_AQ_LINK_TOPO_CRITICAL_SDP_ERR	BIT(4)
 	u8 link_info;
 #define ICE_AQ_LINK_UP			BIT(0)	/* Link Status */
 #define ICE_AQ_LINK_FAULT		BIT(1)
@@ -1607,7 +1566,7 @@ struct ice_aqc_set_mac_lb {
 	u8 reserved[15];
 };
 
-/* DNL Get Status command (indirect 0x680)
+/* DNL Get Status command (indirect 0x0680)
  * Structure used for the response, the command uses the generic
  * ice_aqc_generic struct to pass a buffer address to the FW.
  */
@@ -1667,7 +1626,7 @@ struct ice_aqc_dnl_get_status_data {
 	u32 sb_iosf_clk_cntr;
 };
 
-/* DNL run command (direct 0x681) */
+/* DNL run command (direct 0x0681) */
 struct ice_aqc_dnl_run_command {
 	u8 reserved0;
 	u8 command;
@@ -1686,7 +1645,7 @@ struct ice_aqc_dnl_run_command {
 	u8 reserved1[12];
 };
 
-/* DNL call command (indirect 0x682)
+/* DNL call command (indirect 0x0682)
  * Struct is used for both command and response
  */
 struct ice_aqc_dnl_call_command {
@@ -1698,14 +1657,14 @@ struct ice_aqc_dnl_call_command {
 	__le32 addr_low;
 };
 
-/* DNL call command/response buffer (indirect 0x682) */
+/* DNL call command/response buffer (indirect 0x0682) */
 struct ice_aqc_dnl_call {
 	__le32 stores[4];
 };
 
 /* Used for both commands:
- * DNL read sto command (indirect 0x683)
- * DNL write sto command (indirect 0x684)
+ * DNL read sto command (indirect 0x0683)
+ * DNL write sto command (indirect 0x0684)
  */
 struct ice_aqc_dnl_read_write_command {
 	u8 ctx;
@@ -1720,8 +1679,8 @@ struct ice_aqc_dnl_read_write_command {
 };
 
 /* Used for both command responses:
- * DNL read sto response (indirect 0x683)
- * DNL write sto response (indirect 0x684)
+ * DNL read sto response (indirect 0x0683)
+ * DNL write sto response (indirect 0x0684)
  */
 struct ice_aqc_dnl_read_write_response {
 	u8 reserved;
@@ -1732,14 +1691,14 @@ struct ice_aqc_dnl_read_write_response {
 	__le32 addr_low; /* Reserved for write command */
 };
 
-/* DNL set breakpoints command (indirect 0x686) */
+/* DNL set breakpoints command (indirect 0x0686) */
 struct ice_aqc_dnl_set_breakpoints_command {
 	__le32 reserved[2];
 	__le32 addr_high;
 	__le32 addr_low;
 };
 
-/* DNL set breakpoints data buffer structure (indirect 0x686) */
+/* DNL set breakpoints data buffer structure (indirect 0x0686) */
 struct ice_aqc_dnl_set_breakpoints {
 	u8 ctx;
 	u8 ena; /* 0- disabled, 1- enabled */
@@ -1747,7 +1706,7 @@ struct ice_aqc_dnl_set_breakpoints {
 	__le16 activity_id;
 };
 
-/* DNL read log data command(indirect 0x687) */
+/* DNL read log data command(indirect 0x0687) */
 struct ice_aqc_dnl_read_log_command {
 	__le16 reserved0;
 	__le16 offset;
@@ -1757,7 +1716,7 @@ struct ice_aqc_dnl_read_log_command {
 
 };
 
-/* DNL read log data response(indirect 0x687) */
+/* DNL read log data response(indirect 0x0687) */
 struct ice_aqc_dnl_read_log_response {
 	__le16 reserved;
 	__le16 size;
@@ -1976,6 +1935,7 @@ struct ice_aqc_get_port_options {
 
 struct ice_aqc_get_port_options_elem {
 	u8 pmd;
+#define ICE_AQC_PORT_INV_PORT_OPT	4
 #define ICE_AQC_PORT_OPT_PMD_COUNT_S	0
 #define ICE_AQC_PORT_OPT_PMD_COUNT_M	(0xF << ICE_AQC_PORT_OPT_PMD_COUNT_S)
 #define ICE_AQC_PORT_OPT_PMD_WIDTH_S	4
@@ -1995,13 +1955,6 @@ struct ice_aqc_get_port_options_elem {
 	u8 phy_scid[2];
 };
 
-/* The buffer for command 0x06EA contains port_options_count of options
- * in the option array.
- */
-struct ice_aqc_get_port_options_data {
-	struct ice_aqc_get_port_options_elem option[1];
-};
-
 /* Set Port Option (direct, 0x06EB) */
 struct ice_aqc_set_port_option {
 	u8 lport_num;
@@ -2114,6 +2067,7 @@ struct ice_aqc_nvm {
 #define ICE_AQC_NVM_LINK_TOPO_NETLIST_LEN		2 /* In bytes */
 #define ICE_AQC_NVM_NETLIST_NODE_COUNT_OFFSET		2
 #define ICE_AQC_NVM_NETLIST_NODE_COUNT_LEN		2 /* In bytes */
+#define ICE_AQC_NVM_NETLIST_NODE_COUNT_M		MAKEMASK(0x3FF, 0)
 #define ICE_AQC_NVM_NETLIST_ID_BLK_START_OFFSET		5
 #define ICE_AQC_NVM_NETLIST_ID_BLK_LEN			0x30 /* In words */
 
@@ -2353,6 +2307,18 @@ struct ice_aqc_lldp_stop_start_specific_agent {
 	u8 reserved[15];
 };
 
+/* LLDP Filter Control (direct 0x0A0A) */
+struct ice_aqc_lldp_filter_ctrl {
+	u8 cmd_flags;
+#define ICE_AQC_LLDP_FILTER_ACTION_M		MAKEMASK(3, 0)
+#define ICE_AQC_LLDP_FILTER_ACTION_ADD		0x0
+#define ICE_AQC_LLDP_FILTER_ACTION_DELETE	0x1
+#define ICE_AQC_LLDP_FILTER_ACTION_UPDATE	0x2
+	u8 reserved1;
+	__le16 vsi_num;
+	u8 reserved2[12];
+};
+
 /* Get/Set RSS key (indirect 0x0B04/0x0B02) */
 struct ice_aqc_get_set_rss_key {
 #define ICE_AQC_GSET_RSS_KEY_VSI_VALID	BIT(15)
@@ -2389,7 +2355,7 @@ struct ice_aqc_get_set_rss_keys {
 struct ice_aqc_get_set_rss_lut {
 #define ICE_AQC_GSET_RSS_LUT_VSI_VALID	BIT(15)
 #define ICE_AQC_GSET_RSS_LUT_VSI_ID_S	0
-#define ICE_AQC_GSET_RSS_LUT_VSI_ID_M	(0x1FF << ICE_AQC_GSET_RSS_LUT_VSI_ID_S)
+#define ICE_AQC_GSET_RSS_LUT_VSI_ID_M	(0x3FF << ICE_AQC_GSET_RSS_LUT_VSI_ID_S)
 	__le16 vsi_id;
 #define ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_S	0
 #define ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_M	\
@@ -2450,7 +2416,7 @@ struct ice_aqc_add_tx_qgrp {
 	__le32 parent_teid;
 	u8 num_txqs;
 	u8 rsvd[3];
-	struct ice_aqc_add_txqs_perq txqs[1];
+	struct ice_aqc_add_txqs_perq txqs[STRUCT_HACK_VAR_LEN];
 };
 
 /* Disable Tx LAN Queues (indirect 0x0C31) */
@@ -2483,24 +2449,21 @@ struct ice_aqc_dis_txqs {
  * added before the start of the next group, to allow correct
  * alignment of the parent_teid field.
  */
+#pragma pack(1)
 struct ice_aqc_dis_txq_item {
 	__le32 parent_teid;
 	u8 num_qs;
 	u8 rsvd;
 	/* The length of the q_id array varies according to num_qs */
-	__le16 q_id[1];
-	/* This only applies from F8 onward */
 #define ICE_AQC_Q_DIS_BUF_ELEM_TYPE_S		15
 #define ICE_AQC_Q_DIS_BUF_ELEM_TYPE_LAN_Q	\
 			(0 << ICE_AQC_Q_DIS_BUF_ELEM_TYPE_S)
 #define ICE_AQC_Q_DIS_BUF_ELEM_TYPE_RDMA_QSET	\
 			(1 << ICE_AQC_Q_DIS_BUF_ELEM_TYPE_S)
+	__le16 q_id[STRUCT_HACK_VAR_LEN];
 };
+#pragma pack()
 
-struct ice_aqc_dis_txq {
-	struct ice_aqc_dis_txq_item qgrps[1];
-};
-
 /* Tx LAN Queues Cleanup Event (0x0C31) */
 struct ice_aqc_txqs_cleanup {
 	__le16 caller_opc;
@@ -2540,11 +2503,11 @@ struct ice_aqc_move_txqs_elem {
 struct ice_aqc_move_txqs_data {
 	__le32 src_teid;
 	__le32 dest_teid;
-	struct ice_aqc_move_txqs_elem txqs[1];
+	struct ice_aqc_move_txqs_elem txqs[STRUCT_HACK_VAR_LEN];
 };
 
 /* Download Package (indirect 0x0C40) */
-/* Also used for Update Package (indirect 0x0C42) */
+/* Also used for Update Package (indirect 0x0C42 and 0x0C41) */
 struct ice_aqc_download_pkg {
 	u8 flags;
 #define ICE_AQC_DOWNLOAD_PKG_LAST_BUF	0x01
@@ -2593,7 +2556,7 @@ struct ice_aqc_get_pkg_info {
 /* Get Package Info List response buffer format (0x0C43) */
 struct ice_aqc_get_pkg_info_resp {
 	__le32 count;
-	struct ice_aqc_get_pkg_info pkg_info[1];
+	struct ice_aqc_get_pkg_info pkg_info[STRUCT_HACK_VAR_LEN];
 };
 
 /* Driver Shared Parameters (direct, 0x0C90) */
@@ -2617,6 +2580,50 @@ struct ice_aqc_event_lan_overflow {
 	u8 reserved[8];
 };
 
+/* Set Health Status (direct 0xFF20) */
+struct ice_aqc_set_health_status_config {
+	u8 event_source;
+#define ICE_AQC_HEALTH_STATUS_SET_PF_SPECIFIC_MASK	BIT(0)
+#define ICE_AQC_HEALTH_STATUS_SET_ALL_PF_MASK		BIT(1)
+#define ICE_AQC_HEALTH_STATUS_SET_GLOBAL_MASK		BIT(2)
+	u8 reserved[15];
+};
+
+/* Get Health Status codes (indirect 0xFF21) */
+struct ice_aqc_get_supported_health_status_codes {
+	__le16 health_code_count;
+	u8 reserved[6];
+	__le32 addr_high;
+	__le32 addr_low;
+};
+
+/* Get Health Status (indirect 0xFF22) */
+struct ice_aqc_get_health_status {
+	__le16 health_status_count;
+	u8 reserved[6];
+	__le32 addr_high;
+	__le32 addr_low;
+};
+
+/* Get Health Status event buffer entry, (0xFF22)
+ * repeated per reported health status
+ */
+struct ice_aqc_health_status_elem {
+	__le16 health_status_code;
+	__le16 event_source;
+#define ICE_AQC_HEALTH_STATUS_PF			(0x1)
+#define ICE_AQC_HEALTH_STATUS_PORT			(0x2)
+#define ICE_AQC_HEALTH_STATUS_GLOBAL			(0x3)
+	__le32 internal_data1;
+#define ICE_AQC_HEALTH_STATUS_UNDEFINED_DATA	(0xDEADBEEF)
+	__le32 internal_data2;
+};
+
+/* Clear Health Status (direct 0xFF23) */
+struct ice_aqc_clear_health_status {
+	__le32 reserved[4];
+};
+
 /**
  * struct ice_aq_desc - Admin Queue (AQ) descriptor
  * @flags: ICE_AQ_FLAG_* flags
@@ -2706,6 +2713,7 @@ struct ice_aq_desc {
 		struct ice_aqc_lldp_start lldp_start;
 		struct ice_aqc_lldp_set_local_mib lldp_set_mib;
 		struct ice_aqc_lldp_stop_start_specific_agent lldp_agent_ctrl;
+		struct ice_aqc_lldp_filter_ctrl lldp_filter_ctrl;
 		struct ice_aqc_get_set_rss_lut get_set_rss_lut;
 		struct ice_aqc_get_set_rss_key get_set_rss_key;
 		struct ice_aqc_add_txqs add_txqs;
@@ -2727,6 +2735,12 @@ struct ice_aq_desc {
 		struct ice_aqc_get_link_status get_link_status;
 		struct ice_aqc_event_lan_overflow lan_overflow;
 		struct ice_aqc_get_link_topo get_link_topo;
+		struct ice_aqc_set_health_status_config
+			set_health_status_config;
+		struct ice_aqc_get_supported_health_status_codes
+			get_supported_health_status_codes;
+		struct ice_aqc_get_health_status get_health_status;
+		struct ice_aqc_clear_health_status clear_health_status;
 	} params;
 };
 
@@ -2918,6 +2932,8 @@ enum ice_adminq_opc {
 	ice_aqc_opc_nvm_sr_dump				= 0x0707,
 	ice_aqc_opc_nvm_save_factory_settings		= 0x0708,
 	ice_aqc_opc_nvm_update_empr			= 0x0709,
+	ice_aqc_opc_nvm_pkg_data			= 0x070A,
+	ice_aqc_opc_nvm_pass_component_tbl		= 0x070B,
 
 	/* PF/VF mailbox commands */
 	ice_mbx_opc_send_msg_to_pf			= 0x0801,
@@ -2940,6 +2956,7 @@ enum ice_adminq_opc {
 	ice_aqc_opc_get_cee_dcb_cfg			= 0x0A07,
 	ice_aqc_opc_lldp_set_local_mib			= 0x0A08,
 	ice_aqc_opc_lldp_stop_start_specific_agent	= 0x0A09,
+	ice_aqc_opc_lldp_filter_ctrl			= 0x0A0A,
 
 	/* RSS commands */
 	ice_aqc_opc_set_rss_key				= 0x0B02,
@@ -2963,6 +2980,12 @@ enum ice_adminq_opc {
 
 	/* Standalone Commands/Events */
 	ice_aqc_opc_event_lan_overflow			= 0x1001,
+
+	/* SystemDiagnostic commands */
+	ice_aqc_opc_set_health_status_config		= 0xFF20,
+	ice_aqc_opc_get_supported_health_status_codes	= 0xFF21,
+	ice_aqc_opc_get_health_status			= 0xFF22,
+	ice_aqc_opc_clear_health_status			= 0xFF23
 };
 
 #endif /* _ICE_ADMINQ_CMD_H_ */

Modified: head/sys/dev/ice/ice_bitops.h
==============================================================================
--- head/sys/dev/ice/ice_bitops.h	Thu Sep 10 22:22:23 2020	(r365616)
+++ head/sys/dev/ice/ice_bitops.h	Thu Sep 10 23:46:13 2020	(r365617)
@@ -242,7 +242,7 @@ ice_or_bitmap(ice_bitmap_t *dst, const ice_bitmap_t *b
 	ice_bitmap_t mask;
 	u16 i;
 
-	/* Handle all but last chunk*/
+	/* Handle all but last chunk */
 	for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++)
 		dst[i] = bmp1[i] | bmp2[i];
 
@@ -273,7 +273,7 @@ ice_xor_bitmap(ice_bitmap_t *dst, const ice_bitmap_t *
 	ice_bitmap_t mask;
 	u16 i;
 
-	/* Handle all but last chunk*/
+	/* Handle all but last chunk */
 	for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++)
 		dst[i] = bmp1[i] ^ bmp2[i];
 
@@ -287,6 +287,37 @@ ice_xor_bitmap(ice_bitmap_t *dst, const ice_bitmap_t *
 }
 
 /**
+ * ice_andnot_bitmap - bitwise ANDNOT 2 bitmaps and result in dst bitmap
+ * @dst: Destination bitmap that receive the result of the operation
+ * @bmp1: The first bitmap of ANDNOT operation
+ * @bmp2: The second bitmap to ANDNOT operation
+ * @size: Size of the bitmaps in bits
+ *
+ * This function performs a bitwise ANDNOT on two "source" bitmaps of the same
+ * size, and stores the result to "dst" bitmap. The "dst" bitmap must be of the
+ * same size as the "source" bitmaps to avoid buffer overflows.
+ */
+static inline void
+ice_andnot_bitmap(ice_bitmap_t *dst, const ice_bitmap_t *bmp1,
+		  const ice_bitmap_t *bmp2, u16 size)
+{
+	ice_bitmap_t mask;
+	u16 i;
+
+	/* Handle all but last chunk */
+	for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++)
+		dst[i] = bmp1[i] & ~bmp2[i];
+
+	/* We want to only clear bits within the size. Furthermore, we also do
+	 * not want to modify destination bits which are beyond the specified
+	 * size. Use a bitmask to ensure that we only modify the bits that are
+	 * within the specified size.
+	 */
+	mask = LAST_CHUNK_MASK(size);
+	dst[i] = (dst[i] & ~mask) | ((bmp1[i] & ~bmp2[i]) & mask);
+}
+
+/**
  * ice_find_next_bit - Find the index of the next set bit of a bitmap
  * @bitmap: the bitmap to scan
  * @size: the size in bits of the bitmap
@@ -343,6 +374,11 @@ static inline u16 ice_find_first_bit(const ice_bitmap_
 	return ice_find_next_bit(bitmap, size, 0);
 }
 
+#define ice_for_each_set_bit(_bitpos, _addr, _maxlen)	\
+	for ((_bitpos) = ice_find_first_bit((_addr), (_maxlen)); \
+	     (_bitpos) < (_maxlen); \
+	     (_bitpos) = ice_find_next_bit((_addr), (_maxlen), (_bitpos) + 1))
+
 /**
  * ice_is_any_bit_set - Return true of any bit in the bitmap is set
  * @bitmap: the bitmap to check
@@ -373,6 +409,48 @@ static inline void ice_cp_bitmap(ice_bitmap_t *dst, ic
 }
 
 /**
+ * ice_bitmap_set - set a number of bits in bitmap from a starting position
+ * @dst: bitmap destination
+ * @pos: first bit position to set
+ * @num_bits: number of bits to set
+ *
+ * This function sets bits in a bitmap from pos to (pos + num_bits) - 1.
+ * Note that this function assumes it is operating on a bitmap declared using
+ * ice_declare_bitmap.
+ */
+static inline void
+ice_bitmap_set(ice_bitmap_t *dst, u16 pos, u16 num_bits)
+{
+	u16 i;
+
+	for (i = pos; i < num_bits; i++)
+		ice_set_bit(i, dst);
+}
+
+/**
+ * ice_bitmap_hweight - hamming weight of bitmap
+ * @bm: bitmap pointer
+ * @size: size of bitmap (in bits)
+ *
+ * This function determines the number of set bits in a bitmap.
+ * Note that this function assumes it is operating on a bitmap declared using
+ * ice_declare_bitmap.
+ */
+static inline int
+ice_bitmap_hweight(ice_bitmap_t *bm, u16 size)
+{
+	int count = 0;
+	u16 bit = 0;
+
+	while (size > (bit = ice_find_next_bit(bm, size, bit))) {
+		count++;
+		bit++;
+	}
+
+	return count;
+}
+
+/**
  * ice_cmp_bitmaps - compares two bitmaps.
  * @bmp1: the bitmap to compare
  * @bmp2: the bitmap to compare with bmp1
@@ -386,12 +464,12 @@ ice_cmp_bitmap(ice_bitmap_t *bmp1, ice_bitmap_t *bmp2,
 	ice_bitmap_t mask;
 	u16 i;
 
-	/* Handle all but last chunk*/
+	/* Handle all but last chunk */
 	for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++)
 		if (bmp1[i] != bmp2[i])
 			return false;
 
-	/* We want to only compare bits within the size.*/
+	/* We want to only compare bits within the size */
 	mask = LAST_CHUNK_MASK(size);
 	if ((bmp1[i] & mask) != (bmp2[i] & mask))
 		return false;

Modified: head/sys/dev/ice/ice_common.c
==============================================================================
--- head/sys/dev/ice/ice_common.c	Thu Sep 10 22:22:23 2020	(r365616)
+++ head/sys/dev/ice/ice_common.c	Thu Sep 10 23:46:13 2020	(r365617)
@@ -115,7 +115,8 @@ enum ice_status ice_clear_pf_cfg(struct ice_hw *hw)
  * is returned in user specified buffer. Please interpret user specified
  * buffer as "manage_mac_read" response.
  * Response such as various MAC addresses are stored in HW struct (port.mac)
- * ice_aq_discover_caps is expected to be called before this function is called.
+ * ice_discover_dev_caps is expected to be called before this function is
+ * called.
  */
 enum ice_status
 ice_aq_manage_mac_read(struct ice_hw *hw, void *buf, u16 buf_size,
@@ -180,11 +181,13 @@ ice_aq_get_phy_caps(struct ice_port_info *pi, bool qua
 	u16 pcaps_size = sizeof(*pcaps);
 	struct ice_aq_desc desc;
 	enum ice_status status;
+	struct ice_hw *hw;
 
 	cmd = &desc.params.get_phy;
 
 	if (!pcaps || (report_mode & ~ICE_AQC_REPORT_MODE_M) || !pi)
 		return ICE_ERR_PARAM;
+	hw = pi->hw;
 
 	ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_phy_caps);
 
@@ -192,11 +195,39 @@ ice_aq_get_phy_caps(struct ice_port_info *pi, bool qua
 		cmd->param0 |= CPU_TO_LE16(ICE_AQC_GET_PHY_RQM);
 
 	cmd->param0 |= CPU_TO_LE16(report_mode);
-	status = ice_aq_send_cmd(pi->hw, &desc, pcaps, pcaps_size, cd);
+	status = ice_aq_send_cmd(hw, &desc, pcaps, pcaps_size, cd);
 
+	ice_debug(hw, ICE_DBG_LINK, "get phy caps - report_mode = 0x%x\n",
+		  report_mode);
+	ice_debug(hw, ICE_DBG_LINK, "	phy_type_low = 0x%llx\n",
+		  (unsigned long long)LE64_TO_CPU(pcaps->phy_type_low));
+	ice_debug(hw, ICE_DBG_LINK, "	phy_type_high = 0x%llx\n",
+		  (unsigned long long)LE64_TO_CPU(pcaps->phy_type_high));
+	ice_debug(hw, ICE_DBG_LINK, "	caps = 0x%x\n", pcaps->caps);
+	ice_debug(hw, ICE_DBG_LINK, "	low_power_ctrl_an = 0x%x\n",
+		  pcaps->low_power_ctrl_an);
+	ice_debug(hw, ICE_DBG_LINK, "	eee_cap = 0x%x\n", pcaps->eee_cap);
+	ice_debug(hw, ICE_DBG_LINK, "	eeer_value = 0x%x\n",
+		  pcaps->eeer_value);
+	ice_debug(hw, ICE_DBG_LINK, "	link_fec_options = 0x%x\n",
+		  pcaps->link_fec_options);
+	ice_debug(hw, ICE_DBG_LINK, "	module_compliance_enforcement = 0x%x\n",
+		  pcaps->module_compliance_enforcement);
+	ice_debug(hw, ICE_DBG_LINK, "   extended_compliance_code = 0x%x\n",
+		  pcaps->extended_compliance_code);
+	ice_debug(hw, ICE_DBG_LINK, "   module_type[0] = 0x%x\n",
+		  pcaps->module_type[0]);
+	ice_debug(hw, ICE_DBG_LINK, "   module_type[1] = 0x%x\n",
+		  pcaps->module_type[1]);
+	ice_debug(hw, ICE_DBG_LINK, "   module_type[2] = 0x%x\n",
+		  pcaps->module_type[2]);
+
 	if (status == ICE_SUCCESS && report_mode == ICE_AQC_REPORT_TOPO_CAP) {
 		pi->phy.phy_type_low = LE64_TO_CPU(pcaps->phy_type_low);
 		pi->phy.phy_type_high = LE64_TO_CPU(pcaps->phy_type_high);
+		ice_memcpy(pi->phy.link_info.module_type, &pcaps->module_type,
+			   sizeof(pi->phy.link_info.module_type),
+			   ICE_NONDMA_TO_NONDMA);
 	}
 
 	return status;
@@ -269,6 +300,18 @@ static enum ice_media_type ice_get_media_type(struct i
 		return ICE_MEDIA_UNKNOWN;
 
 	if (hw_link_info->phy_type_low) {
+		/* 1G SGMII is a special case where some DA cable PHYs
+		 * may show this as an option when it really shouldn't
+		 * be since SGMII is meant to be between a MAC and a PHY
+		 * in a backplane. Try to detect this case and handle it
+		 */
+		if (hw_link_info->phy_type_low == ICE_PHY_TYPE_LOW_1G_SGMII &&
+		    (hw_link_info->module_type[ICE_AQC_MOD_TYPE_IDENT] ==
+		    ICE_AQC_MOD_TYPE_BYTE1_SFP_PLUS_CU_ACTIVE ||
+		    hw_link_info->module_type[ICE_AQC_MOD_TYPE_IDENT] ==
+		    ICE_AQC_MOD_TYPE_BYTE1_SFP_PLUS_CU_PASSIVE))
+			return ICE_MEDIA_DA;
+
 		switch (hw_link_info->phy_type_low) {
 		case ICE_PHY_TYPE_LOW_1000BASE_SX:
 		case ICE_PHY_TYPE_LOW_1000BASE_LX:
@@ -289,6 +332,15 @@ static enum ice_media_type ice_get_media_type(struct i
 		case ICE_PHY_TYPE_LOW_100GBASE_SR2:
 		case ICE_PHY_TYPE_LOW_100GBASE_DR:
 			return ICE_MEDIA_FIBER;
+		case ICE_PHY_TYPE_LOW_10G_SFI_AOC_ACC:
+		case ICE_PHY_TYPE_LOW_25G_AUI_AOC_ACC:
+		case ICE_PHY_TYPE_LOW_40G_XLAUI_AOC_ACC:
+		case ICE_PHY_TYPE_LOW_50G_LAUI2_AOC_ACC:
+		case ICE_PHY_TYPE_LOW_50G_AUI2_AOC_ACC:
+		case ICE_PHY_TYPE_LOW_50G_AUI1_AOC_ACC:
+		case ICE_PHY_TYPE_LOW_100G_CAUI4_AOC_ACC:
+		case ICE_PHY_TYPE_LOW_100G_AUI4_AOC_ACC:
+			return ICE_MEDIA_FIBER;
 		case ICE_PHY_TYPE_LOW_100BASE_TX:
 		case ICE_PHY_TYPE_LOW_1000BASE_T:
 		case ICE_PHY_TYPE_LOW_2500BASE_T:
@@ -315,7 +367,7 @@ static enum ice_media_type ice_get_media_type(struct i
 		case ICE_PHY_TYPE_LOW_100G_AUI4:
 		case ICE_PHY_TYPE_LOW_100G_CAUI4:
 			if (ice_is_media_cage_present(pi))
-				return ICE_MEDIA_DA;
+				return ICE_MEDIA_AUI;
 			/* fall-through */
 		case ICE_PHY_TYPE_LOW_1000BASE_KX:
 		case ICE_PHY_TYPE_LOW_2500BASE_KX:
@@ -335,11 +387,15 @@ static enum ice_media_type ice_get_media_type(struct i
 	} else {
 		switch (hw_link_info->phy_type_high) {
 		case ICE_PHY_TYPE_HIGH_100G_AUI2:
+		case ICE_PHY_TYPE_HIGH_100G_CAUI2:
 			if (ice_is_media_cage_present(pi))
-				return ICE_MEDIA_DA;
+				return ICE_MEDIA_AUI;
 			/* fall-through */
 		case ICE_PHY_TYPE_HIGH_100GBASE_KR2_PAM4:
 			return ICE_MEDIA_BACKPLANE;
+		case ICE_PHY_TYPE_HIGH_100G_CAUI2_AOC_ACC:
+		case ICE_PHY_TYPE_HIGH_100G_AUI2_AOC_ACC:
+			return ICE_MEDIA_FIBER;
 		}
 	}
 	return ICE_MEDIA_UNKNOWN;
@@ -420,18 +476,21 @@ ice_aq_get_link_info(struct ice_port_info *pi, bool en
 
 	li->lse_ena = !!(resp->cmd_flags & CPU_TO_LE16(ICE_AQ_LSE_IS_ENABLED));
 
-	ice_debug(hw, ICE_DBG_LINK, "link_speed = 0x%x\n", li->link_speed);
-	ice_debug(hw, ICE_DBG_LINK, "phy_type_low = 0x%llx\n",
+	ice_debug(hw, ICE_DBG_LINK, "get link info\n");
+	ice_debug(hw, ICE_DBG_LINK, "	link_speed = 0x%x\n", li->link_speed);
+	ice_debug(hw, ICE_DBG_LINK, "	phy_type_low = 0x%llx\n",
 		  (unsigned long long)li->phy_type_low);
-	ice_debug(hw, ICE_DBG_LINK, "phy_type_high = 0x%llx\n",
+	ice_debug(hw, ICE_DBG_LINK, "	phy_type_high = 0x%llx\n",
 		  (unsigned long long)li->phy_type_high);
-	ice_debug(hw, ICE_DBG_LINK, "media_type = 0x%x\n", *hw_media_type);
-	ice_debug(hw, ICE_DBG_LINK, "link_info = 0x%x\n", li->link_info);
-	ice_debug(hw, ICE_DBG_LINK, "an_info = 0x%x\n", li->an_info);
-	ice_debug(hw, ICE_DBG_LINK, "ext_info = 0x%x\n", li->ext_info);
-	ice_debug(hw, ICE_DBG_LINK, "lse_ena = 0x%x\n", li->lse_ena);
-	ice_debug(hw, ICE_DBG_LINK, "max_frame = 0x%x\n", li->max_frame_size);
-	ice_debug(hw, ICE_DBG_LINK, "pacing = 0x%x\n", li->pacing);
+	ice_debug(hw, ICE_DBG_LINK, "	media_type = 0x%x\n", *hw_media_type);
+	ice_debug(hw, ICE_DBG_LINK, "	link_info = 0x%x\n", li->link_info);
+	ice_debug(hw, ICE_DBG_LINK, "	an_info = 0x%x\n", li->an_info);
+	ice_debug(hw, ICE_DBG_LINK, "	ext_info = 0x%x\n", li->ext_info);
+	ice_debug(hw, ICE_DBG_LINK, "	fec_info = 0x%x\n", li->fec_info);
+	ice_debug(hw, ICE_DBG_LINK, "	lse_ena = 0x%x\n", li->lse_ena);
+	ice_debug(hw, ICE_DBG_LINK, "	max_frame = 0x%x\n",
+		  li->max_frame_size);
+	ice_debug(hw, ICE_DBG_LINK, "	pacing = 0x%x\n", li->pacing);
 
 	/* save link status information */
 	if (link)
@@ -444,6 +503,43 @@ ice_aq_get_link_info(struct ice_port_info *pi, bool en
 }
 
 /**
+ * ice_fill_tx_timer_and_fc_thresh
+ * @hw: pointer to the HW struct
+ * @cmd: pointer to MAC cfg structure
+ *
+ * Add Tx timer and FC refresh threshold info to Set MAC Config AQ command
+ * descriptor
+ */
+static void
+ice_fill_tx_timer_and_fc_thresh(struct ice_hw *hw,
+				struct ice_aqc_set_mac_cfg *cmd)
+{
+	u16 fc_thres_val, tx_timer_val;
+	u32 val;
+
+	/* We read back the transmit timer and fc threshold value of
+	 * LFC. Thus, we will use index =
+	 * PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_MAX_INDEX.
+	 *
+	 * Also, because we are opearating on transmit timer and fc
+	 * threshold of LFC, we don't turn on any bit in tx_tmr_priority
+	 */
+#define IDX_OF_LFC PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_MAX_INDEX
+
+	/* Retrieve the transmit timer */
+	val = rd32(hw, PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA(IDX_OF_LFC));
+	tx_timer_val = val &
+		PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_HSEC_CTL_TX_PAUSE_QUANTA_M;
+	cmd->tx_tmr_value = CPU_TO_LE16(tx_timer_val);
+
+	/* Retrieve the fc threshold */
+	val = rd32(hw, PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER(IDX_OF_LFC));
+	fc_thres_val = val & PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER_M;
+
+	cmd->fc_refresh_threshold = CPU_TO_LE16(fc_thres_val);
+}
+
+/**
  * ice_aq_set_mac_cfg
  * @hw: pointer to the HW struct
  * @max_frame_size: Maximum Frame Size to be supported
@@ -454,10 +550,8 @@ ice_aq_get_link_info(struct ice_port_info *pi, bool en
 enum ice_status
 ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, struct ice_sq_cd *cd)
 {
-	u16 fc_threshold_val, tx_timer_val;
 	struct ice_aqc_set_mac_cfg *cmd;
 	struct ice_aq_desc desc;
-	u32 reg_val;
 
 	cmd = &desc.params.set_mac_cfg;
 
@@ -468,28 +562,8 @@ ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_si
 
 	cmd->max_frame_size = CPU_TO_LE16(max_frame_size);
 
-	/* We read back the transmit timer and fc threshold value of
-	 * LFC. Thus, we will use index =
-	 * PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_MAX_INDEX.
-	 *
-	 * Also, because we are opearating on transmit timer and fc
-	 * threshold of LFC, we don't turn on any bit in tx_tmr_priority
-	 */
-#define IDX_OF_LFC PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_MAX_INDEX
+	ice_fill_tx_timer_and_fc_thresh(hw, cmd);
 
-	/* Retrieve the transmit timer */
-	reg_val = rd32(hw,
-		       PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA(IDX_OF_LFC));
-	tx_timer_val = reg_val &
-		PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_HSEC_CTL_TX_PAUSE_QUANTA_M;
-	cmd->tx_tmr_value = CPU_TO_LE16(tx_timer_val);
-
-	/* Retrieve the fc threshold */
-	reg_val = rd32(hw,
-		       PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER(IDX_OF_LFC));
-	fc_threshold_val = reg_val & MAKEMASK(0xFFFF, 0);
-	cmd->fc_refresh_threshold = CPU_TO_LE16(fc_threshold_val);
-
 	return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
 }
 
@@ -500,6 +574,7 @@ ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_si
 static enum ice_status ice_init_fltr_mgmt_struct(struct ice_hw *hw)
 {
 	struct ice_switch_info *sw;
+	enum ice_status status;
 
 	hw->switch_info = (struct ice_switch_info *)
 			  ice_malloc(hw, sizeof(*hw->switch_info));
@@ -510,28 +585,38 @@ static enum ice_status ice_init_fltr_mgmt_struct(struc
 		return ICE_ERR_NO_MEMORY;
 
 	INIT_LIST_HEAD(&sw->vsi_list_map_head);
+	sw->prof_res_bm_init = 0;
 
-	return ice_init_def_sw_recp(hw, &hw->switch_info->recp_list);
+	status = ice_init_def_sw_recp(hw, &hw->switch_info->recp_list);
+	if (status) {
+		ice_free(hw, hw->switch_info);
+		return status;
+	}
+	return ICE_SUCCESS;
 }
 
 /**
- * ice_cleanup_fltr_mgmt_struct - cleanup filter management list and locks
+ * ice_cleanup_fltr_mgmt_single - clears single filter mngt struct
  * @hw: pointer to the HW struct
+ * @sw: pointer to switch info struct for which function clears filters
  */
-static void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw)
+static void
+ice_cleanup_fltr_mgmt_single(struct ice_hw *hw, struct ice_switch_info *sw)
 {
-	struct ice_switch_info *sw = hw->switch_info;
 	struct ice_vsi_list_map_info *v_pos_map;
 	struct ice_vsi_list_map_info *v_tmp_map;
 	struct ice_sw_recipe *recps;
 	u8 i;
 
+	if (!sw)
+		return;
+
 	LIST_FOR_EACH_ENTRY_SAFE(v_pos_map, v_tmp_map, &sw->vsi_list_map_head,
 				 ice_vsi_list_map_info, list_entry) {
 		LIST_DEL(&v_pos_map->list_entry);
 		ice_free(hw, v_pos_map);
 	}
-	recps = hw->switch_info->recp_list;
+	recps = sw->recp_list;
 	for (i = 0; i < ICE_MAX_NUM_RECIPES; i++) {
 		struct ice_recp_grp_entry *rg_entry, *tmprg_entry;
 
@@ -571,12 +656,21 @@ static void ice_cleanup_fltr_mgmt_struct(struct ice_hw
 		if (recps[i].root_buf)
 			ice_free(hw, recps[i].root_buf);
 	}
-	ice_rm_all_sw_replay_rule_info(hw);
+	ice_rm_sw_replay_rule_info(hw, sw);
 	ice_free(hw, sw->recp_list);
 	ice_free(hw, sw);
 }
 
 /**
+ * ice_cleanup_all_fltr_mgmt - cleanup filter management list and locks
+ * @hw: pointer to the HW struct
+ */
+static void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw)
+{
+	ice_cleanup_fltr_mgmt_single(hw, hw->switch_info);
+}
+
+/**
  * ice_get_itr_intrl_gran
  * @hw: pointer to the HW struct
  *
@@ -648,7 +742,6 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
 	status = ice_reset(hw, ICE_RESET_PFR);
 	if (status)

*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***


More information about the svn-src-head mailing list