svn commit: r359333 - head/contrib/llvm-project/llvm/lib/Target/PowerPC

[Dimitry Andric]

Author: dim
Date: Thu Mar 26 17:27:41 2020
New Revision: 359333
URL: https://svnweb.freebsd.org/changeset/base/359333

Log:
  Merge commit f0990e104 from llvm git (by Justin Hibbits):
  
    [PowerPC]: e500 target can't use lwsync, use msync instead
  
    The e500 core has a silicon bug that triggers an illegal instruction
    program trap on any sync other than msync. Other cores will typically
    ignore illegal sync types, and the documentation even implies that
    the 'illegal' bits are ignored.
  
    Address this hardware deficiency by only using msync, like the PPC440.
  
    Differential Revision:  https://reviews.llvm.org/D76614
  
  Requested by:	jhibbits
  MFC after:	6 weeks
  X-MFC-With:	358851

Modified:
  head/contrib/llvm-project/llvm/lib/Target/PowerPC/PPC.td

Modified: head/contrib/llvm-project/llvm/lib/Target/PowerPC/PPC.td
==============================================================================
--- head/contrib/llvm-project/llvm/lib/Target/PowerPC/PPC.td	Thu Mar 26 17:12:55 2020	(r359332)
+++ head/contrib/llvm-project/llvm/lib/Target/PowerPC/PPC.td	Thu Mar 26 17:27:41 2020	(r359333)
@@ -442,7 +442,7 @@ def : ProcessorModel<"g5", G5Model,
 def : ProcessorModel<"e500", PPCE500Model,
                   [DirectiveE500,
                    FeatureICBT, FeatureBookE,
-                   FeatureISEL, FeatureMFTB, FeatureSPE]>;
+                   FeatureISEL, FeatureMFTB, FeatureMSYNC, FeatureSPE]>;
 def : ProcessorModel<"e500mc", PPCE500mcModel,
                   [DirectiveE500mc,
                    FeatureSTFIWX, FeatureICBT, FeatureBookE,