svn commit: r358338 - head/sys/arm64/arm64

[Andrew Turner]

Author: andrew
Date: Wed Feb 26 15:56:07 2020
New Revision: 358338
URL: https://svnweb.freebsd.org/changeset/base/358338

Log:
  Fix the cache type identification
  
  DIC and IDC are supported when the field bits are set.
  
  Sponsored by:	Innovate UK

Modified:
  head/sys/arm64/arm64/identcpu.c

Modified: head/sys/arm64/arm64/identcpu.c
==============================================================================
--- head/sys/arm64/arm64/identcpu.c	Wed Feb 26 15:47:40 2020	(r358337)
+++ head/sys/arm64/arm64/identcpu.c	Wed Feb 26 15:56:07 2020	(r358338)
@@ -1119,9 +1119,9 @@ print_ctr_fields(struct sbuf *sb, uint64_t reg, void *
 	sbuf_printf(sb, "%d byte CWG", CTR_CWG_SIZE(reg));
 	reg &= ~(CTR_ERG_MASK | CTR_CWG_MASK);
 
-	if (CTR_IDC_VAL(reg) == 0)
+	if (CTR_IDC_VAL(reg) != 0)
 		sbuf_printf(sb, ",IDC");
-	if (CTR_DIC_VAL(reg) == 0)
+	if (CTR_DIC_VAL(reg) != 0)
 		sbuf_printf(sb, ",DIC");
 	reg &= ~(CTR_IDC_MASK | CTR_DIC_MASK);
 	reg &= ~CTR_RES1;