svn commit: r352624 - head/sys/amd64/amd64
Mark Johnston
markj at FreeBSD.org
Mon Sep 23 14:19:42 UTC 2019
Author: markj
Date: Mon Sep 23 14:19:41 2019
New Revision: 352624
URL: https://svnweb.freebsd.org/changeset/base/352624
Log:
Set NX on some non-leaf direct map page table entries.
The direct map is never used for execution of code, so we might as well
set NX in the direct map's PML4Es. Also clarify the intent of the code
in create_pagetables() that restricts access protections on the region
of the direct map mapping the kernel text.
Reviewed by: alc, kib (previous version)
MFC after: 1 week
Sponsored by: Netflix
Differential Revision: https://reviews.freebsd.org/D21759
Modified:
head/sys/amd64/amd64/pmap.c
Modified: head/sys/amd64/amd64/pmap.c
==============================================================================
--- head/sys/amd64/amd64/pmap.c Mon Sep 23 14:14:43 2019 (r352623)
+++ head/sys/amd64/amd64/pmap.c Mon Sep 23 14:19:41 2019 (r352624)
@@ -1539,13 +1539,13 @@ create_pagetables(vm_paddr_t *firstaddr)
}
for (j = 0; i < ndmpdp; i++, j++) {
pdp_p[i] = DMPDphys + ptoa(j);
- pdp_p[i] |= X86_PG_RW | X86_PG_V;
+ pdp_p[i] |= X86_PG_RW | X86_PG_V | pg_nx;
}
/*
* Instead of using a 1G page for the memory containing the kernel,
- * use 2M pages with appropriate permissions. (If using 1G pages,
- * this will partially overwrite the PDPEs above.)
+ * use 2M pages with read-only and no-execute permissions. (If using 1G
+ * pages, this will partially overwrite the PDPEs above.)
*/
if (ndm1g) {
pd_p = (pd_entry_t *)DMPDkernphys;
@@ -1555,7 +1555,7 @@ create_pagetables(vm_paddr_t *firstaddr)
bootaddr_rwx(i << PDRSHIFT);
for (i = 0; i < nkdmpde; i++)
pdp_p[i] = (DMPDkernphys + ptoa(i)) | X86_PG_RW |
- X86_PG_V;
+ X86_PG_V | pg_nx;
}
/* And recursively map PML4 to itself in order to get PTmap */
@@ -1566,7 +1566,7 @@ create_pagetables(vm_paddr_t *firstaddr)
/* Connect the Direct Map slot(s) up to the PML4. */
for (i = 0; i < ndmpdpphys; i++) {
p4_p[DMPML4I + i] = DMPDPphys + ptoa(i);
- p4_p[DMPML4I + i] |= X86_PG_RW | X86_PG_V;
+ p4_p[DMPML4I + i] |= X86_PG_RW | X86_PG_V | pg_nx;
}
/* Connect the KVA slots up to the PML4 */
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