svn commit: r354753 - head/sys/dev/ioat
Alexander Motin
mav at FreeBSD.org
Fri Nov 15 23:01:09 UTC 2019
Author: mav
Date: Fri Nov 15 23:01:09 2019
New Revision: 354753
URL: https://svnweb.freebsd.org/changeset/base/354753
Log:
Initialize *comp_update with valid value.
I've noticed that sometimes with enabled DMAR initial write from device
to this address is somehow getting delayed, triggering assertion due to
zero default being invalid.
MFC after: 2 weeks
Sponsored by: iXsystems, Inc.
Modified:
head/sys/dev/ioat/ioat.c
Modified: head/sys/dev/ioat/ioat.c
==============================================================================
--- head/sys/dev/ioat/ioat.c Fri Nov 15 22:47:59 2019 (r354752)
+++ head/sys/dev/ioat/ioat.c Fri Nov 15 23:01:09 2019 (r354753)
@@ -642,10 +642,9 @@ ioat3_attach(device_t device)
dma_hw_desc->next = RING_PHYS_ADDR(ioat, i + 1);
}
- ioat->head = 0;
- ioat->tail = 0;
- ioat->last_seen = 0;
- *ioat->comp_update = 0;
+ ioat->tail = ioat->head = 0;
+ *ioat->comp_update = ioat->last_seen =
+ RING_PHYS_ADDR(ioat, ioat->tail - 1);
return (0);
}
@@ -1751,8 +1750,8 @@ ioat_reset_hw(struct ioat_softc *ioat)
* at zero as well.
*/
ioat->tail = ioat->head = 0;
- ioat->last_seen = 0;
- *ioat->comp_update = 0;
+ *ioat->comp_update = ioat->last_seen =
+ RING_PHYS_ADDR(ioat, ioat->tail - 1);
ioat_write_chanctrl(ioat, IOAT_CHANCTRL_RUN);
ioat_write_chancmp(ioat, ioat->comp_update_bus_addr);
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