svn commit: r354298 - head/sys/dev/ichiic

[Vladimir Kondratyev]

Author: wulf
Date: Sun Nov  3 20:47:49 2019
New Revision: 354298
URL: https://svnweb.freebsd.org/changeset/base/354298

Log:
  [ig4] We actually need to set the Rx threshold register one smaller.
  
  Setting the IG4_REG_RX_TL register to 1 was actually generating an
  interrupt after 2 bytes were available in the Rx fifo. We need to set the
  register to 0 to get an interrupt for 1 byte already.
  
  Obtained from:	DragonflyBSD (02f0bf2)

Modified:
  head/sys/dev/ichiic/ig4_iic.c

Modified: head/sys/dev/ichiic/ig4_iic.c
==============================================================================
--- head/sys/dev/ichiic/ig4_iic.c	Sun Nov  3 20:46:20 2019	(r354297)
+++ head/sys/dev/ichiic/ig4_iic.c	Sun Nov  3 20:47:49 2019	(r354298)
@@ -567,7 +567,7 @@ ig4iic_attach(ig4iic_softc_t *sc)
 	 *
 	 * See ig4_var.h for details on interrupt handler synchronization.
 	 */
-	reg_write(sc, IG4_REG_RX_TL, 1);
+	reg_write(sc, IG4_REG_RX_TL, 0);
 
 	reg_write(sc, IG4_REG_CTL,
 		  IG4_CTL_MASTER |