svn commit: r347243 - head/contrib/llvm/lib/Target/ARM

[Dimitry Andric]

Author: dim
Date: Wed May  8 05:45:00 2019
New Revision: 347243
URL: https://svnweb.freebsd.org/changeset/base/347243

Log:
  Pull in r360099 from upstream llvm trunk (by Eli Friedman):
  
    [ARM] Glue register copies to tail calls.
  
    This generally follows what other targets do. I don't completely
    understand why the special case for tail calls existed in the first
    place; even when the code was committed in r105413, call lowering
    didn't work in the way described in the comments.
  
    Stack protector lowering breaks if the register copies are not glued
    to a tail call: we have to insert the stack protector check before
    the tail call, and we choose the location based on the assumption
    that all physical register dependencies of a tail call are adjacent
    to the tail call. (See FindSplitPointForStackProtector.) This is sort
    of fragile, but I don't see any reason to break that assumption.
  
    I'm guessing nobody has seen this before just because it's hard to
    convince the scheduler to actually schedule the code in a way that
    breaks; even without the glue, the only computation that could
    actually be scheduled after the register copies is the computation of
    the call address, and the scheduler usually prefers to schedule that
    before the copies anyway.
  
    Fixes https://bugs.llvm.org/show_bug.cgi?id=41417
  
    Differential Revision: https://reviews.llvm.org/D60427
  
  This should fix several instances of "Bad machine code: Using an
  undefined physical register", when compiling ports such as
  multimedia/vlc, audio/alsa-lib and devel/avro-c for armv6, with
  -fstack-protector-strong.
  
  Reported by:	jbeich
  PR:		237074, 237783, 237784
  MFC after:	3 days

Modified:
  head/contrib/llvm/lib/Target/ARM/ARMISelLowering.cpp

Modified: head/contrib/llvm/lib/Target/ARM/ARMISelLowering.cpp
==============================================================================
--- head/contrib/llvm/lib/Target/ARM/ARMISelLowering.cpp	Wed May  8 03:15:22 2019	(r347242)
+++ head/contrib/llvm/lib/Target/ARM/ARMISelLowering.cpp	Wed May  8 05:45:00 2019	(r347243)
@@ -1984,32 +1984,10 @@ ARMTargetLowering::LowerCall(TargetLowering::CallLower
   // Build a sequence of copy-to-reg nodes chained together with token chain
   // and flag operands which copy the outgoing args into the appropriate regs.
   SDValue InFlag;
-  // Tail call byval lowering might overwrite argument registers so in case of
-  // tail call optimization the copies to registers are lowered later.
-  if (!isTailCall)
-    for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
-      Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first,
-                               RegsToPass[i].second, InFlag);
-      InFlag = Chain.getValue(1);
-    }
-
-  // For tail calls lower the arguments to the 'real' stack slot.
-  if (isTailCall) {
-    // Force all the incoming stack arguments to be loaded from the stack
-    // before any new outgoing arguments are stored to the stack, because the
-    // outgoing stack slots may alias the incoming argument stack slots, and
-    // the alias isn't otherwise explicit. This is slightly more conservative
-    // than necessary, because it means that each store effectively depends
-    // on every argument instead of just those arguments it would clobber.
-
-    // Do not flag preceding copytoreg stuff together with the following stuff.
-    InFlag = SDValue();
-    for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
-      Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first,
-                               RegsToPass[i].second, InFlag);
-      InFlag = Chain.getValue(1);
-    }
-    InFlag = SDValue();
+  for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
+    Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first,
+                             RegsToPass[i].second, InFlag);
+    InFlag = Chain.getValue(1);
   }
 
   // If the callee is a GlobalAddress/ExternalSymbol node (quite common, every