svn commit: r344589 - head/sys/arm64/rockchip/clk

[Emmanuel Vadot]

Author: manu
Date: Tue Feb 26 17:08:51 2019
New Revision: 344589
URL: https://svnweb.freebsd.org/changeset/base/344589

Log:
  arm64: rockchip: rk3399_pll: Switch to slow mode when changing the freq
  
  Like r344578 but for RK3399.
  This solve some hangs when switching between frequency.
  
  MFC after:	1 week

Modified:
  head/sys/arm64/rockchip/clk/rk_clk_pll.c

Modified: head/sys/arm64/rockchip/clk/rk_clk_pll.c
==============================================================================
--- head/sys/arm64/rockchip/clk/rk_clk_pll.c	Tue Feb 26 16:34:43 2019	(r344588)
+++ head/sys/arm64/rockchip/clk/rk_clk_pll.c	Tue Feb 26 17:08:51 2019	(r344589)
@@ -424,6 +424,11 @@ rk3399_clk_pll_set_freq(struct clknode *clk, uint64_t 
 
 	DEVICE_LOCK(clk);
 
+	/* Setting to slow mode during frequency change */
+	reg = RK3399_CLK_PLL_MODE_SLOW << RK3399_CLK_PLL_MODE_SHIFT;
+	reg |= RK3399_CLK_PLL_MODE_MASK << RK_CLK_PLL_MASK_SHIFT;
+	WRITE4(clk, sc->mode_reg, reg);
+
 	/* Setting fbdiv */
 	READ4(clk, sc->base_offset, &reg);
 	reg &= ~RK3399_CLK_PLL_FBDIV_MASK;