svn commit: r339592 - in head/sys/arm64: arm64 include
Andrew Turner
andrew at FreeBSD.org
Mon Oct 22 14:59:00 UTC 2018
Author: andrew
Date: Mon Oct 22 14:58:59 2018
New Revision: 339592
URL: https://svnweb.freebsd.org/changeset/base/339592
Log:
Correctly set the DAIF bits in new threads
We should only unmask interrupts when creating a new thread and leave the
other exceptions in teh same state as before creating the thread.
Reported by: jhibbits
Reviewed by: jhibbits
MFC after: 1 month
Sponsored by: https://reviews.freebsd.org/D17497
Modified:
head/sys/arm64/arm64/vm_machdep.c
head/sys/arm64/include/armreg.h
Modified: head/sys/arm64/arm64/vm_machdep.c
==============================================================================
--- head/sys/arm64/arm64/vm_machdep.c Mon Oct 22 14:44:44 2018 (r339591)
+++ head/sys/arm64/arm64/vm_machdep.c Mon Oct 22 14:58:59 2018 (r339592)
@@ -111,7 +111,7 @@ cpu_fork(struct thread *td1, struct proc *p2, struct t
/* Setup to release spin count in fork_exit(). */
td2->td_md.md_spinlock_count = 1;
- td2->td_md.md_saved_daif = 0;
+ td2->td_md.md_saved_daif = td1->td_md.md_saved_daif & ~DAIF_I_MASKED;
}
void
@@ -182,7 +182,7 @@ cpu_copy_thread(struct thread *td, struct thread *td0)
/* Setup to release spin count in fork_exit(). */
td->td_md.md_spinlock_count = 1;
- td->td_md.md_saved_daif = 0;
+ td->td_md.md_saved_daif = td0->td_md.md_saved_daif & ~DAIF_I_MASKED;
}
/*
Modified: head/sys/arm64/include/armreg.h
==============================================================================
--- head/sys/arm64/include/armreg.h Mon Oct 22 14:44:44 2018 (r339591)
+++ head/sys/arm64/include/armreg.h Mon Oct 22 14:58:59 2018 (r339592)
@@ -66,6 +66,12 @@
#define CTR_ILINE_MASK (0xf << CTR_ILINE_SHIFT)
#define CTR_ILINE_SIZE(reg) (((reg) & CTR_ILINE_MASK) >> CTR_ILINE_SHIFT)
+/* DAIF - Interrupt Mask Bits */
+#define DAIF_D_MASKED (1 << 9)
+#define DAIF_A_MASKED (1 << 8)
+#define DAIF_I_MASKED (1 << 7)
+#define DAIF_F_MASKED (1 << 6)
+
/* DCZID_EL0 - Data Cache Zero ID register */
#define DCZID_DZP (1 << 4) /* DC ZVA prohibited if non-0 */
#define DCZID_BS_SHIFT 0
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