svn commit: r334235 - in head/sys/powerpc: aim include

[Justin Hibbits]

Author: jhibbits
Date: Sat May 26 04:33:19 2018
New Revision: 334235
URL: https://svnweb.freebsd.org/changeset/base/334235

Log:
  On POWER9 clear the HID0_RADIX before enabling the page tables
  
  POWER9 supports Radix page tables in addition to Hashed page tables.  When
  Radix page tables are in use, the TLB is cut in half, so that half of the
  TLB is used for the page walk cache.  This is the default behavior, however
  FreeBSD currently does not support Radix tables.  Clear this bit so that we
  can use the full TLB.  Do this in the MMU logic so that configuration can be
  localized to the specific translation format.  Once we do support Radix
  tables, the setup for that will be localized to the Radix MMU kobj.

Modified:
  head/sys/powerpc/aim/moea64_native.c
  head/sys/powerpc/include/hid.h

Modified: head/sys/powerpc/aim/moea64_native.c
==============================================================================
--- head/sys/powerpc/aim/moea64_native.c	Sat May 26 04:24:25 2018	(r334234)
+++ head/sys/powerpc/aim/moea64_native.c	Sat May 26 04:33:19 2018	(r334235)
@@ -116,6 +116,7 @@ __FBSDID("$FreeBSD$");
 #include <vm/vm_pageout.h>
 
 #include <machine/cpu.h>
+#include <machine/hid.h>
 #include <machine/md_var.h>
 #include <machine/mmuvar.h>
 
@@ -383,6 +384,12 @@ moea64_cpu_bootstrap_native(mmu_t mmup, int ap)
 	 */
 
 	mtmsr(mfmsr() & ~PSL_DR & ~PSL_IR);
+
+	switch (mfpvr() >> 16) {
+	case IBMPOWER9:
+		mtspr(SPR_HID0, mfspr(SPR_HID0) & ~HID0_RADIX);
+		break;
+	}
 
 	/*
 	 * Install kernel SLB entries

Modified: head/sys/powerpc/include/hid.h
==============================================================================
--- head/sys/powerpc/include/hid.h	Sat May 26 04:24:25 2018	(r334234)
+++ head/sys/powerpc/include/hid.h	Sat May 26 04:33:19 2018	(r334235)
@@ -33,6 +33,7 @@
 #define _POWERPC_HID_H_
 
 /* Hardware Implementation Dependent registers for the PowerPC */
+#define	HID0_RADIX	0x0080000000000000	/* Enable Radix page tables (POWER9) */
 
 #define HID0_EMCP	0x80000000  /* Enable machine check pin */
 #define HID0_DBP	0x40000000  /* Disable 60x bus parity generation */