svn commit: r333646 - head/sys/dev/mmc
Marius Strobl
marius at FreeBSD.org
Tue May 15 21:07:12 UTC 2018
Author: marius
Date: Tue May 15 21:07:11 2018
New Revision: 333646
URL: https://svnweb.freebsd.org/changeset/base/333646
Log:
Restore style(9) conformance after r320844 (actually requested pre-
commit) and bring the r320844 additions in line with existing bits.
Modified:
head/sys/dev/mmc/mmcreg.h
Modified: head/sys/dev/mmc/mmcreg.h
==============================================================================
--- head/sys/dev/mmc/mmcreg.h Tue May 15 20:28:50 2018 (r333645)
+++ head/sys/dev/mmc/mmcreg.h Tue May 15 21:07:11 2018 (r333646)
@@ -159,34 +159,35 @@ struct mmc_command {
#define R1_STATE_PRG 7
#define R1_STATE_DIS 8
-/* R4 response (SDIO) */
-#define R4_IO_NUM_FUNCTIONS(ocr) (((ocr) >> 28) & 0x3)
-#define R4_IO_MEM_PRESENT (0x1<<27)
-#define R4_IO_OCR_MASK 0x00fffff0
+/* R4 responses (SDIO) */
+#define R4_IO_NUM_FUNCTIONS(ocr) (((ocr) >> 28) & 0x3)
+#define R4_IO_MEM_PRESENT (0x1 << 27)
+#define R4_IO_OCR_MASK 0x00fffff0
/*
* R5 responses
*
* Types (per SD 2.0 standard)
- *e : error bit
- *s : status bit
- *r : detected and set for the actual command response
- *x : Detected and set during command execution. The host can get
- * the status by issuing a command with R1 response.
+ * e : error bit
+ * s : status bit
+ * r : detected and set for the actual command response
+ * x : Detected and set during command execution. The host can get
+ * the status by issuing a command with R1 response.
*
* Clear Condition (per SD 2.0 standard)
- *a : according to the card current state.
- *b : always related to the previous command. reception of a valid
- * command will clear it (with a delay of one command).
- *c : clear by read
+ * a : according to the card current state.
+ * b : always related to the previous command. reception of a valid
+ * command will clear it (with a delay of one command).
+ * c : clear by read
*/
-#define R5_COM_CRC_ERROR (1u << 15)/* er, b */
-#define R5_ILLEGAL_COMMAND (1u << 14)/* er, b */
-#define R5_IO_CURRENT_STATE_MASK (3u << 12)/* s, b */
-#define R5_IO_CURRENT_STATE(x) (((x) & R5_IO_CURRENT_STATE_MASK) >> 12)
-#define R5_ERROR (1u << 11)/* erx, c */
-#define R5_FUNCTION_NUMBER (1u << 9)/* er, c */
-#define R5_OUT_OF_RANGE (1u << 8)/* er, c */
+#define R5_COM_CRC_ERROR (1u << 15) /* er, b */
+#define R5_ILLEGAL_COMMAND (1u << 14) /* er, b */
+#define R5_IO_CURRENT_STATE_MASK (3u << 12) /* s, b */
+#define R5_IO_CURRENT_STATE(x) (((x) & R5_IO_CURRENT_STATE_MASK) >> 12)
+#define R5_ERROR (1u << 11) /* erx, c */
+#define R5_FUNCTION_NUMBER (1u << 9) /* er, c */
+#define R5_OUT_OF_RANGE (1u << 8) /* er, c */
+
struct mmc_data {
size_t len; /* size of the data */
size_t xfer_len;
@@ -219,7 +220,7 @@ struct mmc_request {
#define SD_SEND_RELATIVE_ADDR 3
#define MMC_SET_DSR 4
#define MMC_SLEEP_AWAKE 5
-#define IO_SEND_OP_COND 5
+#define IO_SEND_OP_COND 5
#define MMC_SWITCH_FUNC 6
#define MMC_SWITCH_FUNC_CMDS 0
#define MMC_SWITCH_FUNC_SET 1
@@ -310,30 +311,30 @@ struct mmc_request {
/* Class 9: I/O cards (sd) */
#define SD_IO_RW_DIRECT 52
/* CMD52 arguments */
-#define SD_ARG_CMD52_READ (0<<31)
-#define SD_ARG_CMD52_WRITE (1<<31)
-#define SD_ARG_CMD52_FUNC_SHIFT 28
-#define SD_ARG_CMD52_FUNC_MASK 0x7
-#define SD_ARG_CMD52_EXCHANGE (1<<27)
-#define SD_ARG_CMD52_REG_SHIFT 9
-#define SD_ARG_CMD52_REG_MASK 0x1ffff
-#define SD_ARG_CMD52_DATA_SHIFT 0
-#define SD_ARG_CMD52_DATA_MASK 0xff
-#define SD_R5_DATA(resp) ((resp)[0] & 0xff)
+#define SD_ARG_CMD52_READ (0 << 31)
+#define SD_ARG_CMD52_WRITE (1 << 31)
+#define SD_ARG_CMD52_FUNC_SHIFT 28
+#define SD_ARG_CMD52_FUNC_MASK 0x7
+#define SD_ARG_CMD52_EXCHANGE (1 << 27)
+#define SD_ARG_CMD52_REG_SHIFT 9
+#define SD_ARG_CMD52_REG_MASK 0x1ffff
+#define SD_ARG_CMD52_DATA_SHIFT 0
+#define SD_ARG_CMD52_DATA_MASK 0xff
+#define SD_R5_DATA(resp) ((resp)[0] & 0xff)
#define SD_IO_RW_EXTENDED 53
/* CMD53 arguments */
-#define SD_ARG_CMD53_READ (0<<31)
-#define SD_ARG_CMD53_WRITE (1<<31)
-#define SD_ARG_CMD53_FUNC_SHIFT 28
-#define SD_ARG_CMD53_FUNC_MASK 0x7
-#define SD_ARG_CMD53_BLOCK_MODE (1<<27)
-#define SD_ARG_CMD53_INCREMENT (1<<26)
-#define SD_ARG_CMD53_REG_SHIFT 9
-#define SD_ARG_CMD53_REG_MASK 0x1ffff
-#define SD_ARG_CMD53_LENGTH_SHIFT 0
-#define SD_ARG_CMD53_LENGTH_MASK 0x1ff
-#define SD_ARG_CMD53_LENGTH_MAX 64 /* XXX should be 511? */
+#define SD_ARG_CMD53_READ (0 << 31)
+#define SD_ARG_CMD53_WRITE (1 << 31)
+#define SD_ARG_CMD53_FUNC_SHIFT 28
+#define SD_ARG_CMD53_FUNC_MASK 0x7
+#define SD_ARG_CMD53_BLOCK_MODE (1 << 27)
+#define SD_ARG_CMD53_INCREMENT (1 << 26)
+#define SD_ARG_CMD53_REG_SHIFT 9
+#define SD_ARG_CMD53_REG_MASK 0x1ffff
+#define SD_ARG_CMD53_LENGTH_SHIFT 0
+#define SD_ARG_CMD53_LENGTH_MASK 0x1ff
+#define SD_ARG_CMD53_LENGTH_MAX 64 /* XXX should be 511? */
/* Class 10: Switch function commands */
#define SD_SWITCH_FUNC 6
@@ -525,50 +526,50 @@ struct mmc_request {
/*
* SDIO Direct & Extended I/O
*/
-#define SD_IO_RW_WR (1u << 31)
-#define SD_IO_RW_FUNC(x) (((x) & 0x7) << 28)
-#define SD_IO_RW_RAW (1u << 27)
-#define SD_IO_RW_INCR (1u << 26)
-#define SD_IO_RW_ADR(x) (((x) & 0x1FFFF) << 9)
-#define SD_IO_RW_DAT(x) (((x) & 0xFF) << 0)
-#define SD_IO_RW_LEN(x) (((x) & 0xFF) << 0)
+#define SD_IO_RW_WR (1u << 31)
+#define SD_IO_RW_FUNC(x) (((x) & 0x7) << 28)
+#define SD_IO_RW_RAW (1u << 27)
+#define SD_IO_RW_INCR (1u << 26)
+#define SD_IO_RW_ADR(x) (((x) & 0x1FFFF) << 9)
+#define SD_IO_RW_DAT(x) (((x) & 0xFF) << 0)
+#define SD_IO_RW_LEN(x) (((x) & 0xFF) << 0)
-#define SD_IOE_RW_LEN(x) (((x) & 0x1FF) << 0)
-#define SD_IOE_RW_BLK (1u << 27)
+#define SD_IOE_RW_LEN(x) (((x) & 0x1FF) << 0)
+#define SD_IOE_RW_BLK (1u << 27)
/* Card Common Control Registers (CCCR) */
-#define SD_IO_CCCR_START 0x00000
-#define SD_IO_CCCR_SIZE 0x100
-#define SD_IO_CCCR_FN_ENABLE 0x02
-#define SD_IO_CCCR_FN_READY 0x03
-#define SD_IO_CCCR_INT_ENABLE 0x04
-#define SD_IO_CCCR_INT_PENDING 0x05
-#define SD_IO_CCCR_CTL 0x06
-#define CCCR_CTL_RES (1<<3)
-#define SD_IO_CCCR_BUS_WIDTH 0x07
-#define CCCR_BUS_WIDTH_4 (1<<1)
-#define CCCR_BUS_WIDTH_1 (1<<0)
-#define SD_IO_CCCR_CARDCAP 0x08
-#define SD_IO_CCCR_CISPTR 0x09 /* XXX 9-10, 10-11, or 9-12 */
+#define SD_IO_CCCR_START 0x00000
+#define SD_IO_CCCR_SIZE 0x100
+#define SD_IO_CCCR_FN_ENABLE 0x02
+#define SD_IO_CCCR_FN_READY 0x03
+#define SD_IO_CCCR_INT_ENABLE 0x04
+#define SD_IO_CCCR_INT_PENDING 0x05
+#define SD_IO_CCCR_CTL 0x06
+#define CCCR_CTL_RES (1 << 3)
+#define SD_IO_CCCR_BUS_WIDTH 0x07
+#define CCCR_BUS_WIDTH_4 (1 << 1)
+#define CCCR_BUS_WIDTH_1 (1 << 0)
+#define SD_IO_CCCR_CARDCAP 0x08
+#define SD_IO_CCCR_CISPTR 0x09 /* XXX 9-10, 10-11, or 9-12 */
/* Function Basic Registers (FBR) */
-#define SD_IO_FBR_START 0x00100
-#define SD_IO_FBR_SIZE 0x00700
+#define SD_IO_FBR_START 0x00100
+#define SD_IO_FBR_SIZE 0x00700
/* Card Information Structure (CIS) */
-#define SD_IO_CIS_START 0x01000
-#define SD_IO_CIS_SIZE 0x17000
+#define SD_IO_CIS_START 0x01000
+#define SD_IO_CIS_SIZE 0x17000
/* CIS tuple codes (based on PC Card 16) */
-#define SD_IO_CISTPL_VERS_1 0x15
-#define SD_IO_CISTPL_MANFID 0x20
-#define SD_IO_CISTPL_FUNCID 0x21
-#define SD_IO_CISTPL_FUNCE 0x22
-#define SD_IO_CISTPL_END 0xff
+#define SD_IO_CISTPL_VERS_1 0x15
+#define SD_IO_CISTPL_MANFID 0x20
+#define SD_IO_CISTPL_FUNCID 0x21
+#define SD_IO_CISTPL_FUNCE 0x22
+#define SD_IO_CISTPL_END 0xff
/* CISTPL_FUNCID codes */
/* OpenBSD incorrectly defines 0x0c as FUNCTION_WLAN */
-/* #define SDMMC_FUNCTION_WLAN 0x0c */
+/* #define SDMMC_FUNCTION_WLAN 0x0c */
/* OCR bits */
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