svn commit: r335443 - head/sys/arm64/rockchip

[Emmanuel Vadot]

Author: manu
Date: Wed Jun 20 14:45:26 2018
New Revision: 335443
URL: https://svnweb.freebsd.org/changeset/base/335443

Log:
  if_rk_dwc: Fix delays handling
  
  The property are named {t,r}x_delay and not {t,r}-delay.
  The upper bits of the register are a mask of which bits is allowed
  to be written, set it otherwise we write nothing.
  OF_getencprop returns <0 = for an error.
  
  Pointy Hat: myself
  Reported by:	jmcneill (delay and mask bits)

Modified:
  head/sys/arm64/rockchip/if_dwc_rk.c

Modified: head/sys/arm64/rockchip/if_dwc_rk.c
==============================================================================
--- head/sys/arm64/rockchip/if_dwc_rk.c	Wed Jun 20 13:30:35 2018	(r335442)
+++ head/sys/arm64/rockchip/if_dwc_rk.c	Wed Jun 20 14:45:26 2018	(r335443)
@@ -70,16 +70,17 @@ rk3328_set_delays(struct syscon *grf, phandle_t node)
 {
 	uint32_t tx, rx;
 
-	if (OF_getencprop(node, "tx-delay", &tx, sizeof(tx)) >= 0)
+	if (OF_getencprop(node, "tx_delay", &tx, sizeof(tx)) <= 0)
 		tx = 0x30;
-	if (OF_getencprop(node, "rx-delay", &rx, sizeof(rx)) >= 0)
+	if (OF_getencprop(node, "rx_delay", &rx, sizeof(rx)) <= 0)
 		rx = 0x10;
 
 	tx = ((tx & RK3328_GRF_MAC_CON0_TX_MASK) <<
 	    RK3328_GRF_MAC_CON0_TX_SHIFT);
 	rx = ((rx & RK3328_GRF_MAC_CON0_TX_MASK) <<
 	    RK3328_GRF_MAC_CON0_RX_SHIFT);
-	SYSCON_WRITE_4(grf, RK3328_GRF_MAC_CON0, tx | rx);
+
+	SYSCON_WRITE_4(grf, RK3328_GRF_MAC_CON0, tx | rx | 0xFFFF0000);
 }
 
 static int