svn commit: r329695 - head/sys/powerpc/powerpc

[Justin Hibbits]

Author: jhibbits
Date: Wed Feb 21 03:34:33 2018
New Revision: 329695
URL: https://svnweb.freebsd.org/changeset/base/329695

Log:
  Split printtrap() into generic and CPU-specific components
  
  Summary:
  This compartmentalizes the CPU-specific trap components into its own
  function, rather than littering the general printtrap() with various checks.
  This will let us replace a series of #ifdef's with a runtime conditional check
  in the future.
  
  Reviewed By:	nwhitehorn
  Differential Revision:	https://reviews.freebsd.org/D14416

Modified:
  head/sys/powerpc/powerpc/trap.c

Modified: head/sys/powerpc/powerpc/trap.c
==============================================================================
--- head/sys/powerpc/powerpc/trap.c	Wed Feb 21 03:08:47 2018	(r329694)
+++ head/sys/powerpc/powerpc/trap.c	Wed Feb 21 03:34:33 2018	(r329695)
@@ -445,52 +445,65 @@ trap_fatal(struct trapframe *frame)
 }
 
 static void
-printtrap(u_int vector, struct trapframe *frame, int isfatal, int user)
+cpu_printtrap(u_int vector, struct trapframe *frame, int isfatal, int user)
 {
+#ifdef AIM
 	uint16_t ver;
-#ifdef BOOKE
-	vm_paddr_t pa;
-#endif
 
-	printf("\n");
-	printf("%s %s trap:\n", isfatal ? "fatal" : "handled",
-	    user ? "user" : "kernel");
-	printf("\n");
-	printf("   exception       = 0x%x (%s)\n", vector, trapname(vector));
 	switch (vector) {
 	case EXC_DSE:
 	case EXC_DSI:
 	case EXC_DTMISS:
-		printf("   virtual address = 0x%" PRIxPTR "\n", frame->dar);
-#ifdef AIM
 		printf("   dsisr           = 0x%lx\n",
 		    (u_long)frame->cpu.aim.dsisr);
-#endif
 		break;
-	case EXC_ISE:
-	case EXC_ISI:
-	case EXC_ITMISS:
-		printf("   virtual address = 0x%" PRIxPTR "\n", frame->srr0);
-		break;
 	case EXC_MCHK:
 		ver = mfpvr() >> 16;
-#if defined(AIM)
 		if (MPC745X_P(ver))
 			printf("    msssr0         = 0x%b\n",
 			    (int)mfspr(SPR_MSSSR0), MSSSR_BITMASK);
+		break;
+	}
 #elif defined(BOOKE)
+	vm_paddr_t pa;
+
+	switch (vector) {
+	case EXC_MCHK:
 		pa = mfspr(SPR_MCARU);
 		pa = (pa << 32) | (u_register_t)mfspr(SPR_MCAR);
 		printf("   mcsr            = 0x%b\n",
 		    (int)mfspr(SPR_MCSR), MCSR_BITMASK);
 		printf("   mcar            = 0x%jx\n", (uintmax_t)pa);
-#endif
-		break;
 	}
-#ifdef BOOKE
 	printf("   esr             = 0x%b\n",
 	    (int)frame->cpu.booke.esr, ESR_BITMASK);
 #endif
+}
+
+static void
+printtrap(u_int vector, struct trapframe *frame, int isfatal, int user)
+{
+
+	printf("\n");
+	printf("%s %s trap:\n", isfatal ? "fatal" : "handled",
+	    user ? "user" : "kernel");
+	printf("\n");
+	printf("   exception       = 0x%x (%s)\n", vector, trapname(vector));
+	switch (vector) {
+	case EXC_DSE:
+	case EXC_DSI:
+	case EXC_DTMISS:
+		printf("   virtual address = 0x%" PRIxPTR "\n", frame->dar);
+		break;
+	case EXC_ISE:
+	case EXC_ISI:
+	case EXC_ITMISS:
+		printf("   virtual address = 0x%" PRIxPTR "\n", frame->srr0);
+		break;
+	case EXC_MCHK:
+		break;
+	}
+	cpu_printtrap(vector, frame, isfatal, user);
 	printf("   srr0            = 0x%" PRIxPTR " (0x%" PRIxPTR ")\n",
 	    frame->srr0, frame->srr0 - (register_t)(__startkernel - KERNBASE));
 	printf("   srr1            = 0x%lx\n", (u_long)frame->srr1);