svn commit: r337847 - in head/sys/arm: arm include
Andrew Turner
andrew at FreeBSD.org
Wed Aug 15 14:19:09 UTC 2018
Author: andrew
Date: Wed Aug 15 14:19:07 2018
New Revision: 337847
URL: https://svnweb.freebsd.org/changeset/base/337847
Log:
Remove ARM_MMU_GENERIC, it's the only ARMV4/v5 MMU we support.
Sponsored by: DARPA, AFRL
Modified:
head/sys/arm/arm/pmap-v4.c
head/sys/arm/include/pmap-v4.h
Modified: head/sys/arm/arm/pmap-v4.c
==============================================================================
--- head/sys/arm/arm/pmap-v4.c Wed Aug 15 13:52:31 2018 (r337846)
+++ head/sys/arm/arm/pmap-v4.c Wed Aug 15 14:19:07 2018 (r337847)
@@ -447,7 +447,6 @@ kernel_pt_lookup(vm_paddr_t pa)
return (0);
}
-#if ARM_MMU_GENERIC != 0
void
pmap_pte_init_generic(void)
{
@@ -485,8 +484,6 @@ pmap_pte_init_generic(void)
pte_l2_s_proto = L2_S_PROTO_generic;
}
-#endif /* ARM_MMU_GENERIC != 0 */
-
/*
* Allocate an L1 translation table for the specified pmap.
* This is called at pmap creation time.
@@ -3771,7 +3768,6 @@ pmap_remove(pmap_t pm, vm_offset_t sva, vm_offset_t ev
* StrongARM accesses to non-cached pages are non-burst making writing
* _any_ bulk data very slow.
*/
-#if ARM_MMU_GENERIC != 0 || defined(CPU_XSCALE_CORE3)
void
pmap_zero_page_generic(vm_paddr_t phys, int off, int size)
{
@@ -3798,7 +3794,6 @@ pmap_zero_page_generic(vm_paddr_t phys, int off, int s
mtx_unlock(&cmtx);
}
-#endif /* ARM_MMU_GENERIC != 0 */
/*
* pmap_zero_page zeros the specified hardware page by mapping
@@ -3930,7 +3925,6 @@ pmap_clean_page(struct pv_entry *pv, boolean_t is_src)
* hook points. The same comment regarding cachability as in
* pmap_zero_page also applies here.
*/
-#if ARM_MMU_GENERIC != 0 || defined (CPU_XSCALE_CORE3)
void
pmap_copy_page_generic(vm_paddr_t src, vm_paddr_t dst)
{
@@ -3995,7 +3989,6 @@ pmap_copy_page_offs_generic(vm_paddr_t a_phys, vm_offs
cpu_l2cache_inv_range(csrcp + a_offs, cnt);
cpu_l2cache_wbinv_range(cdstp + b_offs, cnt);
}
-#endif /* ARM_MMU_GENERIC != 0 */
void
pmap_copy_page(vm_page_t src, vm_page_t dst)
Modified: head/sys/arm/include/pmap-v4.h
==============================================================================
--- head/sys/arm/include/pmap-v4.h Wed Aug 15 13:52:31 2018 (r337846)
+++ head/sys/arm/include/pmap-v4.h Wed Aug 15 14:19:07 2018 (r337847)
@@ -53,22 +53,6 @@
#include <machine/pte-v4.h>
/*
- * Define the MMU types we support based on the cpu types. While the code has
- * some theoretical support for multiple MMU types in a single kernel, there are
- * no actual working configurations that use that feature.
- */
-#if defined(CPU_ARM9E)
-#define ARM_MMU_GENERIC 1
-#else
-#define ARM_MMU_GENERIC 0
-#endif
-
-#define ARM_NMMUS (ARM_MMU_GENERIC)
-#if ARM_NMMUS == 0 && !defined(KLD_MODULE) && defined(_KERNEL)
-#error ARM_NMMUS is 0
-#endif
-
-/*
* Pte related macros
*/
#define PTE_NOCACHE 1
@@ -306,21 +290,6 @@ extern int pmap_needs_pte_sync;
*/
#define L2_AP(x) (L2_AP0(x) | L2_AP1(x) | L2_AP2(x) | L2_AP3(x))
-#if ARM_NMMUS > 1
-/* More than one MMU class configured; use variables. */
-#define L2_S_PROT_U pte_l2_s_prot_u
-#define L2_S_PROT_W pte_l2_s_prot_w
-#define L2_S_PROT_MASK pte_l2_s_prot_mask
-
-#define L1_S_CACHE_MASK pte_l1_s_cache_mask
-#define L2_L_CACHE_MASK pte_l2_l_cache_mask
-#define L2_S_CACHE_MASK pte_l2_s_cache_mask
-
-#define L1_S_PROTO pte_l1_s_proto
-#define L1_C_PROTO pte_l1_c_proto
-#define L2_S_PROTO pte_l2_s_proto
-
-#elif ARM_MMU_GENERIC != 0
#define L2_S_PROT_U L2_S_PROT_U_generic
#define L2_S_PROT_W L2_S_PROT_W_generic
#define L2_S_PROT_MASK L2_S_PROT_MASK_generic
@@ -333,8 +302,6 @@ extern int pmap_needs_pte_sync;
#define L1_C_PROTO L1_C_PROTO_generic
#define L2_S_PROTO L2_S_PROTO_generic
-#endif /* ARM_NMMUS > 1 */
-
#if defined(CPU_XSCALE_81342)
#define CPU_XSCALE_CORE3
#define PMAP_NEEDS_PTE_SYNC 1
@@ -438,12 +405,10 @@ extern void (*pmap_copy_page_offs_func)(vm_paddr_t a_p
vm_offset_t a_offs, vm_paddr_t b_phys, vm_offset_t b_offs, int cnt);
extern void (*pmap_zero_page_func)(vm_paddr_t, int, int);
-#if ARM_MMU_GENERIC != 0 || defined(CPU_XSCALE_81342)
void pmap_copy_page_generic(vm_paddr_t, vm_paddr_t);
void pmap_zero_page_generic(vm_paddr_t, int, int);
void pmap_pte_init_generic(void);
-#endif /* ARM_MMU_GENERIC != 0 */
#if defined(CPU_XSCALE_81342)
#define ARM_HAVE_SUPERSECTIONS
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