svn commit: r337822 - head/sys/arm/ralink
Warner Losh
imp at FreeBSD.org
Tue Aug 14 20:45:44 UTC 2018
Author: imp
Date: Tue Aug 14 20:45:43 2018
New Revision: 337822
URL: https://svnweb.freebsd.org/changeset/base/337822
Log:
arm/ralink cleanup
Remove the non-INTRNG code.
Remove left over cut and paste code from the lpc code that was the start for the port.
Set KERNPHYSADDR and KERNVIRTADDR
Tested on Buffalo_WZR2-G300N
Differential Revision: https://reviews.freebsd.org/D16622
Modified:
head/sys/arm/ralink/rt1310_intc.c
head/sys/arm/ralink/rt1310var.h
head/sys/arm/ralink/std.ralink
Modified: head/sys/arm/ralink/rt1310_intc.c
==============================================================================
--- head/sys/arm/ralink/rt1310_intc.c Tue Aug 14 20:33:48 2018 (r337821)
+++ head/sys/arm/ralink/rt1310_intc.c Tue Aug 14 20:45:43 2018 (r337822)
@@ -60,32 +60,24 @@ __FBSDID("$FreeBSD$");
#define INTC_NIRQS 32
-#ifdef INTRNG
#include "pic_if.h"
struct rt1310_irqsrc {
struct intr_irqsrc ri_isrc;
u_int ri_irq;
};
-#endif
struct rt1310_intc_softc {
device_t dev;
struct resource * ri_res;
bus_space_tag_t ri_bst;
bus_space_handle_t ri_bsh;
-#ifdef INTRNG
struct rt1310_irqsrc ri_isrcs[INTC_NIRQS];
-#endif
};
static int rt1310_intc_probe(device_t);
static int rt1310_intc_attach(device_t);
-#ifndef INTRNG
-static void rt1310_intc_eoi(void *);
-#else
static int rt1310_pic_attach(struct rt1310_intc_softc *sc);
-#endif
static struct rt1310_intc_softc *intc_softc = NULL;
@@ -143,11 +135,7 @@ rt1310_intc_probe(device_t dev)
if (!ofw_bus_is_compatible_strict(dev, "rt,pic"))
return (ENXIO);
-#ifdef INTRNG
- device_set_desc(dev, "RT1310 INTRNG Interrupt Controller");
-#else
device_set_desc(dev, "RT1310 Interrupt Controller");
-#endif
return (BUS_PROBE_DEFAULT);
}
@@ -173,11 +161,7 @@ rt1310_intc_attach(device_t dev)
sc->ri_bst = rman_get_bustag(sc->ri_res);
sc->ri_bsh = rman_get_bushandle(sc->ri_res);
intc_softc = sc;
-#ifndef INTRNG
- arm_post_filter = rt1310_intc_eoi;
-#else
rt1310_pic_attach(sc);
-#endif
intc_write_4(sc, RT_INTC_IECR, 0);
intc_write_4(sc, RT_INTC_ICCR, ~0);
@@ -195,73 +179,7 @@ rt1310_intc_attach(device_t dev)
return (0);
}
-#ifndef INTRNG
-int
-arm_get_next_irq(int last)
-{
- struct rt1310_intc_softc *sc = intc_softc;
- uint32_t value;
- int i;
- value = intc_read_4(sc, RT_INTC_IPR);
- for (i = 0; i < 32; i++) {
- if (value & (1 << i))
- return (i);
- }
-
- return (-1);
-}
-
-void
-arm_mask_irq(uintptr_t nb)
-{
- struct rt1310_intc_softc *sc = intc_softc;
- uint32_t value;
-
- /* Make sure that interrupt isn't active already */
- rt1310_intc_eoi((void *)nb);
-
- /* Clear bit in ER register */
- value = intc_read_4(sc, RT_INTC_IECR);
- value &= ~(1 << nb);
- intc_write_4(sc, RT_INTC_IECR, value);
- intc_write_4(sc, RT_INTC_IMR, value);
-
- intc_write_4(sc, RT_INTC_ICCR, 1 << nb);
-}
-
-void
-arm_unmask_irq(uintptr_t nb)
-{
- struct rt1310_intc_softc *sc = intc_softc;
- uint32_t value;
-
- value = intc_read_4(sc, RT_INTC_IECR);
-
- value |= (1 << nb);
-
- intc_write_4(sc, RT_INTC_IMR, value);
- intc_write_4(sc, RT_INTC_IECR, value);
-}
-
static void
-rt1310_intc_eoi(void *data)
-{
- struct rt1310_intc_softc *sc = intc_softc;
- int nb = (int)data;
-
- intc_write_4(sc, RT_INTC_ICCR, 1 << nb);
- if (nb == 0) {
- uint32_t value;
- value = intc_read_4(sc, RT_INTC_IECR);
- value &= ~(1 << nb);
- intc_write_4(sc, RT_INTC_IECR, value);
- intc_write_4(sc, RT_INTC_IMR, value);
- }
-}
-
-#else
-
-static void
rt1310_enable_intr(device_t dev, struct intr_irqsrc *isrc)
{
u_int irq;
@@ -390,43 +308,20 @@ rt1310_pic_attach(struct rt1310_intc_softc *sc)
return (intr_pic_claim_root(sc->dev, xref, rt1310_intr, sc, 0));
}
-#endif
struct fdt_fixup_entry fdt_fixup_table[] = {
{ NULL, NULL }
};
-#ifndef INTRNG
-static int
-fdt_pic_decode_ic(phandle_t node, pcell_t *intr, int *interrupt, int *trig,
- int *pol)
-{
- if (!fdt_is_compatible(node, "lpc,pic"))
- return (ENXIO);
-
- *interrupt = fdt32_to_cpu(intr[0]);
- *trig = INTR_TRIGGER_CONFORM;
- *pol = INTR_POLARITY_CONFORM;
- return (0);
-}
-
-fdt_pic_decode_t fdt_pic_table[] = {
- &fdt_pic_decode_ic,
- NULL
-};
-#endif
-
static device_method_t rt1310_intc_methods[] = {
DEVMETHOD(device_probe, rt1310_intc_probe),
DEVMETHOD(device_attach, rt1310_intc_attach),
-#ifdef INTRNG
DEVMETHOD(pic_disable_intr, rt1310_disable_intr),
DEVMETHOD(pic_enable_intr, rt1310_enable_intr),
DEVMETHOD(pic_map_intr, rt1310_map_intr),
DEVMETHOD(pic_post_filter, rt1310_post_filter),
DEVMETHOD(pic_post_ithread, rt1310_post_ithread),
DEVMETHOD(pic_pre_ithread, rt1310_pre_ithread),
-#endif
{ 0, 0 }
};
Modified: head/sys/arm/ralink/rt1310var.h
==============================================================================
--- head/sys/arm/ralink/rt1310var.h Tue Aug 14 20:33:48 2018 (r337821)
+++ head/sys/arm/ralink/rt1310var.h Tue Aug 14 20:45:43 2018 (r337822)
@@ -33,38 +33,11 @@
#include <sys/bus.h>
#include <machine/bus.h>
-/* Clocking and power control */
-uint32_t lpc_pwr_read(device_t, int);
-void lpc_pwr_write(device_t, int, uint32_t);
-
/* GPIO */
void rt1310_gpio_init(void);
int rt1310_gpio_set_flags(device_t, int, int);
int rt1310_gpio_set_state(device_t, int, int);
int rt1310_gpio_get_state(device_t, int, int *);
-
-/* DMA */
-struct lpc_dmac_channel_config
-{
- int ldc_fcntl;
- int ldc_src_periph;
- int ldc_src_width;
- int ldc_src_incr;
- int ldc_src_burst;
- int ldc_dst_periph;
- int ldc_dst_width;
- int ldc_dst_incr;
- int ldc_dst_burst;
- void (*ldc_success_handler)(void *);
- void (*ldc_error_handler)(void *);
- void * ldc_handler_arg;
-};
-
-int lpc_dmac_config_channel(device_t, int, struct lpc_dmac_channel_config *);
-int lpc_dmac_setup_transfer(device_t, int, bus_addr_t, bus_addr_t, bus_size_t, int);
-int lpc_dmac_enable_channel(device_t, int);
-int lpc_dmac_disable_channel(device_t, int);
-int lpc_dmac_start_burst(device_t, int);
extern uint32_t rt1310_master_clock;
Modified: head/sys/arm/ralink/std.ralink
==============================================================================
--- head/sys/arm/ralink/std.ralink Tue Aug 14 20:33:48 2018 (r337821)
+++ head/sys/arm/ralink/std.ralink Tue Aug 14 20:45:43 2018 (r337822)
@@ -4,3 +4,8 @@ cpu CPU_ARM9E
machine arm
makeoptions CONF_CFLAGS="-march=armv5te"
options INTRNG
+
+makeoptions KERNPHYSADDR=0x40000000
+makeoptions KERNVIRTADDR=0xc0000000
+options KERNVIRTADDR=0xc0000000
+options PHYSADDR=0x40000000
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