svn commit: r326227 - in head/sys/arm64: arm64 include

Konstantin Belousov kostikbel at gmail.com
Sun Nov 26 18:33:44 UTC 2017


On Sun, Nov 26, 2017 at 02:28:27PM +0000, Ed Schouten wrote:
> Author: ed
> Date: Sun Nov 26 14:28:27 2017
> New Revision: 326227
> URL: https://svnweb.freebsd.org/changeset/base/326227
> 
> Log:
>   Make 32-bit system calls end up in svc_handler().
>   
>   The nice thing about ARM64 is that it's pretty elegant to install
>   separate trap/exception handlers for 32-bit and 64-bit processes. That
>   said, for all other architectures (e.g., i386 on amd64) we always let
>   32-bit counterparts go through the regular system call codepath. Let's
>   do the same on ARM64.
We don't and never did on amd64.

For amd64, IDT entry for int $0x80 points to a handler which, by its
nature, is different from the native syscall entry.  Then, i386 ABI-specific
ia32_syscall() C handler is called from the trampoline, and reuses the
subr_syscall.c code by inclusion.

In other words, there is no reused code, except MI syscallenter/syscallret.

>   
>   Reviewed by:	andrew
>   Differential Revision:	https://reviews.freebsd.org/D13146
> 
> Modified:
>   head/sys/arm64/arm64/exception.S
>   head/sys/arm64/arm64/trap.c
>   head/sys/arm64/include/armreg.h
> 
> Modified: head/sys/arm64/arm64/exception.S
> ==============================================================================
> --- head/sys/arm64/arm64/exception.S	Sun Nov 26 10:02:43 2017	(r326226)
> +++ head/sys/arm64/arm64/exception.S	Sun Nov 26 14:28:27 2017	(r326227)
> @@ -219,8 +219,8 @@ exception_vectors:
>  	vempty			/* FIQ 64-bit EL0 */
>  	vector el0_error	/* Error 64-bit EL0 */
>  
> -	vempty			/* Synchronous 32-bit EL0 */
> -	vempty			/* IRQ 32-bit EL0 */
> +	vector el0_sync		/* Synchronous 32-bit EL0 */
> +	vector el0_irq		/* IRQ 32-bit EL0 */
>  	vempty			/* FIQ 32-bit EL0 */
> -	vempty			/* Error 32-bit EL0 */
> +	vector el0_error	/* Error 32-bit EL0 */
>  
> 
> Modified: head/sys/arm64/arm64/trap.c
> ==============================================================================
> --- head/sys/arm64/arm64/trap.c	Sun Nov 26 10:02:43 2017	(r326226)
> +++ head/sys/arm64/arm64/trap.c	Sun Nov 26 14:28:27 2017	(r326227)
> @@ -381,7 +381,8 @@ do_el0_sync(struct thread *td, struct trapframe *frame
>  		panic("VFP exception in userland");
>  #endif
>  		break;
> -	case EXCP_SVC:
> +	case EXCP_SVC32:
> +	case EXCP_SVC64:
>  		svc_handler(td, frame);
>  		break;
>  	case EXCP_INSN_ABORT_L:
> 
> Modified: head/sys/arm64/include/armreg.h
> ==============================================================================
> --- head/sys/arm64/include/armreg.h	Sun Nov 26 10:02:43 2017	(r326226)
> +++ head/sys/arm64/include/armreg.h	Sun Nov 26 14:28:27 2017	(r326227)
> @@ -123,7 +123,8 @@
>  #define	 EXCP_UNKNOWN		0x00	/* Unkwn exception */
>  #define	 EXCP_FP_SIMD		0x07	/* VFP/SIMD trap */
>  #define	 EXCP_ILL_STATE		0x0e	/* Illegal execution state */
> -#define	 EXCP_SVC		0x15	/* SVC trap */
> +#define	 EXCP_SVC32		0x11	/* SVC trap for AArch32 */
> +#define	 EXCP_SVC64		0x15	/* SVC trap for AArch64 */
>  #define	 EXCP_MSR		0x18	/* MSR/MRS trap */
>  #define	 EXCP_INSN_ABORT_L	0x20	/* Instruction abort, from lower EL */
>  #define	 EXCP_INSN_ABORT	0x21	/* Instruction abort, from same EL */ 


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