svn commit: r322710 - head/sys/x86/cpufreq

[Conrad Meyer]

Author: cem
Date: Sun Aug 20 00:41:49 2017
New Revision: 322710
URL: https://svnweb.freebsd.org/changeset/base/322710

Log:
  hwpstate: Add support for family 17h pstate info from MSRs
  
  This information is normally available via acpi_perf, but in case it is not,
  add support for fetching the information via MSRs on AMD family 17h (Zen)
  processors.  Zen uses a slightly different formula than previous generation
  AMD CPUs.
  
  This was inspired by, but does not fix, PR 221621.
  
  Reported by:	Sean P. R. <seanpr AT swbell.net>
  Reviewed by:	mjoras@
  Sponsored by:	Dell EMC Isilon
  Differential Revision:	https://reviews.freebsd.org/D12082

Modified:
  head/sys/x86/cpufreq/hwpstate.c

Modified: head/sys/x86/cpufreq/hwpstate.c
==============================================================================
--- head/sys/x86/cpufreq/hwpstate.c	Sat Aug 19 23:13:33 2017	(r322709)
+++ head/sys/x86/cpufreq/hwpstate.c	Sun Aug 20 00:41:49 2017	(r322710)
@@ -83,6 +83,10 @@ __FBSDID("$FreeBSD$");
 #define	AMD_10H_11H_CUR_DID(msr)		(((msr) >> 6) & 0x07)
 #define	AMD_10H_11H_CUR_FID(msr)		((msr) & 0x3F)
 
+#define	AMD_17H_CUR_VID(msr)			(((msr) >> 14) & 0xFF)
+#define	AMD_17H_CUR_DID(msr)			(((msr) >> 8) & 0x3F)
+#define	AMD_17H_CUR_FID(msr)			((msr) & 0xFF)
+
 #define	HWPSTATE_DEBUG(dev, msg...)			\
 	do{						\
 		if(hwpstate_verbose)			\
@@ -426,6 +430,15 @@ hwpstate_get_info_from_msr(device_t dev)
 		case 0x15:
 		case 0x16:
 			hwpstate_set[i].freq = (100 * (fid + 0x10)) >> did;
+			break;
+		case 0x17:
+			did = AMD_17H_CUR_DID(msr);
+			if (did == 0) {
+				HWPSTATE_DEBUG(dev, "unexpected did: 0\n");
+				did = 1;
+			}
+			fid = AMD_17H_CUR_FID(msr);
+			hwpstate_set[i].freq = (200 * fid) / did;
 			break;
 		default:
 			HWPSTATE_DEBUG(dev, "get_info_from_msr: AMD family"