svn commit: r294266 - head/sys/arm64/cavium

[Zbigniew Bodek]

Author: zbb
Date: Mon Jan 18 13:31:29 2016
New Revision: 294266
URL: https://svnweb.freebsd.org/changeset/base/294266

Log:
  Update ThunderX PCIe driver to fit new DTS layout
  
  In recent EFI the DTS entries changed for PCIe controller.
  This commit fixes internal PCIe, external is yet TBD.
  
  Submitted by:  Dominik Ermel <der at semihalf.com>
  Obtained from: Semihalf
  Sponsored by:  The FreeBSD Foundation
  Differential revision: https://reviews.freebsd.org/D4976

Modified:
  head/sys/arm64/cavium/thunder_pcie.c
  head/sys/arm64/cavium/thunder_pcie_common.c
  head/sys/arm64/cavium/thunder_pcie_common.h
  head/sys/arm64/cavium/thunder_pcie_pem.c

Modified: head/sys/arm64/cavium/thunder_pcie.c
==============================================================================
--- head/sys/arm64/cavium/thunder_pcie.c	Mon Jan 18 12:02:05 2016	(r294265)
+++ head/sys/arm64/cavium/thunder_pcie.c	Mon Jan 18 13:31:29 2016	(r294266)
@@ -92,7 +92,7 @@ __FBSDID("$FreeBSD$");
 #define	PCI_ADDR_CELL_SIZE	2
 
 struct thunder_pcie_softc {
-	struct pcie_range	ranges[MAX_RANGES_TUPLES];
+	struct pcie_range	ranges[RANGES_TUPLES_MAX];
 	struct rman		mem_rman;
 	struct resource		*res;
 	int			ecam;
@@ -132,7 +132,8 @@ thunder_pcie_probe(device_t dev)
 	if (!ofw_bus_status_okay(dev))
 		return (ENXIO);
 
-	if (ofw_bus_is_compatible(dev, "cavium,thunder-pcie")) {
+	if (ofw_bus_is_compatible(dev, "cavium,thunder-pcie") ||
+	    ofw_bus_is_compatible(dev, "cavium,pci-host-thunder-ecam")) {
 		device_set_desc(dev, "Cavium Integrated PCI/PCI-E Controller");
 		return (BUS_PROBE_DEFAULT);
 	}
@@ -180,7 +181,7 @@ thunder_pcie_attach(device_t dev)
 		return (error);
 	}
 
-	for (tuple = 0; tuple < MAX_RANGES_TUPLES; tuple++) {
+	for (tuple = 0; tuple < RANGES_TUPLES_MAX; tuple++) {
 		base = sc->ranges[tuple].phys_base;
 		size = sc->ranges[tuple].size;
 		if ((base == 0) || (size == 0))
@@ -245,8 +246,7 @@ parse_pci_mem_ranges(struct thunder_pcie
 
 	tuples_count = cells_count /
 	    (pci_addr_cells + parent_addr_cells + size_cells);
-	if ((tuples_count > MAX_RANGES_TUPLES) ||
-	    (tuples_count < MIN_RANGES_TUPLES)) {
+	if (tuples_count > RANGES_TUPLES_MAX) {
 		device_printf(sc->dev,
 		    "Unexpected number of 'ranges' tuples in FDT\n");
 		rv = ENXIO;
@@ -296,7 +296,7 @@ parse_pci_mem_ranges(struct thunder_pcie
 		}
 
 	}
-	for (; tuple < MAX_RANGES_TUPLES; tuple++) {
+	for (; tuple < RANGES_TUPLES_MAX; tuple++) {
 		/* zero-fill remaining tuples to mark empty elements in array */
 		sc->ranges[tuple].phys_base = 0;
 		sc->ranges[tuple].size = 0;

Modified: head/sys/arm64/cavium/thunder_pcie_common.c
==============================================================================
--- head/sys/arm64/cavium/thunder_pcie_common.c	Mon Jan 18 12:02:05 2016	(r294265)
+++ head/sys/arm64/cavium/thunder_pcie_common.c	Mon Jan 18 13:31:29 2016	(r294266)
@@ -48,7 +48,7 @@ range_addr_is_pci(struct pcie_range *ran
 	struct pcie_range *r;
 	int tuple;
 
-	for (tuple = 0; tuple < MAX_RANGES_TUPLES; tuple++) {
+	for (tuple = 0; tuple < RANGES_TUPLES_MAX; tuple++) {
 		r = &ranges[tuple];
 		if (addr >= r->pci_base &&
 		    addr < (r->pci_base + r->size) &&
@@ -68,7 +68,7 @@ range_addr_is_phys(struct pcie_range *ra
 	struct pcie_range *r;
 	int tuple;
 
-	for (tuple = 0; tuple < MAX_RANGES_TUPLES; tuple++) {
+	for (tuple = 0; tuple < RANGES_TUPLES_MAX; tuple++) {
 		r = &ranges[tuple];
 		if (addr >= r->phys_base &&
 		    addr < (r->phys_base + r->size) &&
@@ -90,7 +90,7 @@ range_addr_pci_to_phys(struct pcie_range
 	int tuple;
 
 	/* Find physical address corresponding to given bus address */
-	for (tuple = 0; tuple < MAX_RANGES_TUPLES; tuple++) {
+	for (tuple = 0; tuple < RANGES_TUPLES_MAX; tuple++) {
 		r = &ranges[tuple];
 		if (pci_addr >= r->pci_base &&
 		    pci_addr < (r->pci_base + r->size)) {

Modified: head/sys/arm64/cavium/thunder_pcie_common.h
==============================================================================
--- head/sys/arm64/cavium/thunder_pcie_common.h	Mon Jan 18 12:02:05 2016	(r294265)
+++ head/sys/arm64/cavium/thunder_pcie_common.h	Mon Jan 18 13:31:29 2016	(r294266)
@@ -29,8 +29,8 @@
 #ifndef _CAVIUM_THUNDER_PCIE_COMMON_H_
 #define	_CAVIUM_THUNDER_PCIE_COMMON_H_
 
-#define	MAX_RANGES_TUPLES	5
-#define	MIN_RANGES_TUPLES	2
+#define	RANGES_TUPLES_MAX	6
+#define	RANGES_TUPLES_INVALID (RANGES_TUPLES_MAX + 1)
 
 struct pcie_range {
 	uint64_t	pci_base;

Modified: head/sys/arm64/cavium/thunder_pcie_pem.c
==============================================================================
--- head/sys/arm64/cavium/thunder_pcie_pem.c	Mon Jan 18 12:02:05 2016	(r294265)
+++ head/sys/arm64/cavium/thunder_pcie_pem.c	Mon Jan 18 13:31:29 2016	(r294266)
@@ -114,7 +114,7 @@ struct thunder_pem_softc {
 	struct resource		*reg;
 	bus_space_tag_t		reg_bst;
 	bus_space_handle_t	reg_bsh;
-	struct pcie_range	ranges[MAX_RANGES_TUPLES];
+	struct pcie_range	ranges[RANGES_TUPLES_MAX];
 	struct rman		mem_rman;
 	struct rman		io_rman;
 	bus_space_handle_t	pem_sli_base;