svn commit: r295267 - head/sys/arm/arm
Michal Meloun
mmel at FreeBSD.org
Thu Feb 4 17:01:40 UTC 2016
Author: mmel
Date: Thu Feb 4 17:01:38 2016
New Revision: 295267
URL: https://svnweb.freebsd.org/changeset/base/295267
Log:
Replace broken implementation of fuswintr() and suswintr() by functions
which return -1 as well as on tier 1 archs. Remove block_userspace_access
used only in these implementations.
(1) These functions may be called in interrupt context and pcb_onfault
can be already set in this time. Thus, prior pcb_onfault must be saved
and restored afterwards.
(2) The check that an abort came either from nested interrupt or while
in critical section or holding not sleepable lock must be avoided for
this case.
These functions are called only for profiling reason, so there will be
only small gain by making the code more complex.
Modified:
head/sys/arm/arm/cpufunc_asm_xscale.S
head/sys/arm/arm/cpufunc_asm_xscale_c3.S
head/sys/arm/arm/elf_trampoline.c
head/sys/arm/arm/fusu.S
head/sys/arm/arm/trap-v6.c
head/sys/arm/arm/trap.c
Modified: head/sys/arm/arm/cpufunc_asm_xscale.S
==============================================================================
--- head/sys/arm/arm/cpufunc_asm_xscale.S Thu Feb 4 16:38:24 2016 (r295266)
+++ head/sys/arm/arm/cpufunc_asm_xscale.S Thu Feb 4 17:01:38 2016 (r295267)
@@ -80,9 +80,6 @@ __FBSDID("$FreeBSD$");
*/
#define DCACHE_SIZE 0x00008000
-.Lblock_userspace_access:
- .word _C_LABEL(block_userspace_access)
-
/*
* CPWAIT -- Canonical method to wait for CP15 update.
* From: Intel 80200 manual, section 2.3.3.
@@ -137,11 +134,6 @@ ENTRY(xscale_setttb)
mrs r3, cpsr
orr r1, r3, #(PSR_I | PSR_F)
msr cpsr_fsxc, r1
-#else
- ldr r3, .Lblock_userspace_access
- ldr r2, [r3]
- orr r1, r2, #1
- str r1, [r3]
#endif
stmfd sp!, {r0-r3, lr}
bl _C_LABEL(xscale_cache_cleanID)
@@ -165,8 +157,6 @@ ENTRY(xscale_setttb)
#ifdef CACHE_CLEAN_BLOCK_INTR
msr cpsr_fsxc, r3
-#else
- str r2, [r3]
#endif
RET
END(xscale_setttb)
@@ -273,14 +263,9 @@ _C_LABEL(xscale_minidata_clean_size):
#define XSCALE_CACHE_CLEAN_UNBLOCK \
msr cpsr_fsxc, r3
#else
-#define XSCALE_CACHE_CLEAN_BLOCK \
- ldr r3, .Lblock_userspace_access ; \
- ldr ip, [r3] ; \
- orr r0, ip, #1 ; \
- str r0, [r3]
+#define XSCALE_CACHE_CLEAN_BLOCK
-#define XSCALE_CACHE_CLEAN_UNBLOCK \
- str ip, [r3]
+#define XSCALE_CACHE_CLEAN_UNBLOCK
#endif /* CACHE_CLEAN_BLOCK_INTR */
#define XSCALE_CACHE_CLEAN_PROLOGUE \
Modified: head/sys/arm/arm/cpufunc_asm_xscale_c3.S
==============================================================================
--- head/sys/arm/arm/cpufunc_asm_xscale_c3.S Thu Feb 4 16:38:24 2016 (r295266)
+++ head/sys/arm/arm/cpufunc_asm_xscale_c3.S Thu Feb 4 17:01:38 2016 (r295267)
@@ -82,9 +82,6 @@ __FBSDID("$FreeBSD$");
*/
#define DCACHE_SIZE 0x00008000
-.Lblock_userspace_access:
- .word _C_LABEL(block_userspace_access)
-
/*
* CPWAIT -- Canonical method to wait for CP15 update.
* From: Intel 80200 manual, section 2.3.3.
@@ -130,16 +127,8 @@ __FBSDID("$FreeBSD$");
msr cpsr_fsxc, r4 ; \
ldmfd sp!, {r4}
#else
-#define XSCALE_CACHE_CLEAN_BLOCK \
- stmfd sp!, {r4} ; \
- ldr r4, .Lblock_userspace_access ; \
- ldr ip, [r4] ; \
- orr r0, ip, #1 ; \
- str r0, [r4]
-
-#define XSCALE_CACHE_CLEAN_UNBLOCK \
- str ip, [r3] ; \
- ldmfd sp!, {r4}
+#define XSCALE_CACHE_CLEAN_BLOCK
+#define XSCALE_CACHE_CLEAN_UNBLOCK
#endif /* CACHE_CLEAN_BLOCK_INTR */
@@ -352,11 +341,6 @@ ENTRY(xscalec3_setttb)
mrs r3, cpsr
orr r1, r3, #(PSR_I | PSR_F)
msr cpsr_fsxc, r1
-#else
- ldr r3, .Lblock_userspace_access
- ldr r2, [r3]
- orr r1, r2, #1
- str r1, [r3]
#endif
stmfd sp!, {r0-r3, lr}
bl _C_LABEL(xscalec3_cache_cleanID)
Modified: head/sys/arm/arm/elf_trampoline.c
==============================================================================
--- head/sys/arm/arm/elf_trampoline.c Thu Feb 4 16:38:24 2016 (r295266)
+++ head/sys/arm/arm/elf_trampoline.c Thu Feb 4 17:01:38 2016 (r295267)
@@ -125,7 +125,6 @@ static int arm_dcache_l2_assoc;
static int arm_dcache_l2_linesize;
-int block_userspace_access = 0;
extern int arm9_dcache_sets_inc;
extern int arm9_dcache_sets_max;
extern int arm9_dcache_index_max;
Modified: head/sys/arm/arm/fusu.S
==============================================================================
--- head/sys/arm/arm/fusu.S Thu Feb 4 16:38:24 2016 (r295266)
+++ head/sys/arm/arm/fusu.S Thu Feb 4 17:01:38 2016 (r295267)
@@ -183,51 +183,10 @@ END(fusword)
*/
ENTRY(fuswintr)
- ldr r3, =(VM_MAXUSER_ADDRESS-1)
- cmp r0, r3
- mvncs r0, #0
- RETc(cs)
-
- ldr r2, Lblock_userspace_access
- ldr r2, [r2]
- teq r2, #0
- mvnne r0, #0x00000000
- RETne
-
- GET_PCB(r2)
- ldr r2, [r2]
-
-#ifdef DIAGNOSTIC
- teq r2, #0x00000000
- beq .Lfusupcbfault
-#endif
-
- adr r1, _C_LABEL(fusubailout)
- str r1, [r2, #PCB_ONFAULT]
-
- ldrbt r3, [r0], #1
- ldrbt ip, [r0]
-#ifdef __ARMEB__
- orr r0, ip, r3, asl #8
-#else
- orr r0, r3, ip, asl #8
-#endif
-
- mov r1, #0x00000000
- str r1, [r2, #PCB_ONFAULT]
+ mov r0, #-1
RET
END(fuswintr)
-Lblock_userspace_access:
- .word _C_LABEL(block_userspace_access)
-
- .data
- .align 2
- .global _C_LABEL(block_userspace_access)
-_C_LABEL(block_userspace_access):
- .word 0
- .text
-
/*
* fubyte(caddr_t uaddr);
* Fetch a byte from the user's address space.
@@ -268,20 +227,6 @@ END(fubyte)
mvn r0, #0x00000000
RET
-/*
- * Handle faults from [fs]u*(). Clean up and return -1. This differs from
- * fusufault() in that trap() will recognise it and return immediately rather
- * than trying to page fault.
- */
-
-/* label must be global as fault.c references it */
- .global _C_LABEL(fusubailout)
-_C_LABEL(fusubailout):
- mov r0, #0x00000000
- str r0, [r2, #PCB_ONFAULT]
- mvn r0, #0x00000000
- RET
-
#ifdef DIAGNOSTIC
/*
* Handle earlier faults from [fs]u*(), due to no pcb
@@ -335,39 +280,7 @@ END(suword)
*/
ENTRY(suswintr)
- ldr r3, =(VM_MAXUSER_ADDRESS-1)
- cmp r0, r3
- mvncs r0, #0
- RETc(cs)
-
- ldr r2, Lblock_userspace_access
- ldr r2, [r2]
- teq r2, #0
- mvnne r0, #0x00000000
- RETne
-
- GET_PCB(r2)
- ldr r2, [r2]
-
-#ifdef DIAGNOSTIC
- teq r2, #0x00000000
- beq .Lfusupcbfault
-#endif
-
- adr r3, _C_LABEL(fusubailout)
- str r3, [r2, #PCB_ONFAULT]
-
-#ifdef __ARMEB__
- mov ip, r1, lsr #8
- strbt ip, [r0], #1
-#else
- strbt r1, [r0], #1
- mov r1, r1, lsr #8
-#endif
- strbt r1, [r0]
-
- mov r0, #0x00000000
- str r0, [r2, #PCB_ONFAULT]
+ mov r0, #-1
RET
END(suswintr)
Modified: head/sys/arm/arm/trap-v6.c
==============================================================================
--- head/sys/arm/arm/trap-v6.c Thu Feb 4 16:38:24 2016 (r295266)
+++ head/sys/arm/arm/trap-v6.c Thu Feb 4 17:01:38 2016 (r295267)
@@ -70,7 +70,6 @@ __FBSDID("$FreeBSD$");
#include <sys/dtrace_bsd.h>
#endif
-extern char fusubailout[];
extern char cachebailout[];
#ifdef DEBUG
@@ -445,13 +444,6 @@ abort_handler(struct trapframe *tf, int
goto out;
}
- /* fusubailout is used by [fs]uswintr to avoid page faulting. */
- if (__predict_false(pcb->pcb_onfault == fusubailout)) {
- tf->tf_r0 = EFAULT;
- tf->tf_pc = (register_t)pcb->pcb_onfault;
- return;
- }
-
va = trunc_page(far);
if (va >= KERNBASE) {
/*
Modified: head/sys/arm/arm/trap.c
==============================================================================
--- head/sys/arm/arm/trap.c Thu Feb 4 16:38:24 2016 (r295266)
+++ head/sys/arm/arm/trap.c Thu Feb 4 17:01:38 2016 (r295267)
@@ -111,8 +111,6 @@ __FBSDID("$FreeBSD$");
#define ReadWord(a) (*((volatile unsigned int *)(a)))
-extern char fusubailout[];
-
#ifdef DEBUG
int last_fault_code; /* For the benefit of pmap_fault_fixup() */
#endif
@@ -255,13 +253,6 @@ abort_handler(struct trapframe *tf, int
* the MMU.
*/
- /* fusubailout is used by [fs]uswintr to avoid page faulting */
- if (__predict_false(pcb->pcb_onfault == fusubailout)) {
- tf->tf_r0 = EFAULT;
- tf->tf_pc = (register_t)(intptr_t) pcb->pcb_onfault;
- return;
- }
-
/*
* Make sure the Program Counter is sane. We could fall foul of
* someone executing Thumb code, in which case the PC might not
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