svn commit: r310194 - in head: . contrib/compiler-rt/lib/builtins contrib/libc++/include contrib/llvm/include/llvm/Analysis contrib/llvm/include/llvm/ExecutionEngine contrib/llvm/include/llvm/IR co...
Dimitry Andric
dim at FreeBSD.org
Sat Dec 17 22:34:24 UTC 2016
Author: dim
Date: Sat Dec 17 22:34:19 2016
New Revision: 310194
URL: https://svnweb.freebsd.org/changeset/base/310194
Log:
Upgrade our copies of clang, llvm, lld, lldb, compiler-rt and libc++ to
3.9.1 release.
Please note that from 3.5.0 onwards, clang, llvm and lldb require C++11
support to build; see UPDATING for more information.
Release notes for llvm, clang and lld will be available here:
<http://releases.llvm.org/3.9.1/docs/ReleaseNotes.html>
<http://releases.llvm.org/3.9.1/tools/clang/docs/ReleaseNotes.html>
<http://releases.llvm.org/3.9.1/tools/lld/docs/ReleaseNotes.html>
Relnotes: yes
MFC after: 2 weeks
X-MFC-with: r309124
Added:
head/contrib/compiler-rt/lib/builtins/unwind-ehabi-helpers.h
- copied unchanged from r310192, projects/clang391-import/contrib/compiler-rt/lib/builtins/unwind-ehabi-helpers.h
head/contrib/llvm/tools/clang/lib/Headers/msa.h
- copied unchanged from r310192, projects/clang391-import/contrib/llvm/tools/clang/lib/Headers/msa.h
Modified:
head/ObsoleteFiles.inc
head/UPDATING
head/contrib/compiler-rt/lib/builtins/gcc_personality_v0.c
head/contrib/libc++/include/tuple
head/contrib/llvm/include/llvm/Analysis/LoopAccessAnalysis.h
head/contrib/llvm/include/llvm/ExecutionEngine/RTDyldMemoryManager.h
head/contrib/llvm/include/llvm/IR/Intrinsics.td
head/contrib/llvm/include/llvm/IR/TypeFinder.h
head/contrib/llvm/include/llvm/Support/Threading.h
head/contrib/llvm/lib/Analysis/LoopAccessAnalysis.cpp
head/contrib/llvm/lib/CodeGen/BranchFolding.cpp
head/contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
head/contrib/llvm/lib/Linker/IRMover.cpp
head/contrib/llvm/lib/Support/Unix/Signals.inc
head/contrib/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
head/contrib/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
head/contrib/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
head/contrib/llvm/lib/Target/AMDGPU/SIInstructions.td
head/contrib/llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
head/contrib/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
head/contrib/llvm/lib/Target/ARM/ARMInstrThumb2.td
head/contrib/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
head/contrib/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
head/contrib/llvm/lib/Target/PowerPC/PPCISelLowering.h
head/contrib/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
head/contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td
head/contrib/llvm/lib/Target/X86/X86ISelLowering.cpp
head/contrib/llvm/lib/Target/X86/X86InstrAVX512.td
head/contrib/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
head/contrib/llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
head/contrib/llvm/lib/Transforms/Scalar/JumpThreading.cpp
head/contrib/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
head/contrib/llvm/tools/clang/include/clang/AST/DeclTemplate.h
head/contrib/llvm/tools/clang/include/clang/Basic/DiagnosticDriverKinds.td
head/contrib/llvm/tools/clang/include/clang/Basic/DiagnosticSemaKinds.td
head/contrib/llvm/tools/clang/include/clang/Sema/Sema.h
head/contrib/llvm/tools/clang/lib/Basic/Targets.cpp
head/contrib/llvm/tools/clang/lib/Basic/Version.cpp
head/contrib/llvm/tools/clang/lib/CodeGen/CGExpr.cpp
head/contrib/llvm/tools/clang/lib/CodeGen/CGStmt.cpp
head/contrib/llvm/tools/clang/lib/CodeGen/CGStmtOpenMP.cpp
head/contrib/llvm/tools/clang/lib/CodeGen/CodeGenFunction.cpp
head/contrib/llvm/tools/clang/lib/CodeGen/CodeGenFunction.h
head/contrib/llvm/tools/clang/lib/Driver/ToolChains.cpp
head/contrib/llvm/tools/clang/lib/Driver/Tools.cpp
head/contrib/llvm/tools/clang/lib/Sema/Sema.cpp
head/contrib/llvm/tools/clang/lib/Sema/SemaCXXScopeSpec.cpp
head/contrib/llvm/tools/clang/lib/Sema/SemaChecking.cpp
head/contrib/llvm/tools/clang/lib/Sema/SemaDecl.cpp
head/contrib/llvm/tools/clang/lib/Sema/SemaExpr.cpp
head/contrib/llvm/tools/clang/lib/Sema/SemaExprCXX.cpp
head/contrib/llvm/tools/clang/lib/Sema/SemaLambda.cpp
head/contrib/llvm/tools/clang/lib/Sema/SemaOpenMP.cpp
head/contrib/llvm/tools/clang/lib/Sema/SemaTemplate.cpp
head/contrib/llvm/tools/clang/lib/Sema/SemaTemplateInstantiate.cpp
head/contrib/llvm/tools/clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
head/contrib/llvm/tools/clang/lib/Serialization/ASTReaderDecl.cpp
head/contrib/llvm/tools/lld/COFF/CMakeLists.txt
head/contrib/llvm/tools/lld/ELF/InputFiles.cpp
head/contrib/llvm/tools/lldb/include/lldb/Core/ArchSpec.h
head/contrib/llvm/tools/lldb/source/Core/ArchSpec.cpp
head/contrib/llvm/tools/lldb/source/Core/RegisterValue.cpp
head/contrib/llvm/tools/lldb/source/Plugins/ABI/SysV-mips64/ABISysV_mips64.cpp
head/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfos_mips.h
head/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfos_mips64.h
head/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/lldb-mips-linux-register-enums.h
head/contrib/llvm/tools/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
head/contrib/llvm/tools/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerCommon.cpp
head/etc/mtree/BSD.debug.dist
head/etc/mtree/BSD.usr.dist
head/lib/clang/freebsd_cc_version.h
head/lib/clang/headers/Makefile
head/lib/clang/include/clang/Basic/Version.inc
head/lib/clang/include/clang/Config/config.h
head/lib/clang/include/llvm/Config/config.h
head/lib/clang/include/llvm/Config/llvm-config.h
head/lib/libclang_rt/Makefile.inc
head/lib/libcompiler_rt/Makefile
head/tools/build/mk/OptionalObsoleteFiles.inc
Directory Properties:
head/ (props changed)
head/cddl/ (props changed)
head/cddl/contrib/opensolaris/ (props changed)
head/contrib/binutils/ (props changed)
head/contrib/byacc/ (props changed)
head/contrib/compiler-rt/ (props changed)
head/contrib/dma/ (props changed)
head/contrib/elftoolchain/ (props changed)
head/contrib/groff/ (props changed)
head/contrib/libarchive/ (props changed)
head/contrib/libc++/ (props changed)
head/contrib/libc-vis/ (props changed)
head/contrib/llvm/ (props changed)
head/contrib/llvm/tools/clang/ (props changed)
head/contrib/llvm/tools/lld/ (props changed)
head/contrib/llvm/tools/lldb/ (props changed)
head/contrib/netbsd-tests/ (props changed)
head/contrib/subversion/ (props changed)
head/contrib/tcpdump/ (props changed)
head/contrib/tzdata/ (props changed)
head/sys/amd64/amd64/efirt.c (props changed)
head/sys/cddl/contrib/opensolaris/ (props changed)
Modified: head/ObsoleteFiles.inc
==============================================================================
--- head/ObsoleteFiles.inc Sat Dec 17 22:31:30 2016 (r310193)
+++ head/ObsoleteFiles.inc Sat Dec 17 22:34:19 2016 (r310194)
@@ -38,6 +38,115 @@
# xargs -n1 | sort | uniq -d;
# done
+# 20161217: new clang import which bumps version from 3.9.0 to 3.9.1.
+OLD_FILES+=usr/lib/clang/3.9.0/include/sanitizer/allocator_interface.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/sanitizer/asan_interface.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/sanitizer/common_interface_defs.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/sanitizer/coverage_interface.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/sanitizer/dfsan_interface.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/sanitizer/esan_interface.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/sanitizer/linux_syscall_hooks.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/sanitizer/lsan_interface.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/sanitizer/msan_interface.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/sanitizer/tsan_interface_atomic.h
+OLD_DIRS+=usr/lib/clang/3.9.0/include/sanitizer
+OLD_FILES+=usr/lib/clang/3.9.0/include/__clang_cuda_cmath.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/__clang_cuda_intrinsics.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/__clang_cuda_math_forward_declares.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/__clang_cuda_runtime_wrapper.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/__stddef_max_align_t.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/__wmmintrin_aes.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/__wmmintrin_pclmul.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/adxintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/altivec.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/ammintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/arm_acle.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/arm_neon.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/avx2intrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/avx512bwintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/avx512cdintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/avx512dqintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/avx512erintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/avx512fintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/avx512ifmaintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/avx512ifmavlintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/avx512pfintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/avx512vbmiintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/avx512vbmivlintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/avx512vlbwintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/avx512vlcdintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/avx512vldqintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/avx512vlintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/avxintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/bmi2intrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/bmiintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/clflushoptintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/cpuid.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/cuda_builtin_vars.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/emmintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/f16cintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/fma4intrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/fmaintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/fxsrintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/htmintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/htmxlintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/ia32intrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/immintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/lzcntintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/mm3dnow.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/mm_malloc.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/mmintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/module.modulemap
+OLD_FILES+=usr/lib/clang/3.9.0/include/mwaitxintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/nmmintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/opencl-c.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/pkuintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/pmmintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/popcntintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/prfchwintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/rdseedintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/rtmintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/s390intrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/shaintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/smmintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/tbmintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/tmmintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/vadefs.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/vecintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/wmmintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/x86intrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/xmmintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/xopintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/xsavecintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/xsaveintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/xsaveoptintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/xsavesintrin.h
+OLD_FILES+=usr/lib/clang/3.9.0/include/xtestintrin.h
+OLD_DIRS+=usr/lib/clang/3.9.0/include
+OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.asan-i386.a
+OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.asan-i386.so
+OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.asan-preinit-i386.a
+OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.asan-preinit-x86_64.a
+OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.asan-x86_64.a
+OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.asan-x86_64.so
+OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.asan_cxx-i386.a
+OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.asan_cxx-x86_64.a
+OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.profile-arm.a
+OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.profile-i386.a
+OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.profile-x86_64.a
+OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.safestack-i386.a
+OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.safestack-x86_64.a
+OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.stats-i386.a
+OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.stats-x86_64.a
+OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.stats_client-i386.a
+OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.stats_client-x86_64.a
+OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.ubsan_standalone-i386.a
+OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.ubsan_standalone-x86_64.a
+OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.ubsan_standalone_cxx-i386.a
+OLD_FILES+=usr/lib/clang/3.9.0/lib/freebsd/libclang_rt.ubsan_standalone_cxx-x86_64.a
+OLD_DIRS+=usr/lib/clang/3.9.0/lib/freebsd
+OLD_DIRS+=usr/lib/clang/3.9.0/lib
+OLD_DIRS+=usr/lib/clang/3.9.0
# 20161205: libproc version bump
OLD_LIBS+=usr/lib/libproc.so.3
OLD_LIBS+=usr/lib32/libproc.so.3
Modified: head/UPDATING
==============================================================================
--- head/UPDATING Sat Dec 17 22:31:30 2016 (r310193)
+++ head/UPDATING Sat Dec 17 22:34:19 2016 (r310194)
@@ -51,6 +51,11 @@ NOTE TO PEOPLE WHO THINK THAT FreeBSD 12
****************************** SPECIAL WARNING: ******************************
+20161217:
+ Clang, llvm, lldb, compiler-rt and libc++ have been upgraded to 3.9.1.
+ Please see the 20141231 entry below for information about prerequisites
+ and upgrading, if you are not already using clang 3.5.0 or higher.
+
20161124:
Clang, llvm, lldb, compiler-rt and libc++ have been upgraded to 3.9.0.
Please see the 20141231 entry below for information about prerequisites
Modified: head/contrib/compiler-rt/lib/builtins/gcc_personality_v0.c
==============================================================================
--- head/contrib/compiler-rt/lib/builtins/gcc_personality_v0.c Sat Dec 17 22:31:30 2016 (r310193)
+++ head/contrib/compiler-rt/lib/builtins/gcc_personality_v0.c Sat Dec 17 22:34:19 2016 (r310194)
@@ -12,6 +12,17 @@
#include "int_lib.h"
#include <unwind.h>
+#if defined(__arm__) && !defined(__ARM_DWARF_EH__) && !defined(__USING_SJLJ_EXCEPTIONS__)
+/*
+ * When building with older compilers (e.g. clang <3.9), it is possible that we
+ * have a version of unwind.h which does not provide the EHABI declarations
+ * which are quired for the C personality to conform to the specification. In
+ * order to provide forward compatibility for such compilers, we re-declare the
+ * necessary interfaces in the helper to permit a standalone compilation of the
+ * builtins (which contains the C unwinding personality for historical reasons).
+ */
+#include "unwind-ehabi-helpers.h"
+#endif
/*
* Pointer encodings documented at:
Copied: head/contrib/compiler-rt/lib/builtins/unwind-ehabi-helpers.h (from r310192, projects/clang391-import/contrib/compiler-rt/lib/builtins/unwind-ehabi-helpers.h)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/contrib/compiler-rt/lib/builtins/unwind-ehabi-helpers.h Sat Dec 17 22:34:19 2016 (r310194, copy of r310192, projects/clang391-import/contrib/compiler-rt/lib/builtins/unwind-ehabi-helpers.h)
@@ -0,0 +1,55 @@
+/* ===-- arm-ehabi-helpers.h - Supplementary ARM EHABI declarations --------===
+ *
+ * The LLVM Compiler Infrastructure
+ *
+ * This file is dual licensed under the MIT and the University of Illinois Open
+ * Source Licenses. See LICENSE.TXT for details.
+ *
+ * ===--------------------------------------------------------------------=== */
+
+#ifndef UNWIND_EHABI_HELPERS_H
+#define UNWIND_EHABI_HELPERS_H
+
+#include <stdint.h>
+/* NOTE: see reasoning for this inclusion below */
+#include <unwind.h>
+
+#if !defined(__ARM_EABI_UNWINDER__)
+
+/*
+ * NOTE: _URC_OK, _URC_FAILURE must be present as preprocessor tokens. This
+ * allows for a substitution of a constant which can be cast into the
+ * appropriate enumerated type. This header is expected to always be included
+ * AFTER unwind.h (which is why it is forcefully included above). This ensures
+ * that we do not overwrite the token for the enumeration. Subsequent uses of
+ * the token would be clean to rewrite with constant values.
+ *
+ * The typedef redeclaration should be safe. Due to the protection granted to
+ * us by the `__ARM_EABI_UNWINDER__` above, we are guaranteed that we are in a
+ * header not vended by gcc. The HP unwinder (being an itanium unwinder) does
+ * not support EHABI, and the GNU unwinder, derived from the HP unwinder, also
+ * does not support EHABI as of the introduction of this header. As such, we
+ * are fairly certain that we are in the LLVM case. Here, _Unwind_State is a
+ * typedef, and so we can get away with a redeclaration.
+ *
+ * Guarded redefinitions of the needed unwind state prevent the redefinition of
+ * those states.
+ */
+
+#define _URC_OK 0
+#define _URC_FAILURE 9
+
+typedef uint32_t _Unwind_State;
+
+#if !defined(_US_UNWIND_FRAME_STARTING)
+#define _US_UNWIND_FRAME_STARTING ((_Unwind_State)1)
+#endif
+
+#if !defined(_US_ACTION_MASK)
+#define _US_ACTION_MASK ((_Unwind_State)3)
+#endif
+
+#endif
+
+#endif
+
Modified: head/contrib/libc++/include/tuple
==============================================================================
--- head/contrib/libc++/include/tuple Sat Dec 17 22:31:30 2016 (r310193)
+++ head/contrib/libc++/include/tuple Sat Dec 17 22:34:19 2016 (r310194)
@@ -681,7 +681,7 @@ public:
<
_CheckArgsConstructor<
_Dummy
- >::template __enable_implicit<_Tp...>(),
+ >::template __enable_implicit<_Tp const&...>(),
bool
>::type = false
>
@@ -699,7 +699,7 @@ public:
<
_CheckArgsConstructor<
_Dummy
- >::template __enable_explicit<_Tp...>(),
+ >::template __enable_explicit<_Tp const&...>(),
bool
>::type = false
>
@@ -717,7 +717,7 @@ public:
<
_CheckArgsConstructor<
_Dummy
- >::template __enable_implicit<_Tp...>(),
+ >::template __enable_implicit<_Tp const&...>(),
bool
>::type = false
>
@@ -736,7 +736,7 @@ public:
<
_CheckArgsConstructor<
_Dummy
- >::template __enable_explicit<_Tp...>(),
+ >::template __enable_explicit<_Tp const&...>(),
bool
>::type = false
>
Modified: head/contrib/llvm/include/llvm/Analysis/LoopAccessAnalysis.h
==============================================================================
--- head/contrib/llvm/include/llvm/Analysis/LoopAccessAnalysis.h Sat Dec 17 22:31:30 2016 (r310193)
+++ head/contrib/llvm/include/llvm/Analysis/LoopAccessAnalysis.h Sat Dec 17 22:34:19 2016 (r310194)
@@ -334,9 +334,11 @@ public:
struct PointerInfo {
/// Holds the pointer value that we need to check.
TrackingVH<Value> PointerValue;
- /// Holds the pointer value at the beginning of the loop.
+ /// Holds the smallest byte address accessed by the pointer throughout all
+ /// iterations of the loop.
const SCEV *Start;
- /// Holds the pointer value at the end of the loop.
+ /// Holds the largest byte address accessed by the pointer throughout all
+ /// iterations of the loop, plus 1.
const SCEV *End;
/// Holds the information if this pointer is used for writing to memory.
bool IsWritePtr;
Modified: head/contrib/llvm/include/llvm/ExecutionEngine/RTDyldMemoryManager.h
==============================================================================
--- head/contrib/llvm/include/llvm/ExecutionEngine/RTDyldMemoryManager.h Sat Dec 17 22:31:30 2016 (r310193)
+++ head/contrib/llvm/include/llvm/ExecutionEngine/RTDyldMemoryManager.h Sat Dec 17 22:34:19 2016 (r310194)
@@ -72,7 +72,7 @@ public:
}
void deregisterEHFrames(uint8_t *Addr, uint64_t LoadAddr, size_t Size) override {
- registerEHFramesInProcess(Addr, Size);
+ deregisterEHFramesInProcess(Addr, Size);
}
/// This method returns the address of the specified function or variable in
Modified: head/contrib/llvm/include/llvm/IR/Intrinsics.td
==============================================================================
--- head/contrib/llvm/include/llvm/IR/Intrinsics.td Sat Dec 17 22:31:30 2016 (r310193)
+++ head/contrib/llvm/include/llvm/IR/Intrinsics.td Sat Dec 17 22:34:19 2016 (r310194)
@@ -668,13 +668,12 @@ def int_masked_gather: Intrinsic<[llvm_a
[LLVMVectorOfPointersToElt<0>, llvm_i32_ty,
LLVMVectorSameWidth<0, llvm_i1_ty>,
LLVMMatchType<0>],
- [IntrReadMem, IntrArgMemOnly]>;
+ [IntrReadMem]>;
def int_masked_scatter: Intrinsic<[],
[llvm_anyvector_ty,
LLVMVectorOfPointersToElt<0>, llvm_i32_ty,
- LLVMVectorSameWidth<0, llvm_i1_ty>],
- [IntrArgMemOnly]>;
+ LLVMVectorSameWidth<0, llvm_i1_ty>]>;
// Test whether a pointer is associated with a type metadata identifier.
def int_type_test : Intrinsic<[llvm_i1_ty], [llvm_ptr_ty, llvm_metadata_ty],
Modified: head/contrib/llvm/include/llvm/IR/TypeFinder.h
==============================================================================
--- head/contrib/llvm/include/llvm/IR/TypeFinder.h Sat Dec 17 22:31:30 2016 (r310193)
+++ head/contrib/llvm/include/llvm/IR/TypeFinder.h Sat Dec 17 22:34:19 2016 (r310194)
@@ -59,6 +59,8 @@ public:
StructType *&operator[](unsigned Idx) { return StructTypes[Idx]; }
+ DenseSet<const MDNode *> &getVisitedMetadata() { return VisitedMetadata; }
+
private:
/// incorporateType - This method adds the type to the list of used
/// structures if it's not in there already.
Modified: head/contrib/llvm/include/llvm/Support/Threading.h
==============================================================================
--- head/contrib/llvm/include/llvm/Support/Threading.h Sat Dec 17 22:31:30 2016 (r310193)
+++ head/contrib/llvm/include/llvm/Support/Threading.h Sat Dec 17 22:34:19 2016 (r310194)
@@ -20,11 +20,11 @@
#include <ciso646> // So we can check the C++ standard lib macros.
#include <functional>
-// We use std::call_once on all Unix platforms except for NetBSD with
-// libstdc++. That platform has a bug they are working to fix, and they'll
-// remove the NetBSD checks once fixed.
-#if defined(LLVM_ON_UNIX) && \
- !(defined(__NetBSD__) && !defined(_LIBCPP_VERSION)) && !defined(__ppc__)
+// std::call_once from libc++ is used on all Unix platforms. Other
+// implementations like libstdc++ are known to have problems on NetBSD,
+// OpenBSD and PowerPC.
+#if defined(LLVM_ON_UNIX) && (defined(_LIBCPP_VERSION) || \
+ !(defined(__NetBSD__) || defined(__OpenBSD__) || defined(__ppc__)))
#define LLVM_THREADING_USE_STD_CALL_ONCE 1
#else
#define LLVM_THREADING_USE_STD_CALL_ONCE 0
Modified: head/contrib/llvm/lib/Analysis/LoopAccessAnalysis.cpp
==============================================================================
--- head/contrib/llvm/lib/Analysis/LoopAccessAnalysis.cpp Sat Dec 17 22:31:30 2016 (r310193)
+++ head/contrib/llvm/lib/Analysis/LoopAccessAnalysis.cpp Sat Dec 17 22:34:19 2016 (r310194)
@@ -148,6 +148,19 @@ const SCEV *llvm::replaceSymbolicStrideS
return OrigSCEV;
}
+/// Calculate Start and End points of memory access.
+/// Let's assume A is the first access and B is a memory access on N-th loop
+/// iteration. Then B is calculated as:
+/// B = A + Step*N .
+/// Step value may be positive or negative.
+/// N is a calculated back-edge taken count:
+/// N = (TripCount > 0) ? RoundDown(TripCount -1 , VF) : 0
+/// Start and End points are calculated in the following way:
+/// Start = UMIN(A, B) ; End = UMAX(A, B) + SizeOfElt,
+/// where SizeOfElt is the size of single memory access in bytes.
+///
+/// There is no conflict when the intervals are disjoint:
+/// NoConflict = (P2.Start >= P1.End) || (P1.Start >= P2.End)
void RuntimePointerChecking::insert(Loop *Lp, Value *Ptr, bool WritePtr,
unsigned DepSetId, unsigned ASId,
const ValueToValueMap &Strides,
@@ -176,12 +189,17 @@ void RuntimePointerChecking::insert(Loop
if (CStep->getValue()->isNegative())
std::swap(ScStart, ScEnd);
} else {
- // Fallback case: the step is not constant, but the we can still
+ // Fallback case: the step is not constant, but we can still
// get the upper and lower bounds of the interval by using min/max
// expressions.
ScStart = SE->getUMinExpr(ScStart, ScEnd);
ScEnd = SE->getUMaxExpr(AR->getStart(), ScEnd);
}
+ // Add the size of the pointed element to ScEnd.
+ unsigned EltSize =
+ Ptr->getType()->getPointerElementType()->getScalarSizeInBits() / 8;
+ const SCEV *EltSizeSCEV = SE->getConstant(ScEnd->getType(), EltSize);
+ ScEnd = SE->getAddExpr(ScEnd, EltSizeSCEV);
}
Pointers.emplace_back(Ptr, ScStart, ScEnd, WritePtr, DepSetId, ASId, Sc);
@@ -1863,9 +1881,17 @@ std::pair<Instruction *, Instruction *>
Value *End0 = ChkBuilder.CreateBitCast(A.End, PtrArithTy1, "bc");
Value *End1 = ChkBuilder.CreateBitCast(B.End, PtrArithTy0, "bc");
- Value *Cmp0 = ChkBuilder.CreateICmpULE(Start0, End1, "bound0");
+ // [A|B].Start points to the first accessed byte under base [A|B].
+ // [A|B].End points to the last accessed byte, plus one.
+ // There is no conflict when the intervals are disjoint:
+ // NoConflict = (B.Start >= A.End) || (A.Start >= B.End)
+ //
+ // bound0 = (B.Start < A.End)
+ // bound1 = (A.Start < B.End)
+ // IsConflict = bound0 & bound1
+ Value *Cmp0 = ChkBuilder.CreateICmpULT(Start0, End1, "bound0");
FirstInst = getFirstInst(FirstInst, Cmp0, Loc);
- Value *Cmp1 = ChkBuilder.CreateICmpULE(Start1, End0, "bound1");
+ Value *Cmp1 = ChkBuilder.CreateICmpULT(Start1, End0, "bound1");
FirstInst = getFirstInst(FirstInst, Cmp1, Loc);
Value *IsConflict = ChkBuilder.CreateAnd(Cmp0, Cmp1, "found.conflict");
FirstInst = getFirstInst(FirstInst, IsConflict, Loc);
Modified: head/contrib/llvm/lib/CodeGen/BranchFolding.cpp
==============================================================================
--- head/contrib/llvm/lib/CodeGen/BranchFolding.cpp Sat Dec 17 22:31:30 2016 (r310193)
+++ head/contrib/llvm/lib/CodeGen/BranchFolding.cpp Sat Dec 17 22:34:19 2016 (r310194)
@@ -776,9 +776,8 @@ bool BranchFolder::CreateCommonTailOnlyB
}
static void
-mergeMMOsFromMemoryOperations(MachineBasicBlock::iterator MBBIStartPos,
- MachineBasicBlock &MBBCommon) {
- // Merge MMOs from memory operations in the common block.
+mergeOperations(MachineBasicBlock::iterator MBBIStartPos,
+ MachineBasicBlock &MBBCommon) {
MachineBasicBlock *MBB = MBBIStartPos->getParent();
// Note CommonTailLen does not necessarily matches the size of
// the common BB nor all its instructions because of debug
@@ -808,8 +807,18 @@ mergeMMOsFromMemoryOperations(MachineBas
"Reached BB end within common tail length!");
assert(MBBICommon->isIdenticalTo(*MBBI) && "Expected matching MIIs!");
+ // Merge MMOs from memory operations in the common block.
if (MBBICommon->mayLoad() || MBBICommon->mayStore())
MBBICommon->setMemRefs(MBBICommon->mergeMemRefsWith(*MBBI));
+ // Drop undef flags if they aren't present in all merged instructions.
+ for (unsigned I = 0, E = MBBICommon->getNumOperands(); I != E; ++I) {
+ MachineOperand &MO = MBBICommon->getOperand(I);
+ if (MO.isReg() && MO.isUndef()) {
+ const MachineOperand &OtherMO = MBBI->getOperand(I);
+ if (!OtherMO.isUndef())
+ MO.setIsUndef(false);
+ }
+ }
++MBBI;
++MBBICommon;
@@ -928,8 +937,8 @@ bool BranchFolder::TryTailMergeBlocks(Ma
continue;
DEBUG(dbgs() << "BB#" << SameTails[i].getBlock()->getNumber()
<< (i == e-1 ? "" : ", "));
- // Merge MMOs from memory operations as needed.
- mergeMMOsFromMemoryOperations(SameTails[i].getTailStartPos(), *MBB);
+ // Merge operations (MMOs, undef flags)
+ mergeOperations(SameTails[i].getTailStartPos(), *MBB);
// Hack the end off BB i, making it jump to BB commonTailIndex instead.
ReplaceTailWithBranchTo(SameTails[i].getTailStartPos(), MBB);
// BB i is no longer a predecessor of SuccBB; remove it from the worklist.
Modified: head/contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
==============================================================================
--- head/contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Sat Dec 17 22:31:30 2016 (r310193)
+++ head/contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Sat Dec 17 22:34:19 2016 (r310194)
@@ -2185,24 +2185,29 @@ void DAGTypeLegalizer::ExpandIntRes_MUL(
// options. This is a trivially-generalized version of the code from
// Hacker's Delight (itself derived from Knuth's Algorithm M from section
// 4.3.1).
- SDValue Mask =
- DAG.getConstant(APInt::getLowBitsSet(NVT.getSizeInBits(),
- NVT.getSizeInBits() >> 1), dl, NVT);
+ unsigned Bits = NVT.getSizeInBits();
+ unsigned HalfBits = Bits >> 1;
+ SDValue Mask = DAG.getConstant(APInt::getLowBitsSet(Bits, HalfBits), dl,
+ NVT);
SDValue LLL = DAG.getNode(ISD::AND, dl, NVT, LL, Mask);
SDValue RLL = DAG.getNode(ISD::AND, dl, NVT, RL, Mask);
SDValue T = DAG.getNode(ISD::MUL, dl, NVT, LLL, RLL);
SDValue TL = DAG.getNode(ISD::AND, dl, NVT, T, Mask);
- SDValue Shift =
- DAG.getConstant(NVT.getSizeInBits() >> 1, dl,
- TLI.getShiftAmountTy(NVT, DAG.getDataLayout()));
+ EVT ShiftAmtTy = TLI.getShiftAmountTy(NVT, DAG.getDataLayout());
+ if (APInt::getMaxValue(ShiftAmtTy.getSizeInBits()).ult(HalfBits)) {
+ // The type from TLI is too small to fit the shift amount we want.
+ // Override it with i32. The shift will have to be legalized.
+ ShiftAmtTy = MVT::i32;
+ }
+ SDValue Shift = DAG.getConstant(HalfBits, dl, ShiftAmtTy);
SDValue TH = DAG.getNode(ISD::SRL, dl, NVT, T, Shift);
SDValue LLH = DAG.getNode(ISD::SRL, dl, NVT, LL, Shift);
SDValue RLH = DAG.getNode(ISD::SRL, dl, NVT, RL, Shift);
SDValue U = DAG.getNode(ISD::ADD, dl, NVT,
- DAG.getNode(ISD::MUL, dl, NVT, LLH, RLL), TL);
+ DAG.getNode(ISD::MUL, dl, NVT, LLH, RLL), TH);
SDValue UL = DAG.getNode(ISD::AND, dl, NVT, U, Mask);
SDValue UH = DAG.getNode(ISD::SRL, dl, NVT, U, Shift);
@@ -2211,14 +2216,14 @@ void DAGTypeLegalizer::ExpandIntRes_MUL(
SDValue VH = DAG.getNode(ISD::SRL, dl, NVT, V, Shift);
SDValue W = DAG.getNode(ISD::ADD, dl, NVT,
- DAG.getNode(ISD::MUL, dl, NVT, LL, RL),
+ DAG.getNode(ISD::MUL, dl, NVT, LLH, RLH),
DAG.getNode(ISD::ADD, dl, NVT, UH, VH));
- Lo = DAG.getNode(ISD::ADD, dl, NVT, TH,
+ Lo = DAG.getNode(ISD::ADD, dl, NVT, TL,
DAG.getNode(ISD::SHL, dl, NVT, V, Shift));
Hi = DAG.getNode(ISD::ADD, dl, NVT, W,
DAG.getNode(ISD::ADD, dl, NVT,
- DAG.getNode(ISD::MUL, dl, NVT, RH, LL),
+ DAG.getNode(ISD::MUL, dl, NVT, RH, LL),
DAG.getNode(ISD::MUL, dl, NVT, RL, LH)));
return;
}
Modified: head/contrib/llvm/lib/Linker/IRMover.cpp
==============================================================================
--- head/contrib/llvm/lib/Linker/IRMover.cpp Sat Dec 17 22:31:30 2016 (r310193)
+++ head/contrib/llvm/lib/Linker/IRMover.cpp Sat Dec 17 22:34:19 2016 (r310194)
@@ -694,6 +694,14 @@ void IRLinker::computeTypeMapping() {
if (!ST->hasName())
continue;
+ if (TypeMap.DstStructTypesSet.hasType(ST)) {
+ // This is actually a type from the destination module.
+ // getIdentifiedStructTypes() can have found it by walking debug info
+ // metadata nodes, some of which get linked by name when ODR Type Uniquing
+ // is enabled on the Context, from the source to the destination module.
+ continue;
+ }
+
// Check to see if there is a dot in the name followed by a digit.
size_t DotPos = ST->getName().rfind('.');
if (DotPos == 0 || DotPos == StringRef::npos ||
@@ -1336,13 +1344,19 @@ bool IRMover::IdentifiedStructTypeSet::h
IRMover::IRMover(Module &M) : Composite(M) {
TypeFinder StructTypes;
- StructTypes.run(M, true);
+ StructTypes.run(M, /* OnlyNamed */ false);
for (StructType *Ty : StructTypes) {
if (Ty->isOpaque())
IdentifiedStructTypes.addOpaque(Ty);
else
IdentifiedStructTypes.addNonOpaque(Ty);
}
+ // Self-map metadatas in the destination module. This is needed when
+ // DebugTypeODRUniquing is enabled on the LLVMContext, since metadata in the
+ // destination module may be reached from the source module.
+ for (auto *MD : StructTypes.getVisitedMetadata()) {
+ SharedMDs[MD].reset(const_cast<MDNode *>(MD));
+ }
}
Error IRMover::move(
Modified: head/contrib/llvm/lib/Support/Unix/Signals.inc
==============================================================================
--- head/contrib/llvm/lib/Support/Unix/Signals.inc Sat Dec 17 22:31:30 2016 (r310193)
+++ head/contrib/llvm/lib/Support/Unix/Signals.inc Sat Dec 17 22:34:19 2016 (r310194)
@@ -412,7 +412,7 @@ void llvm::sys::PrintStackTrace(raw_ostr
if (printSymbolizedStackTrace(Argv0, StackTrace, depth, OS))
return;
-#if HAVE_DLFCN_H && __GNUG__
+#if HAVE_DLFCN_H && __GNUG__ && !defined(__CYGWIN__)
int width = 0;
for (int i = 0; i < depth; ++i) {
Dl_info dlinfo;
Modified: head/contrib/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
==============================================================================
--- head/contrib/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp Sat Dec 17 22:31:30 2016 (r310193)
+++ head/contrib/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp Sat Dec 17 22:34:19 2016 (r310194)
@@ -718,13 +718,21 @@ bool AArch64ExpandPseudo::expandCMP_SWAP
.addReg(DestLo.getReg(), getKillRegState(DestLo.isDead()))
.addOperand(DesiredLo)
.addImm(0);
- BuildMI(LoadCmpBB, DL, TII->get(AArch64::SBCSXr), AArch64::XZR)
+ BuildMI(LoadCmpBB, DL, TII->get(AArch64::CSINCWr), StatusReg)
+ .addReg(AArch64::WZR)
+ .addReg(AArch64::WZR)
+ .addImm(AArch64CC::EQ);
+ BuildMI(LoadCmpBB, DL, TII->get(AArch64::SUBSXrs), AArch64::XZR)
.addReg(DestHi.getReg(), getKillRegState(DestHi.isDead()))
- .addOperand(DesiredHi);
- BuildMI(LoadCmpBB, DL, TII->get(AArch64::Bcc))
- .addImm(AArch64CC::NE)
- .addMBB(DoneBB)
- .addReg(AArch64::NZCV, RegState::Implicit | RegState::Kill);
+ .addOperand(DesiredHi)
+ .addImm(0);
+ BuildMI(LoadCmpBB, DL, TII->get(AArch64::CSINCWr), StatusReg)
+ .addReg(StatusReg, RegState::Kill)
+ .addReg(StatusReg, RegState::Kill)
+ .addImm(AArch64CC::EQ);
+ BuildMI(LoadCmpBB, DL, TII->get(AArch64::CBNZW))
+ .addReg(StatusReg, RegState::Kill)
+ .addMBB(DoneBB);
LoadCmpBB->addSuccessor(DoneBB);
LoadCmpBB->addSuccessor(StoreBB);
Modified: head/contrib/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
==============================================================================
--- head/contrib/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp Sat Dec 17 22:31:30 2016 (r310193)
+++ head/contrib/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp Sat Dec 17 22:34:19 2016 (r310194)
@@ -10083,17 +10083,24 @@ static void ReplaceReductionResults(SDNo
Results.push_back(SplitVal);
}
+static std::pair<SDValue, SDValue> splitInt128(SDValue N, SelectionDAG &DAG) {
+ SDLoc DL(N);
+ SDValue Lo = DAG.getNode(ISD::TRUNCATE, DL, MVT::i64, N);
+ SDValue Hi = DAG.getNode(ISD::TRUNCATE, DL, MVT::i64,
+ DAG.getNode(ISD::SRL, DL, MVT::i128, N,
+ DAG.getConstant(64, DL, MVT::i64)));
+ return std::make_pair(Lo, Hi);
+}
+
static void ReplaceCMP_SWAP_128Results(SDNode *N,
SmallVectorImpl<SDValue> & Results,
SelectionDAG &DAG) {
assert(N->getValueType(0) == MVT::i128 &&
"AtomicCmpSwap on types less than 128 should be legal");
- SDValue Ops[] = {N->getOperand(1),
- N->getOperand(2)->getOperand(0),
- N->getOperand(2)->getOperand(1),
- N->getOperand(3)->getOperand(0),
- N->getOperand(3)->getOperand(1),
- N->getOperand(0)};
+ auto Desired = splitInt128(N->getOperand(2), DAG);
+ auto New = splitInt128(N->getOperand(3), DAG);
+ SDValue Ops[] = {N->getOperand(1), Desired.first, Desired.second,
+ New.first, New.second, N->getOperand(0)};
SDNode *CmpSwap = DAG.getMachineNode(
AArch64::CMP_SWAP_128, SDLoc(N),
DAG.getVTList(MVT::i64, MVT::i64, MVT::i32, MVT::Other), Ops);
Modified: head/contrib/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
==============================================================================
--- head/contrib/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp Sat Dec 17 22:31:30 2016 (r310193)
+++ head/contrib/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp Sat Dec 17 22:34:19 2016 (r310194)
@@ -2203,7 +2203,8 @@ void SIInstrInfo::legalizeOperandsSMRD(M
}
void SIInstrInfo::legalizeOperands(MachineInstr &MI) const {
- MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo();
+ MachineFunction &MF = *MI.getParent()->getParent();
+ MachineRegisterInfo &MRI = MF.getRegInfo();
// Legalize VOP2
if (isVOP2(MI) || isVOPC(MI)) {
@@ -2321,8 +2322,14 @@ void SIInstrInfo::legalizeOperands(Machi
return;
}
- // Legalize MIMG
- if (isMIMG(MI)) {
+ // Legalize MIMG and MUBUF/MTBUF for shaders.
+ //
+ // Shaders only generate MUBUF/MTBUF instructions via intrinsics or via
+ // scratch memory access. In both cases, the legalization never involves
+ // conversion to the addr64 form.
+ if (isMIMG(MI) ||
+ (AMDGPU::isShader(MF.getFunction()->getCallingConv()) &&
+ (isMUBUF(MI) || isMTBUF(MI)))) {
MachineOperand *SRsrc = getNamedOperand(MI, AMDGPU::OpName::srsrc);
if (SRsrc && !RI.isSGPRClass(MRI.getRegClass(SRsrc->getReg()))) {
unsigned SGPR = readlaneVGPRToSGPR(SRsrc->getReg(), MI, MRI);
@@ -2337,9 +2344,10 @@ void SIInstrInfo::legalizeOperands(Machi
return;
}
- // Legalize MUBUF* instructions
+ // Legalize MUBUF* instructions by converting to addr64 form.
// FIXME: If we start using the non-addr64 instructions for compute, we
- // may need to legalize them here.
+ // may need to legalize them as above. This especially applies to the
+ // buffer_load_format_* variants and variants with idxen (or bothen).
int SRsrcIdx =
AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::srsrc);
if (SRsrcIdx != -1) {
Modified: head/contrib/llvm/lib/Target/AMDGPU/SIInstructions.td
==============================================================================
--- head/contrib/llvm/lib/Target/AMDGPU/SIInstructions.td Sat Dec 17 22:31:30 2016 (r310193)
+++ head/contrib/llvm/lib/Target/AMDGPU/SIInstructions.td Sat Dec 17 22:34:19 2016 (r310194)
@@ -2029,6 +2029,7 @@ def SI_RETURN : PseudoInstSI <
let hasSideEffects = 1;
let SALU = 1;
let hasNoSchedulingInfo = 1;
+ let DisableWQM = 1;
}
let Uses = [EXEC], Defs = [EXEC, VCC, M0],
Modified: head/contrib/llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
==============================================================================
--- head/contrib/llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp Sat Dec 17 22:31:30 2016 (r310193)
+++ head/contrib/llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp Sat Dec 17 22:34:19 2016 (r310194)
@@ -219,13 +219,6 @@ char SIWholeQuadMode::scanInstructions(M
markInstruction(MI, Flags, Worklist);
GlobalFlags |= Flags;
}
-
- if (WQMOutputs && MBB.succ_empty()) {
- // This is a prolog shader. Make sure we go back to exact mode at the end.
- Blocks[&MBB].OutNeeds = StateExact;
- Worklist.push_back(&MBB);
- GlobalFlags |= StateExact;
- }
}
return GlobalFlags;
Modified: head/contrib/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
==============================================================================
--- head/contrib/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp Sat Dec 17 22:31:30 2016 (r310193)
+++ head/contrib/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp Sat Dec 17 22:34:19 2016 (r310194)
@@ -932,13 +932,10 @@ bool ARMExpandPseudo::ExpandCMP_SWAP_64(
.addReg(DestLo, getKillRegState(Dest.isDead()))
.addReg(DesiredLo, getKillRegState(Desired.isDead())));
- unsigned SBCrr = IsThumb ? ARM::t2SBCrr : ARM::SBCrr;
- MIB = BuildMI(LoadCmpBB, DL, TII->get(SBCrr))
- .addReg(StatusReg, RegState::Define | RegState::Dead)
- .addReg(DestHi, getKillRegState(Dest.isDead()))
- .addReg(DesiredHi, getKillRegState(Desired.isDead()));
- AddDefaultPred(MIB);
- MIB.addReg(ARM::CPSR, RegState::Kill);
+ BuildMI(LoadCmpBB, DL, TII->get(CMPrr))
+ .addReg(DestHi, getKillRegState(Dest.isDead()))
+ .addReg(DesiredHi, getKillRegState(Desired.isDead()))
+ .addImm(ARMCC::EQ).addReg(ARM::CPSR, RegState::Kill);
unsigned Bcc = IsThumb ? ARM::tBcc : ARM::Bcc;
BuildMI(LoadCmpBB, DL, TII->get(Bcc))
Modified: head/contrib/llvm/lib/Target/ARM/ARMInstrThumb2.td
==============================================================================
--- head/contrib/llvm/lib/Target/ARM/ARMInstrThumb2.td Sat Dec 17 22:31:30 2016 (r310193)
+++ head/contrib/llvm/lib/Target/ARM/ARMInstrThumb2.td Sat Dec 17 22:34:19 2016 (r310194)
@@ -4819,6 +4819,10 @@ def : t2InstAlias<"add${p} $Rd, pc, $imm
def t2LDRConstPool
: t2AsmPseudo<"ldr${p} $Rt, $immediate",
(ins GPRnopc:$Rt, const_pool_asm_imm:$immediate, pred:$p)>;
+// Version w/ the .w suffix.
+def : t2InstAlias<"ldr${p}.w $Rt, $immediate",
+ (t2LDRConstPool GPRnopc:$Rt,
+ const_pool_asm_imm:$immediate, pred:$p)>;
// PLD/PLDW/PLI with alternate literal form.
def : t2InstAlias<"pld${p} $addr",
Modified: head/contrib/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
==============================================================================
--- head/contrib/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp Sat Dec 17 22:31:30 2016 (r310193)
+++ head/contrib/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp Sat Dec 17 22:34:19 2016 (r310194)
@@ -6933,6 +6933,9 @@ bool ARMAsmParser::processInstruction(MC
else if (Inst.getOpcode() == ARM::t2LDRConstPool)
TmpInst.setOpcode(ARM::t2LDRpci);
const ARMOperand &PoolOperand =
+ (static_cast<ARMOperand &>(*Operands[2]).isToken() &&
+ static_cast<ARMOperand &>(*Operands[2]).getToken() == ".w") ?
+ static_cast<ARMOperand &>(*Operands[4]) :
static_cast<ARMOperand &>(*Operands[3]);
const MCExpr *SubExprVal = PoolOperand.getConstantPoolImm();
// If SubExprVal is a constant we may be able to use a MOV
Modified: head/contrib/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
==============================================================================
--- head/contrib/llvm/lib/Target/PowerPC/PPCISelLowering.cpp Sat Dec 17 22:31:30 2016 (r310193)
+++ head/contrib/llvm/lib/Target/PowerPC/PPCISelLowering.cpp Sat Dec 17 22:34:19 2016 (r310194)
@@ -667,9 +667,10 @@ PPCTargetLowering::PPCTargetLowering(con
addRegisterClass(MVT::v2i64, &PPC::VRRCRegClass);
addRegisterClass(MVT::v1i128, &PPC::VRRCRegClass);
}
+
if (Subtarget.hasP9Vector()) {
- setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4i32, Legal);
- setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4f32, Legal);
+ setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4i32, Custom);
+ setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4f32, Custom);
}
}
@@ -7868,6 +7869,17 @@ SDValue PPCTargetLowering::LowerSCALAR_T
return DAG.getLoad(Op.getValueType(), dl, Store, FIdx, MachinePointerInfo());
}
+SDValue PPCTargetLowering::LowerINSERT_VECTOR_ELT(SDValue Op,
+ SelectionDAG &DAG) const {
+ assert(Op.getOpcode() == ISD::INSERT_VECTOR_ELT &&
+ "Should only be called for ISD::INSERT_VECTOR_ELT");
+ ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(2));
+ // We have legal lowering for constant indices but not for variable ones.
+ if (C)
+ return Op;
+ return SDValue();
+}
+
SDValue PPCTargetLowering::LowerEXTRACT_VECTOR_ELT(SDValue Op,
SelectionDAG &DAG) const {
SDLoc dl(Op);
@@ -8273,6 +8285,7 @@ SDValue PPCTargetLowering::LowerOperatio
case ISD::SCALAR_TO_VECTOR: return LowerSCALAR_TO_VECTOR(Op, DAG);
case ISD::SIGN_EXTEND_INREG: return LowerSIGN_EXTEND_INREG(Op, DAG);
case ISD::EXTRACT_VECTOR_ELT: return LowerEXTRACT_VECTOR_ELT(Op, DAG);
+ case ISD::INSERT_VECTOR_ELT: return LowerINSERT_VECTOR_ELT(Op, DAG);
case ISD::MUL: return LowerMUL(Op, DAG);
// For counter-based loop handling.
@@ -8397,7 +8410,9 @@ Instruction* PPCTargetLowering::emitTrai
MachineBasicBlock *
PPCTargetLowering::EmitAtomicBinary(MachineInstr &MI, MachineBasicBlock *BB,
unsigned AtomicSize,
- unsigned BinOpcode) const {
+ unsigned BinOpcode,
+ unsigned CmpOpcode,
+ unsigned CmpPred) const {
// This also handles ATOMIC_SWAP, indicated by BinOpcode==0.
const TargetInstrInfo *TII = Subtarget.getInstrInfo();
@@ -8437,8 +8452,12 @@ PPCTargetLowering::EmitAtomicBinary(Mach
DebugLoc dl = MI.getDebugLoc();
MachineBasicBlock *loopMBB = F->CreateMachineBasicBlock(LLVM_BB);
+ MachineBasicBlock *loop2MBB =
+ CmpOpcode ? F->CreateMachineBasicBlock(LLVM_BB) : nullptr;
MachineBasicBlock *exitMBB = F->CreateMachineBasicBlock(LLVM_BB);
F->insert(It, loopMBB);
+ if (CmpOpcode)
+ F->insert(It, loop2MBB);
F->insert(It, exitMBB);
exitMBB->splice(exitMBB->begin(), BB,
std::next(MachineBasicBlock::iterator(MI)), BB->end());
@@ -8460,11 +8479,40 @@ PPCTargetLowering::EmitAtomicBinary(Mach
// st[wd]cx. r0, ptr
// bne- loopMBB
// fallthrough --> exitMBB
+
+ // For max/min...
+ // loopMBB:
+ // l[wd]arx dest, ptr
+ // cmpl?[wd] incr, dest
+ // bgt exitMBB
+ // loop2MBB:
+ // st[wd]cx. dest, ptr
+ // bne- loopMBB
+ // fallthrough --> exitMBB
+
BB = loopMBB;
BuildMI(BB, dl, TII->get(LoadMnemonic), dest)
.addReg(ptrA).addReg(ptrB);
if (BinOpcode)
BuildMI(BB, dl, TII->get(BinOpcode), TmpReg).addReg(incr).addReg(dest);
+ if (CmpOpcode) {
+ // Signed comparisons of byte or halfword values must be sign-extended.
+ if (CmpOpcode == PPC::CMPW && AtomicSize < 4) {
+ unsigned ExtReg = RegInfo.createVirtualRegister(&PPC::GPRCRegClass);
+ BuildMI(BB, dl, TII->get(AtomicSize == 1 ? PPC::EXTSB : PPC::EXTSH),
+ ExtReg).addReg(dest);
+ BuildMI(BB, dl, TII->get(CmpOpcode), PPC::CR0)
+ .addReg(incr).addReg(ExtReg);
+ } else
+ BuildMI(BB, dl, TII->get(CmpOpcode), PPC::CR0)
+ .addReg(incr).addReg(dest);
+
+ BuildMI(BB, dl, TII->get(PPC::BCC))
+ .addImm(CmpPred).addReg(PPC::CR0).addMBB(exitMBB);
+ BB->addSuccessor(loop2MBB);
+ BB->addSuccessor(exitMBB);
+ BB = loop2MBB;
+ }
BuildMI(BB, dl, TII->get(StoreMnemonic))
.addReg(TmpReg).addReg(ptrA).addReg(ptrB);
BuildMI(BB, dl, TII->get(PPC::BCC))
@@ -8482,10 +8530,13 @@ MachineBasicBlock *
PPCTargetLowering::EmitPartwordAtomicBinary(MachineInstr &MI,
MachineBasicBlock *BB,
bool is8bit, // operation
- unsigned BinOpcode) const {
+ unsigned BinOpcode,
+ unsigned CmpOpcode,
+ unsigned CmpPred) const {
// If we support part-word atomic mnemonics, just use them
if (Subtarget.hasPartwordAtomics())
- return EmitAtomicBinary(MI, BB, is8bit ? 1 : 2, BinOpcode);
+ return EmitAtomicBinary(MI, BB, is8bit ? 1 : 2, BinOpcode,
+ CmpOpcode, CmpPred);
// This also handles ATOMIC_SWAP, indicated by BinOpcode==0.
const TargetInstrInfo *TII = Subtarget.getInstrInfo();
@@ -8507,8 +8558,12 @@ PPCTargetLowering::EmitPartwordAtomicBin
DebugLoc dl = MI.getDebugLoc();
MachineBasicBlock *loopMBB = F->CreateMachineBasicBlock(LLVM_BB);
+ MachineBasicBlock *loop2MBB =
+ CmpOpcode ? F->CreateMachineBasicBlock(LLVM_BB) : nullptr;
MachineBasicBlock *exitMBB = F->CreateMachineBasicBlock(LLVM_BB);
F->insert(It, loopMBB);
+ if (CmpOpcode)
+ F->insert(It, loop2MBB);
F->insert(It, exitMBB);
exitMBB->splice(exitMBB->begin(), BB,
std::next(MachineBasicBlock::iterator(MI)), BB->end());
@@ -8593,6 +8648,32 @@ PPCTargetLowering::EmitPartwordAtomicBin
.addReg(TmpDestReg).addReg(MaskReg);
BuildMI(BB, dl, TII->get(is64bit ? PPC::AND8 : PPC::AND), Tmp3Reg)
.addReg(TmpReg).addReg(MaskReg);
+ if (CmpOpcode) {
+ // For unsigned comparisons, we can directly compare the shifted values.
+ // For signed comparisons we shift and sign extend.
+ unsigned SReg = RegInfo.createVirtualRegister(RC);
+ BuildMI(BB, dl, TII->get(is64bit ? PPC::AND8 : PPC::AND), SReg)
+ .addReg(TmpDestReg).addReg(MaskReg);
+ unsigned ValueReg = SReg;
+ unsigned CmpReg = Incr2Reg;
+ if (CmpOpcode == PPC::CMPW) {
+ ValueReg = RegInfo.createVirtualRegister(RC);
+ BuildMI(BB, dl, TII->get(PPC::SRW), ValueReg)
+ .addReg(SReg).addReg(ShiftReg);
+ unsigned ValueSReg = RegInfo.createVirtualRegister(RC);
+ BuildMI(BB, dl, TII->get(is8bit ? PPC::EXTSB : PPC::EXTSH), ValueSReg)
+ .addReg(ValueReg);
+ ValueReg = ValueSReg;
+ CmpReg = incr;
+ }
+ BuildMI(BB, dl, TII->get(CmpOpcode), PPC::CR0)
+ .addReg(CmpReg).addReg(ValueReg);
+ BuildMI(BB, dl, TII->get(PPC::BCC))
+ .addImm(CmpPred).addReg(PPC::CR0).addMBB(exitMBB);
+ BB->addSuccessor(loop2MBB);
+ BB->addSuccessor(exitMBB);
+ BB = loop2MBB;
+ }
BuildMI(BB, dl, TII->get(is64bit ? PPC::OR8 : PPC::OR), Tmp4Reg)
.addReg(Tmp3Reg).addReg(Tmp2Reg);
BuildMI(BB, dl, TII->get(PPC::STWCX))
@@ -9099,6 +9180,42 @@ PPCTargetLowering::EmitInstrWithCustomIn
else if (MI.getOpcode() == PPC::ATOMIC_LOAD_SUB_I64)
BB = EmitAtomicBinary(MI, BB, 8, PPC::SUBF8);
+ else if (MI.getOpcode() == PPC::ATOMIC_LOAD_MIN_I8)
+ BB = EmitPartwordAtomicBinary(MI, BB, true, 0, PPC::CMPW, PPC::PRED_GE);
+ else if (MI.getOpcode() == PPC::ATOMIC_LOAD_MIN_I16)
+ BB = EmitPartwordAtomicBinary(MI, BB, false, 0, PPC::CMPW, PPC::PRED_GE);
+ else if (MI.getOpcode() == PPC::ATOMIC_LOAD_MIN_I32)
+ BB = EmitAtomicBinary(MI, BB, 4, 0, PPC::CMPW, PPC::PRED_GE);
+ else if (MI.getOpcode() == PPC::ATOMIC_LOAD_MIN_I64)
+ BB = EmitAtomicBinary(MI, BB, 8, 0, PPC::CMPD, PPC::PRED_GE);
+
+ else if (MI.getOpcode() == PPC::ATOMIC_LOAD_MAX_I8)
+ BB = EmitPartwordAtomicBinary(MI, BB, true, 0, PPC::CMPW, PPC::PRED_LE);
+ else if (MI.getOpcode() == PPC::ATOMIC_LOAD_MAX_I16)
+ BB = EmitPartwordAtomicBinary(MI, BB, false, 0, PPC::CMPW, PPC::PRED_LE);
+ else if (MI.getOpcode() == PPC::ATOMIC_LOAD_MAX_I32)
+ BB = EmitAtomicBinary(MI, BB, 4, 0, PPC::CMPW, PPC::PRED_LE);
+ else if (MI.getOpcode() == PPC::ATOMIC_LOAD_MAX_I64)
+ BB = EmitAtomicBinary(MI, BB, 8, 0, PPC::CMPD, PPC::PRED_LE);
+
+ else if (MI.getOpcode() == PPC::ATOMIC_LOAD_UMIN_I8)
+ BB = EmitPartwordAtomicBinary(MI, BB, true, 0, PPC::CMPLW, PPC::PRED_GE);
+ else if (MI.getOpcode() == PPC::ATOMIC_LOAD_UMIN_I16)
+ BB = EmitPartwordAtomicBinary(MI, BB, false, 0, PPC::CMPLW, PPC::PRED_GE);
+ else if (MI.getOpcode() == PPC::ATOMIC_LOAD_UMIN_I32)
+ BB = EmitAtomicBinary(MI, BB, 4, 0, PPC::CMPLW, PPC::PRED_GE);
+ else if (MI.getOpcode() == PPC::ATOMIC_LOAD_UMIN_I64)
+ BB = EmitAtomicBinary(MI, BB, 8, 0, PPC::CMPLD, PPC::PRED_GE);
+
+ else if (MI.getOpcode() == PPC::ATOMIC_LOAD_UMAX_I8)
+ BB = EmitPartwordAtomicBinary(MI, BB, true, 0, PPC::CMPLW, PPC::PRED_LE);
+ else if (MI.getOpcode() == PPC::ATOMIC_LOAD_UMAX_I16)
+ BB = EmitPartwordAtomicBinary(MI, BB, false, 0, PPC::CMPLW, PPC::PRED_LE);
+ else if (MI.getOpcode() == PPC::ATOMIC_LOAD_UMAX_I32)
+ BB = EmitAtomicBinary(MI, BB, 4, 0, PPC::CMPLW, PPC::PRED_LE);
+ else if (MI.getOpcode() == PPC::ATOMIC_LOAD_UMAX_I64)
+ BB = EmitAtomicBinary(MI, BB, 8, 0, PPC::CMPLD, PPC::PRED_LE);
+
else if (MI.getOpcode() == PPC::ATOMIC_SWAP_I8)
BB = EmitPartwordAtomicBinary(MI, BB, true, 0);
else if (MI.getOpcode() == PPC::ATOMIC_SWAP_I16)
Modified: head/contrib/llvm/lib/Target/PowerPC/PPCISelLowering.h
==============================================================================
--- head/contrib/llvm/lib/Target/PowerPC/PPCISelLowering.h Sat Dec 17 22:31:30 2016 (r310193)
+++ head/contrib/llvm/lib/Target/PowerPC/PPCISelLowering.h Sat Dec 17 22:34:19 2016 (r310194)
@@ -585,11 +585,15 @@ namespace llvm {
MachineBasicBlock *EmitAtomicBinary(MachineInstr &MI,
MachineBasicBlock *MBB,
unsigned AtomicSize,
- unsigned BinOpcode) const;
+ unsigned BinOpcode,
+ unsigned CmpOpcode = 0,
+ unsigned CmpPred = 0) const;
MachineBasicBlock *EmitPartwordAtomicBinary(MachineInstr &MI,
MachineBasicBlock *MBB,
bool is8bit,
- unsigned Opcode) const;
+ unsigned Opcode,
+ unsigned CmpOpcode = 0,
+ unsigned CmpPred = 0) const;
MachineBasicBlock *emitEHSjLjSetJmp(MachineInstr &MI,
MachineBasicBlock *MBB) const;
@@ -825,6 +829,7 @@ namespace llvm {
SDValue LowerSRA_PARTS(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const;
+ SDValue LowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerEXTRACT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerSCALAR_TO_VECTOR(SDValue Op, SelectionDAG &DAG) const;
Modified: head/contrib/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
==============================================================================
--- head/contrib/llvm/lib/Target/PowerPC/PPCInstr64Bit.td Sat Dec 17 22:31:30 2016 (r310193)
+++ head/contrib/llvm/lib/Target/PowerPC/PPCInstr64Bit.td Sat Dec 17 22:34:19 2016 (r310194)
@@ -224,6 +224,18 @@ let usesCustomInserter = 1 in {
def ATOMIC_LOAD_NAND_I64 : Pseudo<
(outs g8rc:$dst), (ins memrr:$ptr, g8rc:$incr), "#ATOMIC_LOAD_NAND_I64",
[(set i64:$dst, (atomic_load_nand_64 xoaddr:$ptr, i64:$incr))]>;
+ def ATOMIC_LOAD_MIN_I64 : Pseudo<
+ (outs g8rc:$dst), (ins memrr:$ptr, g8rc:$incr), "#ATOMIC_LOAD_MIN_I64",
+ [(set i64:$dst, (atomic_load_min_64 xoaddr:$ptr, i64:$incr))]>;
+ def ATOMIC_LOAD_MAX_I64 : Pseudo<
+ (outs g8rc:$dst), (ins memrr:$ptr, g8rc:$incr), "#ATOMIC_LOAD_MAX_I64",
+ [(set i64:$dst, (atomic_load_max_64 xoaddr:$ptr, i64:$incr))]>;
+ def ATOMIC_LOAD_UMIN_I64 : Pseudo<
+ (outs g8rc:$dst), (ins memrr:$ptr, g8rc:$incr), "#ATOMIC_LOAD_UMIN_I64",
+ [(set i64:$dst, (atomic_load_umin_64 xoaddr:$ptr, i64:$incr))]>;
+ def ATOMIC_LOAD_UMAX_I64 : Pseudo<
+ (outs g8rc:$dst), (ins memrr:$ptr, g8rc:$incr), "#ATOMIC_LOAD_UMAX_I64",
+ [(set i64:$dst, (atomic_load_umax_64 xoaddr:$ptr, i64:$incr))]>;
def ATOMIC_CMP_SWAP_I64 : Pseudo<
(outs g8rc:$dst), (ins memrr:$ptr, g8rc:$old, g8rc:$new), "#ATOMIC_CMP_SWAP_I64",
Modified: head/contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td
==============================================================================
--- head/contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td Sat Dec 17 22:31:30 2016 (r310193)
+++ head/contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td Sat Dec 17 22:34:19 2016 (r310194)
@@ -1509,6 +1509,18 @@ let usesCustomInserter = 1 in {
def ATOMIC_LOAD_NAND_I8 : Pseudo<
(outs gprc:$dst), (ins memrr:$ptr, gprc:$incr), "#ATOMIC_LOAD_NAND_I8",
[(set i32:$dst, (atomic_load_nand_8 xoaddr:$ptr, i32:$incr))]>;
+ def ATOMIC_LOAD_MIN_I8 : Pseudo<
+ (outs gprc:$dst), (ins memrr:$ptr, gprc:$incr), "#ATOMIC_LOAD_MIN_I8",
+ [(set i32:$dst, (atomic_load_min_8 xoaddr:$ptr, i32:$incr))]>;
+ def ATOMIC_LOAD_MAX_I8 : Pseudo<
+ (outs gprc:$dst), (ins memrr:$ptr, gprc:$incr), "#ATOMIC_LOAD_MAX_I8",
+ [(set i32:$dst, (atomic_load_max_8 xoaddr:$ptr, i32:$incr))]>;
+ def ATOMIC_LOAD_UMIN_I8 : Pseudo<
+ (outs gprc:$dst), (ins memrr:$ptr, gprc:$incr), "#ATOMIC_LOAD_UMIN_I8",
+ [(set i32:$dst, (atomic_load_umin_8 xoaddr:$ptr, i32:$incr))]>;
+ def ATOMIC_LOAD_UMAX_I8 : Pseudo<
+ (outs gprc:$dst), (ins memrr:$ptr, gprc:$incr), "#ATOMIC_LOAD_UMAX_I8",
+ [(set i32:$dst, (atomic_load_umax_8 xoaddr:$ptr, i32:$incr))]>;
def ATOMIC_LOAD_ADD_I16 : Pseudo<
(outs gprc:$dst), (ins memrr:$ptr, gprc:$incr), "#ATOMIC_LOAD_ADD_I16",
[(set i32:$dst, (atomic_load_add_16 xoaddr:$ptr, i32:$incr))]>;
@@ -1527,6 +1539,18 @@ let usesCustomInserter = 1 in {
def ATOMIC_LOAD_NAND_I16 : Pseudo<
(outs gprc:$dst), (ins memrr:$ptr, gprc:$incr), "#ATOMIC_LOAD_NAND_I16",
[(set i32:$dst, (atomic_load_nand_16 xoaddr:$ptr, i32:$incr))]>;
+ def ATOMIC_LOAD_MIN_I16 : Pseudo<
+ (outs gprc:$dst), (ins memrr:$ptr, gprc:$incr), "#ATOMIC_LOAD_MIN_I16",
+ [(set i32:$dst, (atomic_load_min_16 xoaddr:$ptr, i32:$incr))]>;
+ def ATOMIC_LOAD_MAX_I16 : Pseudo<
+ (outs gprc:$dst), (ins memrr:$ptr, gprc:$incr), "#ATOMIC_LOAD_MAX_I16",
*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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