svn commit: r298068 - in head/sys: arm/allwinner arm/altera/socfpga arm/amlogic/aml8726 arm/annapurna/alpine arm/arm arm/at91 arm/broadcom/bcm2835 arm/conf arm/freescale/imx arm/freescale/vybrid ar...

Andrew Turner andrew at FreeBSD.org
Fri Apr 15 16:05:46 UTC 2016 

Author: andrew
Date: Fri Apr 15 16:05:41 2016
New Revision: 298068
URL: https://svnweb.freebsd.org/changeset/base/298068

Log:
  Rename ARM_INTRNG and MIPS_INTRNG to INTRNG. This will help with machine
  independent code that needs to know about INTRNG such as PCI drivers.
  
  Obtained from:	ABT Systems Ltd
  Sponsored by:	The FreeBSD Foundation

Modified:
  head/sys/arm/allwinner/a10_common.c
  head/sys/arm/altera/socfpga/socfpga_common.c
  head/sys/arm/amlogic/aml8726/aml8726_machdep.c
  head/sys/arm/annapurna/alpine/common.c
  head/sys/arm/arm/gic.c
  head/sys/arm/arm/machdep_intr.c
  head/sys/arm/arm/mp_machdep.c
  head/sys/arm/arm/nexus.c
  head/sys/arm/at91/at91_common.c
  head/sys/arm/broadcom/bcm2835/bcm2835_common.c
  head/sys/arm/broadcom/bcm2835/bcm2835_gpio.c
  head/sys/arm/broadcom/bcm2835/bcm2835_intr.c
  head/sys/arm/broadcom/bcm2835/bcm2836.c
  head/sys/arm/broadcom/bcm2835/bcm2836.h
  head/sys/arm/broadcom/bcm2835/bcm2836_mp.c
  head/sys/arm/conf/A20
  head/sys/arm/conf/ALPINE
  head/sys/arm/conf/ARMADA38X
  head/sys/arm/conf/BEAGLEBONE
  head/sys/arm/conf/EXYNOS5.common
  head/sys/arm/conf/IMX6
  head/sys/arm/conf/ODROIDC1
  head/sys/arm/conf/PANDABOARD
  head/sys/arm/conf/RK3188
  head/sys/arm/conf/RPI-B
  head/sys/arm/conf/RPI2
  head/sys/arm/conf/SOCKIT.common
  head/sys/arm/conf/VIRT
  head/sys/arm/conf/VSATV102
  head/sys/arm/conf/VYBRID
  head/sys/arm/conf/ZEDBOARD
  head/sys/arm/freescale/imx/imx6_machdep.c
  head/sys/arm/freescale/imx/imx_common.c
  head/sys/arm/freescale/imx/imx_gpio.c
  head/sys/arm/freescale/vybrid/vf_common.c
  head/sys/arm/include/intr.h
  head/sys/arm/include/smp.h
  head/sys/arm/lpc/lpc_intc.c
  head/sys/arm/mv/mpic.c
  head/sys/arm/mv/mv_common.c
  head/sys/arm/nvidia/tegra124/std.tegra124
  head/sys/arm/qemu/virt_common.c
  head/sys/arm/rockchip/rk30xx_common.c
  head/sys/arm/samsung/exynos/exynos5_common.c
  head/sys/arm/ti/aintc.c
  head/sys/arm/ti/ti_common.c
  head/sys/arm/ti/ti_gpio.c
  head/sys/arm/ti/ti_gpio.h
  head/sys/arm/versatile/versatile_common.c
  head/sys/arm/xilinx/zy7_machdep.c
  head/sys/conf/files.arm
  head/sys/conf/options.arm
  head/sys/conf/options.mips
  head/sys/dev/fdt/fdt_common.h
  head/sys/mips/include/intr.h
  head/sys/mips/include/smp.h
  head/sys/mips/mips/exception.S
  head/sys/mips/mips/nexus.c
  head/sys/mips/mips/tick.c

Modified: head/sys/arm/allwinner/a10_common.c
==============================================================================
--- head/sys/arm/allwinner/a10_common.c	Fri Apr 15 15:50:13 2016	(r298067)
+++ head/sys/arm/allwinner/a10_common.c	Fri Apr 15 16:05:41 2016	(r298068)
@@ -42,7 +42,7 @@ struct fdt_fixup_entry fdt_fixup_table[]
 	{ NULL, NULL }
 };
 
-#ifndef ARM_INTRNG
+#ifndef INTRNG
 
 static int
 fdt_aintc_decode_ic(phandle_t node, pcell_t *intr, int *interrupt, int *trig,
@@ -69,4 +69,4 @@ fdt_pic_decode_t fdt_pic_table[] = {
 	NULL
 };
 
-#endif /* ARM_INTRNG */
+#endif /* INTRNG */

Modified: head/sys/arm/altera/socfpga/socfpga_common.c
==============================================================================
--- head/sys/arm/altera/socfpga/socfpga_common.c	Fri Apr 15 15:50:13 2016	(r298067)
+++ head/sys/arm/altera/socfpga/socfpga_common.c	Fri Apr 15 16:05:41 2016	(r298068)
@@ -74,7 +74,7 @@ struct fdt_fixup_entry fdt_fixup_table[]
 	{ NULL, NULL }
 };
 
-#ifndef ARM_INTRNG
+#ifndef INTRNG
 static int
 fdt_pic_decode_ic(phandle_t node, pcell_t *intr, int *interrupt, int *trig,
     int *pol)

Modified: head/sys/arm/amlogic/aml8726/aml8726_machdep.c
==============================================================================
--- head/sys/arm/amlogic/aml8726/aml8726_machdep.c	Fri Apr 15 15:50:13 2016	(r298067)
+++ head/sys/arm/amlogic/aml8726/aml8726_machdep.c	Fri Apr 15 16:05:41 2016	(r298068)
@@ -184,7 +184,7 @@ struct fdt_fixup_entry fdt_fixup_table[]
 	{ NULL, NULL }
 };
 
-#ifndef ARM_INTRNG
+#ifndef INTRNG
 #ifndef DEV_GIC
 static int
 fdt_pic_decode_ic(phandle_t node, pcell_t *intr, int *interrupt, int *trig,
@@ -213,4 +213,4 @@ fdt_pic_decode_t fdt_pic_table[] = {
 #endif
 	NULL
 };
-#endif /* ARM_INTRNG */
+#endif /* INTRNG */

Modified: head/sys/arm/annapurna/alpine/common.c
==============================================================================
--- head/sys/arm/annapurna/alpine/common.c	Fri Apr 15 15:50:13 2016	(r298067)
+++ head/sys/arm/annapurna/alpine/common.c	Fri Apr 15 16:05:41 2016	(r298068)
@@ -136,7 +136,7 @@ infinite:
 	while (1) {}
 }
 
-#ifndef ARM_INTRNG
+#ifndef INTRNG
 static int
 alpine_pic_decode_fdt(uint32_t iparent, uint32_t *intr, int *interrupt,
     int *trig, int *pol)

Modified: head/sys/arm/arm/gic.c
==============================================================================
--- head/sys/arm/arm/gic.c	Fri Apr 15 15:50:13 2016	(r298067)
+++ head/sys/arm/arm/gic.c	Fri Apr 15 16:05:41 2016	(r298068)
@@ -50,7 +50,7 @@ __FBSDID("$FreeBSD$");
 #include <sys/lock.h>
 #include <sys/mutex.h>
 #include <sys/smp.h>
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 #include <sys/sched.h>
 #endif
 #include <machine/bus.h>
@@ -62,7 +62,7 @@ __FBSDID("$FreeBSD$");
 #include <dev/ofw/ofw_bus.h>
 #include <dev/ofw/ofw_bus_subr.h>
 
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 #include "pic_if.h"
 #endif
 
@@ -116,7 +116,7 @@ __FBSDID("$FreeBSD$");
 #define	GIC_DEFAULT_ICFGR_INIT	0x00000000
 #endif
 
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 struct gic_irqsrc {
 	struct intr_irqsrc	gi_isrc;
 	uint32_t		gi_irq;
@@ -136,7 +136,7 @@ u_int sgi_first_unused = GIC_FIRST_SGI;
 #endif
 #endif
 
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 struct arm_gic_range {
 	uint64_t bus;
 	uint64_t host;
@@ -151,7 +151,7 @@ struct arm_gic_devinfo {
 
 struct arm_gic_softc {
 	device_t		gic_dev;
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 	void *			gic_intrhand;
 	struct gic_irqsrc *	gic_irqs;
 #endif
@@ -167,7 +167,7 @@ struct arm_gic_softc {
 	uint32_t		last_irq[MAXCPU];
 #endif
 
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 	/* FDT child data */
 	pcell_t			addr_cells;
 	pcell_t			size_cells;
@@ -176,14 +176,14 @@ struct arm_gic_softc {
 #endif
 };
 
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 #define GIC_INTR_ISRC(sc, irq)	(&sc->gic_irqs[irq].gi_isrc)
 #endif
 
 static struct resource_spec arm_gic_spec[] = {
 	{ SYS_RES_MEMORY,	0,	RF_ACTIVE },	/* Distributor registers */
 	{ SYS_RES_MEMORY,	1,	RF_ACTIVE },	/* CPU Interrupt Intf. registers */
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 	{ SYS_RES_IRQ,	  0, RF_ACTIVE | RF_OPTIONAL }, /* Parent interrupt */
 #endif
 	{ -1, 0 }
@@ -204,7 +204,7 @@ static struct arm_gic_softc *gic_sc = NU
 #define	gic_d_write_4(_sc, _reg, _val)		\
     bus_space_write_4((_sc)->gic_d_bst, (_sc)->gic_d_bsh, (_reg), (_val))
 
-#ifndef ARM_INTRNG
+#ifndef INTRNG
 static int gic_config_irq(int irq, enum intr_trigger trig,
     enum intr_polarity pol);
 static void gic_post_filter(void *);
@@ -235,7 +235,7 @@ arm_gic_probe(device_t dev)
 	return (BUS_PROBE_DEFAULT);
 }
 
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 static inline void
 gic_irq_unmask(struct arm_gic_softc *sc, u_int irq)
 {
@@ -275,7 +275,7 @@ gic_cpu_mask(struct arm_gic_softc *sc)
 }
 
 #ifdef SMP
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 static void
 arm_gic_init_secondary(device_t dev)
 {
@@ -347,10 +347,10 @@ arm_gic_init_secondary(device_t dev)
 	gic_d_write_4(sc, GICD_ISENABLER(29 >> 5), (1UL << (29 & 0x1F)));
 	gic_d_write_4(sc, GICD_ISENABLER(30 >> 5), (1UL << (30 & 0x1F)));
 }
-#endif /* ARM_INTRNG */
+#endif /* INTRNG */
 #endif /* SMP */
 
-#ifndef ARM_INTRNG
+#ifndef INTRNG
 int
 gic_decode_fdt(phandle_t iparent, pcell_t *intr, int *interrupt,
     int *trig, int *pol)
@@ -411,7 +411,7 @@ gic_decode_fdt(phandle_t iparent, pcell_
 }
 #endif
 
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 static inline intptr_t
 gic_xref(device_t dev)
 {
@@ -570,7 +570,7 @@ arm_gic_attach(device_t dev)
 	struct		arm_gic_softc *sc;
 	int		i;
 	uint32_t	icciidr, mask, nirqs;
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 	phandle_t	pxref;
 	intptr_t	xref = gic_xref(dev);
 #endif
@@ -606,7 +606,7 @@ arm_gic_attach(device_t dev)
 	nirqs = gic_d_read_4(sc, GICD_TYPER);
 	nirqs = 32 * ((nirqs & 0x1f) + 1);
 
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 	if (arm_gic_register_isrcs(sc, nirqs)) {
 		device_printf(dev, "could not register irqs\n");
 		goto cleanup;
@@ -662,7 +662,7 @@ arm_gic_attach(device_t dev)
 
 	/* Enable interrupt distribution */
 	gic_d_write_4(sc, GICD_CTLR, 0x01);
-#ifndef ARM_INTRNG
+#ifndef INTRNG
 	return (0);
 #else
 	/*
@@ -723,7 +723,7 @@ cleanup:
 #endif
 }
 
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 static struct resource *
 arm_gic_alloc_resource(device_t bus, device_t child, int type, int *rid,
     rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
@@ -1429,14 +1429,14 @@ pic_ipi_clear(int ipi)
 	arm_gic_ipi_clear(gic_sc->gic_dev, ipi);
 }
 #endif
-#endif /* ARM_INTRNG */
+#endif /* INTRNG */
 
 static device_method_t arm_gic_methods[] = {
 	/* Device interface */
 	DEVMETHOD(device_probe,		arm_gic_probe),
 	DEVMETHOD(device_attach,	arm_gic_attach),
 
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 	/* Bus interface */
 	DEVMETHOD(bus_add_child,	bus_generic_add_child),
 	DEVMETHOD(bus_alloc_resource,	arm_gic_alloc_resource),
@@ -1483,7 +1483,7 @@ EARLY_DRIVER_MODULE(gic, simplebus, arm_
 EARLY_DRIVER_MODULE(gic, ofwbus, arm_gic_driver, arm_gic_devclass, 0, 0,
     BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
 
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 /*
  * GICv2m support -- the GICv2 MSI/MSI-X controller.
  */

Modified: head/sys/arm/arm/machdep_intr.c
==============================================================================
--- head/sys/arm/arm/machdep_intr.c	Fri Apr 15 15:50:13 2016	(r298067)
+++ head/sys/arm/arm/machdep_intr.c	Fri Apr 15 16:05:41 2016	(r298068)
@@ -49,7 +49,7 @@ __FBSDID("$FreeBSD$");
 #include <machine/cpu.h>
 #include <machine/smp.h>
 
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 #include "pic_if.h"
 
 #ifdef SMP
@@ -131,7 +131,7 @@ arm_irq_memory_barrier(uintptr_t irq)
 	cpu_l2cache_drain_writebuf();
 }
 
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 #ifdef SMP
 static inline struct intr_ipi *
 intr_ipi_lookup(u_int ipi)

Modified: head/sys/arm/arm/mp_machdep.c
==============================================================================
--- head/sys/arm/arm/mp_machdep.c	Fri Apr 15 15:50:13 2016	(r298067)
+++ head/sys/arm/arm/mp_machdep.c	Fri Apr 15 16:05:41 2016	(r298068)
@@ -74,7 +74,7 @@ volatile int mp_naps;
 /* Set to 1 once we're ready to let the APs out of the pen. */
 volatile int aps_ready = 0;
 
-#ifndef ARM_INTRNG
+#ifndef INTRNG
 static int ipi_handler(void *arg);
 #endif
 void set_stackptrs(int cpu);
@@ -152,7 +152,7 @@ init_secondary(int cpu)
 {
 	struct pcpu *pc;
 	uint32_t loop_counter;
-#ifndef ARM_INTRNG
+#ifndef INTRNG
 	int start = 0, end = 0;
 #endif
 	uint32_t actlr_mask, actlr_set;
@@ -207,7 +207,7 @@ init_secondary(int cpu)
 
 	mtx_unlock_spin(&ap_boot_mtx);
 
-#ifndef ARM_INTRNG
+#ifndef INTRNG
 	/* Enable ipi */
 #ifdef IPI_IRQ_START
 	start = IPI_IRQ_START;
@@ -243,7 +243,7 @@ init_secondary(int cpu)
 	/* NOTREACHED */
 }
 
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 static void
 ipi_rendezvous(void *dummy __unused)
 {
@@ -421,14 +421,14 @@ static void
 release_aps(void *dummy __unused)
 {
 	uint32_t loop_counter;
-#ifndef ARM_INTRNG
+#ifndef INTRNG
 	int start = 0, end = 0;
 #endif
 
 	if (mp_ncpus == 1)
 		return;
 
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 	intr_pic_ipi_setup(IPI_RENDEZVOUS, "rendezvous", ipi_rendezvous, NULL);
 	intr_pic_ipi_setup(IPI_AST, "ast", ipi_ast, NULL);
 	intr_pic_ipi_setup(IPI_STOP, "stop", ipi_stop, NULL);
@@ -501,7 +501,7 @@ ipi_all_but_self(u_int ipi)
 	other_cpus = all_cpus;
 	CPU_CLR(PCPU_GET(cpuid), &other_cpus);
 	CTR2(KTR_SMP, "%s: ipi: %x", __func__, ipi);
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 	intr_ipi_send(other_cpus, ipi);
 #else
 	pic_ipi_send(other_cpus, ipi);
@@ -517,7 +517,7 @@ ipi_cpu(int cpu, u_int ipi)
 	CPU_SET(cpu, &cpus);
 
 	CTR3(KTR_SMP, "%s: cpu: %d, ipi: %x", __func__, cpu, ipi);
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 	intr_ipi_send(cpus, ipi);
 #else
 	pic_ipi_send(cpus, ipi);
@@ -529,7 +529,7 @@ ipi_selected(cpuset_t cpus, u_int ipi)
 {
 
 	CTR2(KTR_SMP, "%s: ipi: %x", __func__, ipi);
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 	intr_ipi_send(cpus, ipi);
 #else
 	pic_ipi_send(cpus, ipi);

Modified: head/sys/arm/arm/nexus.c
==============================================================================
--- head/sys/arm/arm/nexus.c	Fri Apr 15 15:50:13 2016	(r298067)
+++ head/sys/arm/arm/nexus.c	Fri Apr 15 16:05:41 2016	(r298068)
@@ -86,14 +86,14 @@ static	struct resource *nexus_alloc_reso
 static	int nexus_activate_resource(device_t, device_t, int, int,
     struct resource *);
 static bus_space_tag_t nexus_get_bus_tag(device_t, device_t);
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 #ifdef SMP
 static	int nexus_bind_intr(device_t, device_t, struct resource *, int);
 #endif
 #endif
 static int nexus_config_intr(device_t dev, int irq, enum intr_trigger trig,
     enum intr_polarity pol);
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 static	int nexus_describe_intr(device_t dev, device_t child,
     struct resource *irq, void *cookie, const char *descr);
 #endif
@@ -126,7 +126,7 @@ static device_method_t nexus_methods[] =
 	DEVMETHOD(bus_setup_intr,	nexus_setup_intr),
 	DEVMETHOD(bus_teardown_intr,	nexus_teardown_intr),
 	DEVMETHOD(bus_get_bus_tag,	nexus_get_bus_tag),
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 	DEVMETHOD(bus_describe_intr,	nexus_describe_intr),
 #ifdef SMP
 	DEVMETHOD(bus_bind_intr,	nexus_bind_intr),
@@ -280,7 +280,7 @@ nexus_config_intr(device_t dev, int irq,
 {
 	int ret = ENODEV;
 
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 	device_printf(dev, "bus_config_intr is obsolete and not supported!\n");
 	ret = EOPNOTSUPP;
 #else
@@ -294,14 +294,14 @@ static int
 nexus_setup_intr(device_t dev, device_t child, struct resource *res, int flags,
     driver_filter_t *filt, driver_intr_t *intr, void *arg, void **cookiep)
 {
-#ifndef ARM_INTRNG
+#ifndef INTRNG
 	int irq;
 #endif
 
 	if ((rman_get_flags(res) & RF_SHAREABLE) == 0)
 		flags |= INTR_EXCL;
 
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 	return(intr_setup_irq(child, res, filt, intr, arg, flags, cookiep));
 #else
 	for (irq = rman_get_start(res); irq <= rman_get_end(res); irq++) {
@@ -317,14 +317,14 @@ static int
 nexus_teardown_intr(device_t dev, device_t child, struct resource *r, void *ih)
 {
 
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 	return (intr_teardown_irq(child, r, ih));
 #else
 	return (arm_remove_irqhandler(rman_get_start(r), ih));
 #endif
 }
 
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 static int
 nexus_describe_intr(device_t dev, device_t child, struct resource *irq,
     void *cookie, const char *descr)

Modified: head/sys/arm/at91/at91_common.c
==============================================================================
--- head/sys/arm/at91/at91_common.c	Fri Apr 15 15:50:13 2016	(r298067)
+++ head/sys/arm/at91/at91_common.c	Fri Apr 15 16:05:41 2016	(r298068)
@@ -53,7 +53,7 @@ struct fdt_fixup_entry fdt_fixup_table[]
 	{ NULL, NULL }
 };
 
-#ifndef ARM_INTRNG
+#ifndef INTRNG
 static int
 fdt_aic_decode_ic(phandle_t node, pcell_t *intr, int *interrupt, int *trig,
     int *pol)

Modified: head/sys/arm/broadcom/bcm2835/bcm2835_common.c
==============================================================================
--- head/sys/arm/broadcom/bcm2835/bcm2835_common.c	Fri Apr 15 15:50:13 2016	(r298067)
+++ head/sys/arm/broadcom/bcm2835/bcm2835_common.c	Fri Apr 15 16:05:41 2016	(r298068)
@@ -50,7 +50,7 @@ struct fdt_fixup_entry fdt_fixup_table[]
 	{ NULL, NULL }
 };
 
-#ifndef ARM_INTRNG
+#ifndef INTRNG
 static int
 fdt_intc_decode_ic(phandle_t node, pcell_t *intr, int *interrupt, int *trig,
     int *pol)
@@ -78,4 +78,4 @@ fdt_pic_decode_t fdt_pic_table[] = {
 	&fdt_intc_decode_ic,
 	NULL
 };
-#endif /* ARM_INTRNG */
+#endif /* INTRNG */

Modified: head/sys/arm/broadcom/bcm2835/bcm2835_gpio.c
==============================================================================
--- head/sys/arm/broadcom/bcm2835/bcm2835_gpio.c	Fri Apr 15 15:50:13 2016	(r298067)
+++ head/sys/arm/broadcom/bcm2835/bcm2835_gpio.c	Fri Apr 15 16:05:41 2016	(r298068)
@@ -53,7 +53,7 @@ __FBSDID("$FreeBSD$");
 
 #include "gpio_if.h"
 
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 #include "pic_if.h"
 #endif
 
@@ -84,7 +84,7 @@ struct bcm_gpio_sysctl {
 	uint32_t		pin;
 };
 
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 struct bcm_gpio_irqsrc {
 	struct intr_irqsrc	bgi_isrc;
 	uint32_t		bgi_irq;
@@ -105,11 +105,11 @@ struct bcm_gpio_softc {
 	int			sc_ro_npins;
 	int			sc_ro_pins[BCM_GPIO_PINS];
 	struct gpio_pin		sc_gpio_pins[BCM_GPIO_PINS];
-#ifndef ARM_INTRNG
+#ifndef INTRNG
 	struct intr_event *	sc_events[BCM_GPIO_PINS];
 #endif
 	struct bcm_gpio_sysctl	sc_sysctl[BCM_GPIO_PINS];
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 	struct bcm_gpio_irqsrc	sc_isrcs[BCM_GPIO_PINS];
 #else
 	enum intr_trigger	sc_irq_trigger[BCM_GPIO_PINS];
@@ -153,7 +153,7 @@ enum bcm_gpio_pud {
 
 static struct bcm_gpio_softc *bcm_gpio_sc = NULL;
 
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 static int bcm_gpio_intr_bank0(void *arg);
 static int bcm_gpio_intr_bank1(void *arg);
 static int bcm_gpio_pic_attach(struct bcm_gpio_softc *sc);
@@ -691,7 +691,7 @@ bcm_gpio_get_reserved_pins(struct bcm_gp
 	return (0);
 }
 
-#ifndef ARM_INTRNG
+#ifndef INTRNG
 static int
 bcm_gpio_intr(void *arg)
 {
@@ -741,7 +741,7 @@ bcm_gpio_probe(device_t dev)
 	return (BUS_PROBE_DEFAULT);
 }
 
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 static int
 bcm_gpio_intr_attach(device_t dev)
 {
@@ -862,7 +862,7 @@ bcm_gpio_attach(device_t dev)
 		sc->sc_gpio_pins[i].gp_pin = j;
 		sc->sc_gpio_pins[i].gp_caps = BCM_GPIO_DEFAULT_CAPS;
 		sc->sc_gpio_pins[i].gp_flags = bcm_gpio_func_flag(func);
-#ifndef ARM_INTRNG
+#ifndef INTRNG
 		/* The default is active-low interrupts. */
 		sc->sc_irq_trigger[i] = INTR_TRIGGER_LEVEL;
 		sc->sc_irq_polarity[i] = INTR_POLARITY_LOW;
@@ -892,7 +892,7 @@ bcm_gpio_detach(device_t dev)
 	return (EBUSY);
 }
 
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 static inline void
 bcm_gpio_isrc_eoi(struct bcm_gpio_softc *sc, struct bcm_gpio_irqsrc *bgi)
 {
@@ -1372,7 +1372,7 @@ static device_method_t bcm_gpio_methods[
 	DEVMETHOD(gpio_pin_set,		bcm_gpio_pin_set),
 	DEVMETHOD(gpio_pin_toggle,	bcm_gpio_pin_toggle),
 
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 	/* Interrupt controller interface */
 	DEVMETHOD(pic_disable_intr,	bcm_gpio_pic_disable_intr),
 	DEVMETHOD(pic_enable_intr,	bcm_gpio_pic_enable_intr),

Modified: head/sys/arm/broadcom/bcm2835/bcm2835_intr.c
==============================================================================
--- head/sys/arm/broadcom/bcm2835/bcm2835_intr.c	Fri Apr 15 15:50:13 2016	(r298067)
+++ head/sys/arm/broadcom/bcm2835/bcm2835_intr.c	Fri Apr 15 16:05:41 2016	(r298068)
@@ -52,7 +52,7 @@ __FBSDID("$FreeBSD$");
 #include <arm/broadcom/bcm2835/bcm2836.h>
 #endif
 
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 #include "pic_if.h"
 #endif
 
@@ -105,7 +105,7 @@ __FBSDID("$FreeBSD$");
 #define	BANK1_END	(BANK1_START + 32 - 1)
 #define	BANK2_START	(BANK1_START + 32)
 #define	BANK2_END	(BANK2_START + 32 - 1)
-#ifndef ARM_INTRNG
+#ifndef INTRNG
 #define	BANK3_START	(BANK2_START + 32)
 #define	BANK3_END	(BANK3_START + 32 - 1)
 #endif
@@ -113,7 +113,7 @@ __FBSDID("$FreeBSD$");
 #define	IS_IRQ_BASIC(n)	(((n) >= 0) && ((n) < BANK1_START))
 #define	IS_IRQ_BANK1(n)	(((n) >= BANK1_START) && ((n) <= BANK1_END))
 #define	IS_IRQ_BANK2(n)	(((n) >= BANK2_START) && ((n) <= BANK2_END))
-#ifndef ARM_INTRNG
+#ifndef INTRNG
 #define	ID_IRQ_BCM2836(n) (((n) >= BANK3_START) && ((n) <= BANK3_END))
 #endif
 #define	IRQ_BANK1(n)	((n) - BANK1_START)
@@ -125,7 +125,7 @@ __FBSDID("$FreeBSD$");
 #define dprintf(fmt, args...)
 #endif
 
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 #define BCM_INTC_NIRQS		72	/* 8 + 32 + 32 */
 
 struct bcm_intc_irqsrc {
@@ -142,7 +142,7 @@ struct bcm_intc_softc {
 	struct resource *	intc_res;
 	bus_space_tag_t		intc_bst;
 	bus_space_handle_t	intc_bsh;
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 	struct resource *	intc_irq_res;
 	void *			intc_irq_hdl;
 	struct bcm_intc_irqsrc	intc_isrcs[BCM_INTC_NIRQS];
@@ -156,7 +156,7 @@ static struct bcm_intc_softc *bcm_intc_s
 #define	intc_write_4(_sc, reg, val)		\
     bus_space_write_4((_sc)->intc_bst, (_sc)->intc_bsh, (reg), (val))
 
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 static inline void
 bcm_intc_isrc_mask(struct bcm_intc_softc *sc, struct bcm_intc_irqsrc *bii)
 {
@@ -360,7 +360,7 @@ bcm_intc_attach(device_t dev)
 {
 	struct		bcm_intc_softc *sc = device_get_softc(dev);
 	int		rid = 0;
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 	intptr_t	xref;
 #endif
 	sc->sc_dev = dev;
@@ -374,7 +374,7 @@ bcm_intc_attach(device_t dev)
 		return (ENXIO);
 	}
 
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 	xref = OF_xref_from_node(ofw_bus_get_node(dev));
 	if (bcm_intc_pic_register(sc, xref) != 0) {
 		bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->intc_res);
@@ -412,7 +412,7 @@ static device_method_t bcm_intc_methods[
 	DEVMETHOD(device_probe,		bcm_intc_probe),
 	DEVMETHOD(device_attach,	bcm_intc_attach),
 
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 	DEVMETHOD(pic_disable_intr,	bcm_intc_disable_intr),
 	DEVMETHOD(pic_enable_intr,	bcm_intc_enable_intr),
 	DEVMETHOD(pic_map_intr,		bcm_intc_map_intr),
@@ -434,7 +434,7 @@ static devclass_t bcm_intc_devclass;
 
 DRIVER_MODULE(intc, simplebus, bcm_intc_driver, bcm_intc_devclass, 0, 0);
 
-#ifndef ARM_INTRNG
+#ifndef INTRNG
 int
 arm_get_next_irq(int last_irq)
 {

Modified: head/sys/arm/broadcom/bcm2835/bcm2836.c
==============================================================================
--- head/sys/arm/broadcom/bcm2835/bcm2836.c	Fri Apr 15 15:50:13 2016	(r298067)
+++ head/sys/arm/broadcom/bcm2835/bcm2836.c	Fri Apr 15 16:05:41 2016	(r298068)
@@ -53,7 +53,7 @@ __FBSDID("$FreeBSD$");
 #include <dev/ofw/ofw_bus_subr.h>
 #include <dev/ofw/ofw_bus.h>
 
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 #include "pic_if.h"
 #else
 #include <arm/broadcom/bcm2835/bcm2836.h>
@@ -72,7 +72,7 @@ __FBSDID("$FreeBSD$");
 #define	MAILBOX0_IRQEN			(1 << 0)
 #endif
 
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 #define	BCM_LINTC_CONTROL_REG		0x00
 #define	BCM_LINTC_PRESCALER_REG		0x08
 #define	BCM_LINTC_GPU_ROUTING_REG	0x0c

Modified: head/sys/arm/broadcom/bcm2835/bcm2836.h
==============================================================================
--- head/sys/arm/broadcom/bcm2835/bcm2836.h	Fri Apr 15 15:50:13 2016	(r298067)
+++ head/sys/arm/broadcom/bcm2835/bcm2836.h	Fri Apr 15 16:05:41 2016	(r298068)
@@ -30,7 +30,7 @@
 #ifndef _BCM2815_BCM2836_H
 #define	_BCM2815_BCM2836_H
 
-#ifndef ARM_INTRNG
+#ifndef INTRNG
 #define	BCM2836_GPU_IRQ		8
 
 int bcm2836_get_next_irq(int);

Modified: head/sys/arm/broadcom/bcm2835/bcm2836_mp.c
==============================================================================
--- head/sys/arm/broadcom/bcm2835/bcm2836_mp.c	Fri Apr 15 15:50:13 2016	(r298067)
+++ head/sys/arm/broadcom/bcm2835/bcm2836_mp.c	Fri Apr 15 16:05:41 2016	(r298068)
@@ -139,7 +139,7 @@ platform_mp_start_ap(void)
 	}
 }
 
-#ifndef ARM_INTRNG
+#ifndef INTRNG
 void
 pic_ipi_send(cpuset_t cpus, u_int ipi)
 {

Modified: head/sys/arm/conf/A20
==============================================================================
--- head/sys/arm/conf/A20	Fri Apr 15 15:50:13 2016	(r298067)
+++ head/sys/arm/conf/A20	Fri Apr 15 16:05:41 2016	(r298068)
@@ -23,7 +23,7 @@ ident		A20
 include 	"std.armv6"
 include 	"../allwinner/a20/std.a20"
 
-options 	ARM_INTRNG
+options 	INTRNG
 
 options 	SOC_ALLWINNER_A20
 

Modified: head/sys/arm/conf/ALPINE
==============================================================================
--- head/sys/arm/conf/ALPINE	Fri Apr 15 15:50:13 2016	(r298067)
+++ head/sys/arm/conf/ALPINE	Fri Apr 15 16:05:41 2016	(r298068)
@@ -37,7 +37,7 @@ options 	DDB			#Enable the kernel debugg
 
 # Interrupt controller
 device		gic
-options 	ARM_INTRNG
+options 	INTRNG
 
 # Pseudo devices
 device		loop

Modified: head/sys/arm/conf/ARMADA38X
==============================================================================
--- head/sys/arm/conf/ARMADA38X	Fri Apr 15 15:50:13 2016	(r298067)
+++ head/sys/arm/conf/ARMADA38X	Fri Apr 15 16:05:41 2016	(r298068)
@@ -62,7 +62,7 @@ device		pci
 
 # Interrupt controllers
 device		gic
-options 	ARM_INTRNG
+options 	INTRNG
 
 # Timers
 device		mpcore_timer

Modified: head/sys/arm/conf/BEAGLEBONE
==============================================================================
--- head/sys/arm/conf/BEAGLEBONE	Fri Apr 15 15:50:13 2016	(r298067)
+++ head/sys/arm/conf/BEAGLEBONE	Fri Apr 15 16:05:41 2016	(r298068)
@@ -28,7 +28,7 @@ include 	"../ti/am335x/std.am335x"
 
 makeoptions	MODULES_EXTRA="dtb/am335x am335x_dmtpps"
 
-options 	ARM_INTRNG
+options 	INTRNG
 
 options 	HZ=100
 options 	SCHED_4BSD		# 4BSD scheduler

Modified: head/sys/arm/conf/EXYNOS5.common
==============================================================================
--- head/sys/arm/conf/EXYNOS5.common	Fri Apr 15 15:50:13 2016	(r298067)
+++ head/sys/arm/conf/EXYNOS5.common	Fri Apr 15 16:05:41 2016	(r298068)
@@ -87,7 +87,7 @@ device		dwmmc
 
 # Interrupt controller
 device		gic
-options 	ARM_INTRNG
+options 	INTRNG
 
 # ARM Generic Timer
 device		generic_timer

Modified: head/sys/arm/conf/IMX6
==============================================================================
--- head/sys/arm/conf/IMX6	Fri Apr 15 15:50:13 2016	(r298067)
+++ head/sys/arm/conf/IMX6	Fri Apr 15 16:05:41 2016	(r298068)
@@ -22,7 +22,7 @@ ident		IMX6
 include 	"std.armv6"
 include 	"../freescale/imx/std.imx6"
 
-options 	ARM_INTRNG
+options 	INTRNG
 
 options 	SOC_IMX6
 

Modified: head/sys/arm/conf/ODROIDC1
==============================================================================
--- head/sys/arm/conf/ODROIDC1	Fri Apr 15 15:50:13 2016	(r298067)
+++ head/sys/arm/conf/ODROIDC1	Fri Apr 15 16:05:41 2016	(r298068)
@@ -26,7 +26,7 @@ options 	SMP			# Enable multiple cores
 
 # Interrupt controller
 device		gic
-options 	ARM_INTRNG
+options 	INTRNG
 
 options 	FDT_DTB_STATIC
 makeoptions	FDT_DTS_FILE=odroidc1.dts

Modified: head/sys/arm/conf/PANDABOARD
==============================================================================
--- head/sys/arm/conf/PANDABOARD	Fri Apr 15 15:50:13 2016	(r298067)
+++ head/sys/arm/conf/PANDABOARD	Fri Apr 15 16:05:41 2016	(r298068)
@@ -60,7 +60,7 @@ options 	DDB			# Enable the kernel debug
 device		fdt_pinctrl
 # Interrupt controller
 device		gic
-options 	ARM_INTRNG
+options 	INTRNG
 
 # ARM MPCore timer
 device		mpcore_timer

Modified: head/sys/arm/conf/RK3188
==============================================================================
--- head/sys/arm/conf/RK3188	Fri Apr 15 15:50:13 2016	(r298067)
+++ head/sys/arm/conf/RK3188	Fri Apr 15 16:05:41 2016	(r298068)
@@ -47,7 +47,7 @@ options 	ROOTDEVNAME=\"ufs:/dev/mmcsd0\"
 
 # Interrupt controller
 device		gic
-options 	ARM_INTRNG
+options 	INTRNG
 
 # ARM MPCore timer
 device		mpcore_timer

Modified: head/sys/arm/conf/RPI-B
==============================================================================
--- head/sys/arm/conf/RPI-B	Fri Apr 15 15:50:13 2016	(r298067)
+++ head/sys/arm/conf/RPI-B	Fri Apr 15 16:05:41 2016	(r298068)
@@ -24,7 +24,7 @@ include 	"std.armv6"
 include 	"../broadcom/bcm2835/std.rpi"
 include 	"../broadcom/bcm2835/std.bcm2835"
 
-options 	ARM_INTRNG
+options 	INTRNG
 
 options 	HZ=100
 options 	SCHED_4BSD		# 4BSD scheduler

Modified: head/sys/arm/conf/RPI2
==============================================================================
--- head/sys/arm/conf/RPI2	Fri Apr 15 15:50:13 2016	(r298067)
+++ head/sys/arm/conf/RPI2	Fri Apr 15 16:05:41 2016	(r298068)
@@ -24,7 +24,7 @@ include 	"std.armv6"
 include 	"../broadcom/bcm2835/std.rpi"
 include 	"../broadcom/bcm2835/std.bcm2836"
 
-options 	ARM_INTRNG
+options 	INTRNG
 
 options 	HZ=100
 options 	SCHED_ULE		# ULE scheduler

Modified: head/sys/arm/conf/SOCKIT.common
==============================================================================
--- head/sys/arm/conf/SOCKIT.common	Fri Apr 15 15:50:13 2016	(r298067)
+++ head/sys/arm/conf/SOCKIT.common	Fri Apr 15 16:05:41 2016	(r298068)
@@ -53,7 +53,7 @@ options 	INVARIANT_SUPPORT	# Extra sanit
 
 # Interrupt controller
 device		gic
-options 	ARM_INTRNG
+options 	INTRNG
 
 # ARM MPCore timer
 device		mpcore_timer

Modified: head/sys/arm/conf/VIRT
==============================================================================
--- head/sys/arm/conf/VIRT	Fri Apr 15 15:50:13 2016	(r298067)
+++ head/sys/arm/conf/VIRT	Fri Apr 15 16:05:41 2016	(r298068)
@@ -47,7 +47,7 @@ options 	INVARIANT_SUPPORT	# Extra sanit
 
 # Interrupt controller
 device		gic
-options 	ARM_INTRNG
+options 	INTRNG
 
 # ARM Generic Timer
 device		generic_timer

Modified: head/sys/arm/conf/VSATV102
==============================================================================
--- head/sys/arm/conf/VSATV102	Fri Apr 15 15:50:13 2016	(r298067)
+++ head/sys/arm/conf/VSATV102	Fri Apr 15 16:05:41 2016	(r298068)
@@ -26,7 +26,7 @@ options 	SMP			# Enable multiple cores
 
 # Interrupt controller
 device		gic
-options 	ARM_INTRNG
+options 	INTRNG
 
 options 	FDT_DTB_STATIC
 makeoptions	FDT_DTS_FILE=vsatv102-m6.dts

Modified: head/sys/arm/conf/VYBRID
==============================================================================
--- head/sys/arm/conf/VYBRID	Fri Apr 15 15:50:13 2016	(r298067)
+++ head/sys/arm/conf/VYBRID	Fri Apr 15 16:05:41 2016	(r298068)
@@ -62,7 +62,7 @@ options 	NO_SWAPPING
 
 # Interrupt controller
 device		gic
-options 	ARM_INTRNG
+options 	INTRNG
 
 # ARM MPCore timer
 device		mpcore_timer

Modified: head/sys/arm/conf/ZEDBOARD
==============================================================================
--- head/sys/arm/conf/ZEDBOARD	Fri Apr 15 15:50:13 2016	(r298067)
+++ head/sys/arm/conf/ZEDBOARD	Fri Apr 15 16:05:41 2016	(r298068)
@@ -52,7 +52,7 @@ options 	ROOTDEVNAME=\"ufs:mmcsd0s2a\"
 
 # Interrupt controller
 device		gic
-options 	ARM_INTRNG
+options 	INTRNG
 
 # Cache controller
 device		pl310			# PL310 L2 cache controller

Modified: head/sys/arm/freescale/imx/imx6_machdep.c
==============================================================================
--- head/sys/arm/freescale/imx/imx6_machdep.c	Fri Apr 15 15:50:13 2016	(r298067)
+++ head/sys/arm/freescale/imx/imx6_machdep.c	Fri Apr 15 16:05:41 2016	(r298068)
@@ -58,7 +58,7 @@ struct fdt_fixup_entry fdt_fixup_table[]
 
 static uint32_t gpio1_node;
 
-#ifndef ARM_INTRNG
+#ifndef INTRNG
 /*
  * Work around the linux workaround for imx6 erratum 006687, in which some
  * ethernet interrupts don't go to the GPC and thus won't wake the system from

Modified: head/sys/arm/freescale/imx/imx_common.c
==============================================================================
--- head/sys/arm/freescale/imx/imx_common.c	Fri Apr 15 15:50:13 2016	(r298067)
+++ head/sys/arm/freescale/imx/imx_common.c	Fri Apr 15 16:05:41 2016	(r298068)
@@ -54,7 +54,7 @@ struct fdt_fixup_entry fdt_fixup_table[]
 	{ NULL, NULL }
 };
 
-#ifndef ARM_INTRNG
+#ifndef INTRNG
 static int
 fdt_intc_decode_ic(phandle_t node, pcell_t *intr, int *interrupt, int *trig,
     int *pol)
@@ -71,4 +71,4 @@ fdt_pic_decode_t fdt_pic_table[] = {
 	&fdt_intc_decode_ic,
 	NULL
 };
-#endif /* ARM_INTRNG */
+#endif /* INTRNG */

Modified: head/sys/arm/freescale/imx/imx_gpio.c
==============================================================================
--- head/sys/arm/freescale/imx/imx_gpio.c	Fri Apr 15 15:50:13 2016	(r298067)
+++ head/sys/arm/freescale/imx/imx_gpio.c	Fri Apr 15 16:05:41 2016	(r298068)
@@ -60,7 +60,7 @@ __FBSDID("$FreeBSD$");
 
 #include "gpio_if.h"
 
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 #include "pic_if.h"
 #endif
 
@@ -91,7 +91,7 @@ __FBSDID("$FreeBSD$");
 #define	DEFAULT_CAPS	(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT)
 #define	NGPIO		32
 
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 struct gpio_irqsrc {
 	struct intr_irqsrc	gi_isrc;
 	u_int			gi_irq;
@@ -110,7 +110,7 @@ struct imx51_gpio_softc {
 	bus_space_handle_t	sc_ioh;
 	int			gpio_npins;
 	struct gpio_pin		gpio_pins[NGPIO];
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 	struct gpio_irqsrc 	gpio_pic_irqsrc[NGPIO];
 #endif
 };
@@ -155,7 +155,7 @@ static int imx51_gpio_pin_set(device_t, 
 static int imx51_gpio_pin_get(device_t, uint32_t, unsigned int *);
 static int imx51_gpio_pin_toggle(device_t, uint32_t pin);
 
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 static int
 gpio_pic_map_fdt(device_t dev, u_int ncells, pcell_t *cells, u_int *irqp,
     enum intr_polarity *polp, enum intr_trigger *trigp)
@@ -653,7 +653,7 @@ imx51_gpio_attach(device_t dev)
 	 */
 	WRITE4(sc, IMX_GPIO_IMR_REG, 0);
 	for (irq = 0; irq < 2; irq++) {
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 		if ((bus_setup_intr(dev, sc->sc_res[1 + irq], INTR_TYPE_CLK,
 		    gpio_pic_filter, NULL, sc, &sc->gpio_ih[irq]))) {
 			device_printf(dev,
@@ -675,7 +675,7 @@ imx51_gpio_attach(device_t dev)
  		    "imx_gpio%d.%d", unit, i);
 	}
 
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 	gpio_pic_register_isrcs(sc);
 	intr_pic_register(dev, OF_xref_from_node(ofw_bus_get_node(dev)));
 #endif
@@ -713,7 +713,7 @@ static device_method_t imx51_gpio_method
 	DEVMETHOD(device_attach,	imx51_gpio_attach),
 	DEVMETHOD(device_detach,	imx51_gpio_detach),
 
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 	/* Interrupt controller interface */
 	DEVMETHOD(pic_disable_intr,	gpio_pic_disable_intr),
 	DEVMETHOD(pic_enable_intr,	gpio_pic_enable_intr),

Modified: head/sys/arm/freescale/vybrid/vf_common.c
==============================================================================
--- head/sys/arm/freescale/vybrid/vf_common.c	Fri Apr 15 15:50:13 2016	(r298067)
+++ head/sys/arm/freescale/vybrid/vf_common.c	Fri Apr 15 16:05:41 2016	(r298068)
@@ -66,7 +66,7 @@ struct fdt_fixup_entry fdt_fixup_table[]
 	{ NULL, NULL }
 };
 
-#ifndef ARM_INTRNG
+#ifndef INTRNG
 static int
 fdt_pic_decode_ic(phandle_t node, pcell_t *intr, int *interrupt, int *trig,
     int *pol)

Modified: head/sys/arm/include/intr.h
==============================================================================
--- head/sys/arm/include/intr.h	Fri Apr 15 15:50:13 2016	(r298067)
+++ head/sys/arm/include/intr.h	Fri Apr 15 16:05:41 2016	(r298068)
@@ -43,7 +43,7 @@
 #include <dev/ofw/openfirm.h>
 #endif
 
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 
 #ifndef NIRQ
 #define	NIRQ		1024	/* XXX - It should be an option. */
@@ -63,7 +63,7 @@ void intr_ipi_setup(u_int, const char *,
 
 int intr_pic_ipi_setup(u_int, const char *, intr_ipi_handler_t *, void *);
 #endif
-#else /* ARM_INTRNG */
+#else /* INTRNG */
 
 /* XXX move to std.* files? */
 #ifdef CPU_XSCALE_81342
@@ -111,7 +111,7 @@ int gic_decode_fdt(phandle_t, pcell_t *,
 int intr_fdt_map_irq(phandle_t, pcell_t *, int);
 #endif
 
-#endif /* ARM_INTRNG */
+#endif /* INTRNG */
 
 void arm_irq_memory_barrier(uintptr_t);
 

Modified: head/sys/arm/include/smp.h
==============================================================================
--- head/sys/arm/include/smp.h	Fri Apr 15 15:50:13 2016	(r298067)
+++ head/sys/arm/include/smp.h	Fri Apr 15 16:05:41 2016	(r298068)
@@ -6,7 +6,7 @@
 #include <sys/_cpuset.h>
 #include <machine/pcb.h>
 
-#ifdef ARM_INTRNG
+#ifdef INTRNG
 enum {
 	IPI_AST,
 	IPI_PREEMPT,
@@ -37,7 +37,7 @@ void	ipi_cpu(int cpu, u_int ipi);
 void	ipi_selected(cpuset_t cpus, u_int ipi);
 
 /* PIC interface */
-#ifndef ARM_INTRNG
+#ifndef INTRNG
 void	pic_ipi_send(cpuset_t cpus, u_int ipi);
 void	pic_ipi_clear(int ipi);
 int	pic_ipi_read(int arg);

Modified: head/sys/arm/lpc/lpc_intc.c
==============================================================================
--- head/sys/arm/lpc/lpc_intc.c	Fri Apr 15 15:50:13 2016	(r298067)
+++ head/sys/arm/lpc/lpc_intc.c	Fri Apr 15 16:05:41 2016	(r298068)
@@ -231,7 +231,7 @@ struct fdt_fixup_entry fdt_fixup_table[]
 	{ NULL, NULL }
 };
 
-#ifndef ARM_INTRNG
+#ifndef INTRNG

*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***

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