svn commit: r291262 - head/sys/powerpc/aim

Nathan Whitehorn nwhitehorn at FreeBSD.org
Tue Nov 24 16:10:22 UTC 2015


Author: nwhitehorn
Date: Tue Nov 24 16:10:21 2015
New Revision: 291262
URL: https://svnweb.freebsd.org/changeset/base/291262

Log:
  Use what we really mean (powerpc_lwsync()) rather than the Linux-compat
  mb() here and provide some more documentation on what, exactly, makes this
  code safe.
  
  Requested by and discussed with:	kib, alc

Modified:
  head/sys/powerpc/aim/slb.c

Modified: head/sys/powerpc/aim/slb.c
==============================================================================
--- head/sys/powerpc/aim/slb.c	Tue Nov 24 16:07:03 2015	(r291261)
+++ head/sys/powerpc/aim/slb.c	Tue Nov 24 16:10:21 2015	(r291262)
@@ -140,7 +140,7 @@ make_new_leaf(uint64_t esid, uint64_t sl
 	 * that a lockless searcher always sees a valid path through
 	 * the tree.
 	 */
-	mb();
+	powerpc_lwsync();
 
 	idx = esid2idx(esid, parent->ua_level);
 	parent->u.ua_child[idx] = child;
@@ -188,7 +188,7 @@ make_intermediate(uint64_t esid, struct 
 	idx = esid2idx(child->ua_base, inter->ua_level);
 	inter->u.ua_child[idx] = child;
 	setbit(&inter->ua_alloc, idx);
-	mb();
+	powerpc_lwsync();
 
 	/* Set up parent to point to intermediate node ... */
 	idx = esid2idx(inter->ua_base, parent->ua_level);
@@ -241,6 +241,12 @@ user_va_to_slb_entry(pmap_t pm, vm_offse
 			return ((ua->u.slb_entries[idx].slbe & SLBE_VALID) ?
 			    &ua->u.slb_entries[idx] : NULL);
 
+		/*
+		 * The following accesses are implicitly ordered under the POWER
+		 * ISA by load dependencies (the store ordering is provided by
+		 * the powerpc_lwsync() calls elsewhere) and so are run without
+		 * barriers.
+		 */
 		ua = ua->u.ua_child[idx];
 		if (ua == NULL ||
 		    esid2base(esid, ua->ua_level) != ua->ua_base)


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