svn commit: r293010 - head/sys/dev/rtwn
Adrian Chadd
adrian at FreeBSD.org
Thu Dec 31 22:32:37 UTC 2015
Author: adrian
Date: Thu Dec 31 22:32:36 2015
New Revision: 293010
URL: https://svnweb.freebsd.org/changeset/base/293010
Log:
[rtwn] bring over initial rtwn driver.
This is a port from openbsd. It's incomplete and unstable, but it's better
than nothing. I have no plans to MFC this until it's complete and stable.
Submitted by: kevlo
Added:
head/sys/dev/rtwn/
head/sys/dev/rtwn/if_rtwn.c (contents, props changed)
head/sys/dev/rtwn/if_rtwnreg.h (contents, props changed)
Added: head/sys/dev/rtwn/if_rtwn.c
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/dev/rtwn/if_rtwn.c Thu Dec 31 22:32:36 2015 (r293010)
@@ -0,0 +1,3490 @@
+/* $OpenBSD: if_rtwn.c,v 1.6 2015/08/28 00:03:53 deraadt Exp $ */
+
+/*-
+ * Copyright (c) 2010 Damien Bergamini <damien.bergamini at free.fr>
+ * Copyright (c) 2015 Stefan Sperling <stsp at openbsd.org>
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+/*
+ * Driver for Realtek RTL8188CE
+ */
+
+#include <sys/param.h>
+#include <sys/sysctl.h>
+#include <sys/sockio.h>
+#include <sys/mbuf.h>
+#include <sys/kernel.h>
+#include <sys/socket.h>
+#include <sys/systm.h>
+#include <sys/malloc.h>
+#include <sys/lock.h>
+#include <sys/mutex.h>
+#include <sys/module.h>
+#include <sys/bus.h>
+#include <sys/endian.h>
+#include <sys/firmware.h>
+
+#include <machine/bus.h>
+#include <machine/resource.h>
+#include <sys/rman.h>
+
+#include <dev/pci/pcireg.h>
+#include <dev/pci/pcivar.h>
+
+#include <net/bpf.h>
+#include <net/if.h>
+#include <net/if_var.h>
+#include <net/if_arp.h>
+#include <net/ethernet.h>
+#include <net/if_dl.h>
+#include <net/if_media.h>
+#include <net/if_types.h>
+
+#include <net80211/ieee80211_var.h>
+#include <net80211/ieee80211_radiotap.h>
+#include <net80211/ieee80211_regdomain.h>
+#include <net80211/ieee80211_ratectl.h>
+
+#include <netinet/in.h>
+#include <netinet/in_systm.h>
+#include <netinet/in_var.h>
+#include <netinet/ip.h>
+#include <netinet/if_ether.h>
+
+#include <dev/rtwn/if_rtwnreg.h>
+
+#define RTWN_DEBUG
+#ifdef RTWN_DEBUG
+#define DPRINTF(x) do { if (sc->sc_debug > 0) printf x; } while (0)
+#define DPRINTFN(n, x) do { if (sc->sc_debug >= (n)) printf x; } while (0)
+#else
+#define DPRINTF(x)
+#define DPRINTFN(n, x)
+#endif
+
+/*
+ * PCI configuration space registers.
+ */
+#define RTWN_PCI_IOBA 0x10 /* i/o mapped base */
+#define RTWN_PCI_MMBA 0x18 /* memory mapped base */
+
+#define RTWN_INT_ENABLE (R92C_IMR_ROK | R92C_IMR_VODOK | R92C_IMR_VIDOK | \
+ R92C_IMR_BEDOK | R92C_IMR_BKDOK | R92C_IMR_MGNTDOK | \
+ R92C_IMR_HIGHDOK | R92C_IMR_BDOK | R92C_IMR_RDU | \
+ R92C_IMR_RXFOVW)
+
+struct rtwn_ident {
+ uint16_t vendor;
+ uint16_t device;
+ const char *name;
+};
+
+
+static const struct rtwn_ident rtwn_ident_table[] = {
+ { 0x10ec, 0x8176, "Realtek RTL8188CE" },
+ { 0, 0, NULL }
+};
+
+
+static void rtwn_dma_map_addr(void *, bus_dma_segment_t *, int, int);
+static void rtwn_setup_rx_desc(struct rtwn_softc *, struct r92c_rx_desc *,
+ bus_addr_t, size_t, int);
+static int rtwn_alloc_rx_list(struct rtwn_softc *);
+static void rtwn_reset_rx_list(struct rtwn_softc *);
+static void rtwn_free_rx_list(struct rtwn_softc *);
+static int rtwn_alloc_tx_list(struct rtwn_softc *, int);
+static void rtwn_reset_tx_list(struct rtwn_softc *, int);
+static void rtwn_free_tx_list(struct rtwn_softc *, int);
+static struct ieee80211vap *rtwn_vap_create(struct ieee80211com *,
+ const char [IFNAMSIZ], int, enum ieee80211_opmode, int,
+ const uint8_t [IEEE80211_ADDR_LEN],
+ const uint8_t [IEEE80211_ADDR_LEN]);
+static void rtwn_vap_delete(struct ieee80211vap *);
+static void rtwn_write_1(struct rtwn_softc *, uint16_t, uint8_t);
+static void rtwn_write_2(struct rtwn_softc *, uint16_t, uint16_t);
+static void rtwn_write_4(struct rtwn_softc *, uint16_t, uint32_t);
+static uint8_t rtwn_read_1(struct rtwn_softc *, uint16_t);
+static uint16_t rtwn_read_2(struct rtwn_softc *, uint16_t);
+static uint32_t rtwn_read_4(struct rtwn_softc *, uint16_t);
+static int rtwn_fw_cmd(struct rtwn_softc *, uint8_t, const void *, int);
+static void rtwn_rf_write(struct rtwn_softc *, int, uint8_t, uint32_t);
+static uint32_t rtwn_rf_read(struct rtwn_softc *, int, uint8_t);
+static int rtwn_llt_write(struct rtwn_softc *, uint32_t, uint32_t);
+static uint8_t rtwn_efuse_read_1(struct rtwn_softc *, uint16_t);
+static void rtwn_efuse_read(struct rtwn_softc *);
+static int rtwn_read_chipid(struct rtwn_softc *);
+static void rtwn_read_rom(struct rtwn_softc *);
+static int rtwn_ra_init(struct rtwn_softc *);
+static void rtwn_tsf_sync_enable(struct rtwn_softc *);
+static void rtwn_set_led(struct rtwn_softc *, int, int);
+static void rtwn_calib_to(void *);
+static int rtwn_newstate(struct ieee80211vap *, enum ieee80211_state, int);
+static int rtwn_updateedca(struct ieee80211com *);
+static void rtwn_update_avgrssi(struct rtwn_softc *, int, int8_t);
+static int8_t rtwn_get_rssi(struct rtwn_softc *, int, void *);
+static void rtwn_rx_frame(struct rtwn_softc *, struct r92c_rx_desc *,
+ struct rtwn_rx_data *, int);
+static int rtwn_tx(struct rtwn_softc *, struct mbuf *,
+ struct ieee80211_node *);
+static void rtwn_tx_done(struct rtwn_softc *, int);
+static int rtwn_raw_xmit(struct ieee80211_node *, struct mbuf *,
+ const struct ieee80211_bpf_params *);
+static int rtwn_transmit(struct ieee80211com *, struct mbuf *);
+static void rtwn_parent(struct ieee80211com *);
+static void rtwn_start(struct rtwn_softc *sc);
+static void rtwn_watchdog(void *);
+static int rtwn_power_on(struct rtwn_softc *);
+static int rtwn_llt_init(struct rtwn_softc *);
+static void rtwn_fw_reset(struct rtwn_softc *);
+static void rtwn_fw_loadpage(struct rtwn_softc *, int, const uint8_t *,
+ int);
+static int rtwn_load_firmware(struct rtwn_softc *);
+static int rtwn_dma_init(struct rtwn_softc *);
+static void rtwn_mac_init(struct rtwn_softc *);
+static void rtwn_bb_init(struct rtwn_softc *);
+static void rtwn_rf_init(struct rtwn_softc *);
+static void rtwn_cam_init(struct rtwn_softc *);
+static void rtwn_pa_bias_init(struct rtwn_softc *);
+static void rtwn_rxfilter_init(struct rtwn_softc *);
+static void rtwn_edca_init(struct rtwn_softc *);
+static void rtwn_write_txpower(struct rtwn_softc *, int, uint16_t[]);
+static void rtwn_get_txpower(struct rtwn_softc *, int,
+ struct ieee80211_channel *, struct ieee80211_channel *,
+ uint16_t[]);
+static void rtwn_set_txpower(struct rtwn_softc *,
+ struct ieee80211_channel *, struct ieee80211_channel *);
+static void rtwn_scan_start(struct ieee80211com *);
+static void rtwn_scan_end(struct ieee80211com *);
+static void rtwn_set_channel(struct ieee80211com *);
+static void rtwn_update_mcast(struct ieee80211com *);
+static void rtwn_set_chan(struct rtwn_softc *,
+ struct ieee80211_channel *, struct ieee80211_channel *);
+static int rtwn_iq_calib_chain(struct rtwn_softc *, int, uint16_t[2],
+ uint16_t[2]);
+static void rtwn_iq_calib_run(struct rtwn_softc *, int, uint16_t[2][2],
+ uint16_t[2][2]);
+static int rtwn_iq_calib_compare_results(uint16_t[2][2], uint16_t[2][2],
+ uint16_t[2][2], uint16_t[2][2], int);
+static void rtwn_iq_calib_write_results(struct rtwn_softc *, uint16_t[2],
+ uint16_t[2], int);
+static void rtwn_iq_calib(struct rtwn_softc *);
+static void rtwn_lc_calib(struct rtwn_softc *);
+static void rtwn_temp_calib(struct rtwn_softc *);
+static void rtwn_init_locked(struct rtwn_softc *);
+static void rtwn_init(struct rtwn_softc *);
+static void rtwn_stop_locked(struct rtwn_softc *);
+static void rtwn_stop(struct rtwn_softc *);
+static void rtwn_intr(void *);
+static void rtwn_hw_reset(void *, int);
+
+/* Aliases. */
+#define rtwn_bb_write rtwn_write_4
+#define rtwn_bb_read rtwn_read_4
+
+static int rtwn_probe(device_t);
+static int rtwn_attach(device_t);
+static int rtwn_detach(device_t);
+static int rtwn_shutdown(device_t);
+static int rtwn_suspend(device_t);
+static int rtwn_resume(device_t);
+
+static device_method_t rtwn_methods[] = {
+ /* Device interface */
+ DEVMETHOD(device_probe, rtwn_probe),
+ DEVMETHOD(device_attach, rtwn_attach),
+ DEVMETHOD(device_detach, rtwn_detach),
+ DEVMETHOD(device_shutdown, rtwn_shutdown),
+ DEVMETHOD(device_suspend, rtwn_suspend),
+ DEVMETHOD(device_resume, rtwn_resume),
+
+ DEVMETHOD_END
+};
+
+static driver_t rtwn_driver = {
+ "rtwn",
+ rtwn_methods,
+ sizeof (struct rtwn_softc)
+};
+static devclass_t rtwn_devclass;
+
+DRIVER_MODULE(rtwn, pci, rtwn_driver, rtwn_devclass, NULL, NULL);
+
+MODULE_VERSION(rtwn, 1);
+
+MODULE_DEPEND(rtwn, pci, 1, 1, 1);
+MODULE_DEPEND(rtwn, wlan, 1, 1, 1);
+MODULE_DEPEND(rtwn, firmware, 1, 1, 1);
+
+static int
+rtwn_probe(device_t dev)
+{
+ const struct rtwn_ident *ident;
+
+ for (ident = rtwn_ident_table; ident->name != NULL; ident++) {
+ if (pci_get_vendor(dev) == ident->vendor &&
+ pci_get_device(dev) == ident->device) {
+ device_set_desc(dev, ident->name);
+ return (BUS_PROBE_DEFAULT);
+ }
+ }
+ return (ENXIO);
+}
+
+static int
+rtwn_attach(device_t dev)
+{
+ struct rtwn_softc *sc = device_get_softc(dev);
+ struct ieee80211com *ic = &sc->sc_ic;
+ uint32_t lcsr;
+ uint8_t bands;
+ int i, count, error, rid;
+
+ sc->sc_dev = dev;
+ sc->sc_debug = 0;
+
+ /*
+ * Get the offset of the PCI Express Capability Structure in PCI
+ * Configuration Space.
+ */
+ error = pci_find_cap(dev, PCIY_EXPRESS, &sc->sc_cap_off);
+ if (error != 0) {
+ device_printf(dev, "PCIe capability structure not found!\n");
+ return (error);
+ }
+
+ /* Enable bus-mastering. */
+ pci_enable_busmaster(dev);
+
+ rid = PCIR_BAR(2);
+ sc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
+ RF_ACTIVE);
+ if (sc->mem == NULL) {
+ device_printf(dev, "can't map mem space\n");
+ return (ENOMEM);
+ }
+ sc->sc_st = rman_get_bustag(sc->mem);
+ sc->sc_sh = rman_get_bushandle(sc->mem);
+
+ /* Install interrupt handler. */
+ count = 1;
+ rid = 0;
+ if (pci_alloc_msi(dev, &count) == 0)
+ rid = 1;
+ sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE |
+ (rid != 0 ? 0 : RF_SHAREABLE));
+ if (sc->irq == NULL) {
+ device_printf(dev, "can't map interrupt\n");
+ return (ENXIO);
+ }
+
+ RTWN_LOCK_INIT(sc);
+ callout_init_mtx(&sc->calib_to, &sc->sc_mtx, 0);
+ callout_init_mtx(&sc->watchdog_to, &sc->sc_mtx, 0);
+ TASK_INIT(&sc->sc_reinit_task, 0, rtwn_hw_reset, sc);
+ mbufq_init(&sc->sc_snd, ifqmaxlen);
+
+ error = rtwn_read_chipid(sc);
+ if (error != 0) {
+ device_printf(dev, "unsupported test chip\n");
+ goto fail;
+ }
+
+ /* Disable PCIe Active State Power Management (ASPM). */
+ lcsr = pci_read_config(sc->sc_dev, sc->sc_cap_off + PCIER_LINK_CTL, 4);
+ lcsr &= ~PCIEM_LINK_CTL_ASPMC;
+ pci_write_config(sc->sc_dev, sc->sc_cap_off + PCIER_LINK_CTL, lcsr, 4);
+
+ /* Allocate Tx/Rx buffers. */
+ error = rtwn_alloc_rx_list(sc);
+ if (error != 0) {
+ device_printf(dev, "could not allocate Rx buffers\n");
+ goto fail;
+ }
+ for (i = 0; i < RTWN_NTXQUEUES; i++) {
+ error = rtwn_alloc_tx_list(sc, i);
+ if (error != 0) {
+ device_printf(dev, "could not allocate Tx buffers\n");
+ goto fail;
+ }
+ }
+
+ /* Determine number of Tx/Rx chains. */
+ if (sc->chip & RTWN_CHIP_92C) {
+ sc->ntxchains = (sc->chip & RTWN_CHIP_92C_1T2R) ? 1 : 2;
+ sc->nrxchains = 2;
+ } else {
+ sc->ntxchains = 1;
+ sc->nrxchains = 1;
+ }
+ rtwn_read_rom(sc);
+
+ device_printf(sc->sc_dev, "MAC/BB RTL%s, RF 6052 %dT%dR\n",
+ (sc->chip & RTWN_CHIP_92C) ? "8192CE" : "8188CE",
+ sc->ntxchains, sc->nrxchains);
+
+ ic->ic_softc = sc;
+ ic->ic_name = device_get_nameunit(dev);
+ ic->ic_opmode = IEEE80211_M_STA;
+ ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
+
+ /* set device capabilities */
+ ic->ic_caps =
+ IEEE80211_C_STA /* station mode */
+ | IEEE80211_C_MONITOR /* monitor mode */
+ | IEEE80211_C_SHPREAMBLE /* short preamble supported */
+ | IEEE80211_C_SHSLOT /* short slot time supported */
+ | IEEE80211_C_WPA /* capable of WPA1+WPA2 */
+ | IEEE80211_C_BGSCAN /* capable of bg scanning */
+ | IEEE80211_C_WME /* 802.11e */
+ ;
+
+ bands = 0;
+ setbit(&bands, IEEE80211_MODE_11B);
+ setbit(&bands, IEEE80211_MODE_11G);
+ ieee80211_init_channels(ic, NULL, &bands);
+
+ ieee80211_ifattach(ic);
+
+ ic->ic_wme.wme_update = rtwn_updateedca;
+ ic->ic_update_mcast = rtwn_update_mcast;
+ ic->ic_scan_start =rtwn_scan_start;
+ ic->ic_scan_end = rtwn_scan_end;
+ ic->ic_set_channel = rtwn_set_channel;
+ ic->ic_raw_xmit = rtwn_raw_xmit;
+ ic->ic_transmit = rtwn_transmit;
+ ic->ic_parent = rtwn_parent;
+ ic->ic_vap_create = rtwn_vap_create;
+ ic->ic_vap_delete = rtwn_vap_delete;
+
+ ieee80211_radiotap_attach(ic,
+ &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
+ RTWN_TX_RADIOTAP_PRESENT,
+ &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
+ RTWN_RX_RADIOTAP_PRESENT);
+
+ /*
+ * Hook our interrupt after all initialization is complete.
+ */
+ error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET | INTR_MPSAFE,
+ NULL, rtwn_intr, sc, &sc->sc_ih);
+ if (error != 0) {
+ device_printf(dev, "can't establish interrupt, error %d\n",
+ error);
+ goto fail;
+ }
+
+ if (bootverbose)
+ ieee80211_announce(ic);
+
+ return (0);
+
+fail:
+ rtwn_detach(dev);
+ return (error);
+}
+
+
+static int
+rtwn_detach(device_t dev)
+{
+ struct rtwn_softc *sc = device_get_softc(dev);
+ int i;
+
+ if (sc->sc_ic.ic_softc != NULL) {
+ ieee80211_draintask(&sc->sc_ic, &sc->sc_reinit_task);
+ rtwn_stop(sc);
+
+ callout_drain(&sc->calib_to);
+ callout_drain(&sc->watchdog_to);
+ ieee80211_ifdetach(&sc->sc_ic);
+ mbufq_drain(&sc->sc_snd);
+ }
+
+ /* Uninstall interrupt handler. */
+ if (sc->irq != NULL) {
+ bus_teardown_intr(dev, sc->irq, sc->sc_ih);
+ bus_release_resource(dev, SYS_RES_IRQ, rman_get_rid(sc->irq),
+ sc->irq);
+ pci_release_msi(dev);
+ }
+
+ /* Free Tx/Rx buffers. */
+ for (i = 0; i < RTWN_NTXQUEUES; i++)
+ rtwn_free_tx_list(sc, i);
+ rtwn_free_rx_list(sc);
+
+ if (sc->mem != NULL)
+ bus_release_resource(dev, SYS_RES_MEMORY,
+ rman_get_rid(sc->mem), sc->mem);
+
+ RTWN_LOCK_DESTROY(sc);
+ return (0);
+}
+
+static int
+rtwn_shutdown(device_t dev)
+{
+
+ return (0);
+}
+
+static int
+rtwn_suspend(device_t dev)
+{
+ return (0);
+}
+
+static int
+rtwn_resume(device_t dev)
+{
+
+ return (0);
+}
+
+static void
+rtwn_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
+{
+
+ if (error != 0)
+ return;
+ KASSERT(nsegs == 1, ("too many DMA segments, %d should be 1", nsegs));
+ *(bus_addr_t *)arg = segs[0].ds_addr;
+}
+
+static void
+rtwn_setup_rx_desc(struct rtwn_softc *sc, struct r92c_rx_desc *desc,
+ bus_addr_t addr, size_t len, int idx)
+{
+
+ memset(desc, 0, sizeof(*desc));
+ desc->rxdw0 = htole32(SM(R92C_RXDW0_PKTLEN, len) |
+ ((idx == RTWN_RX_LIST_COUNT - 1) ? R92C_RXDW0_EOR : 0));
+ desc->rxbufaddr = htole32(addr);
+ bus_space_barrier(sc->sc_st, sc->sc_sh, 0, sc->sc_mapsize,
+ BUS_SPACE_BARRIER_WRITE);
+ desc->rxdw0 |= htole32(R92C_RXDW0_OWN);
+}
+
+static int
+rtwn_alloc_rx_list(struct rtwn_softc *sc)
+{
+ struct rtwn_rx_ring *rx_ring = &sc->rx_ring;
+ struct rtwn_rx_data *rx_data;
+ bus_size_t size;
+ int i, error;
+
+ /* Allocate Rx descriptors. */
+ size = sizeof(struct r92c_rx_desc) * RTWN_RX_LIST_COUNT;
+ error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
+ BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
+ size, 1, size, 0, NULL, NULL, &rx_ring->desc_dmat);
+ if (error != 0) {
+ device_printf(sc->sc_dev, "could not create rx desc DMA tag\n");
+ goto fail;
+ }
+
+ error = bus_dmamem_alloc(rx_ring->desc_dmat, (void **)&rx_ring->desc,
+ BUS_DMA_NOWAIT | BUS_DMA_ZERO | BUS_DMA_COHERENT,
+ &rx_ring->desc_map);
+ if (error != 0) {
+ device_printf(sc->sc_dev, "could not allocate rx desc\n");
+ goto fail;
+ }
+ error = bus_dmamap_load(rx_ring->desc_dmat, rx_ring->desc_map,
+ rx_ring->desc, size, rtwn_dma_map_addr, &rx_ring->paddr, 0);
+ if (error != 0) {
+ device_printf(sc->sc_dev, "could not load rx desc DMA map\n");
+ goto fail;
+ }
+ bus_dmamap_sync(rx_ring->desc_dmat, rx_ring->desc_map,
+ BUS_DMASYNC_PREWRITE);
+
+ /* Create RX buffer DMA tag. */
+ error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
+ BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES,
+ 1, MCLBYTES, 0, NULL, NULL, &rx_ring->data_dmat);
+ if (error != 0) {
+ device_printf(sc->sc_dev, "could not create rx buf DMA tag\n");
+ goto fail;
+ }
+
+ /* Allocate Rx buffers. */
+ for (i = 0; i < RTWN_RX_LIST_COUNT; i++) {
+ rx_data = &rx_ring->rx_data[i];
+ error = bus_dmamap_create(rx_ring->data_dmat, 0, &rx_data->map);
+ if (error != 0) {
+ device_printf(sc->sc_dev,
+ "could not create rx buf DMA map\n");
+ goto fail;
+ }
+
+ rx_data->m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
+ if (rx_data->m == NULL) {
+ device_printf(sc->sc_dev,
+ "could not allocate rx mbuf\n");
+ error = ENOMEM;
+ goto fail;
+ }
+
+ error = bus_dmamap_load(rx_ring->data_dmat, rx_data->map,
+ mtod(rx_data->m, void *), MCLBYTES, rtwn_dma_map_addr,
+ &rx_data->paddr, BUS_DMA_NOWAIT);
+ if (error != 0) {
+ device_printf(sc->sc_dev,
+ "could not load rx buf DMA map");
+ goto fail;
+ }
+
+ rtwn_setup_rx_desc(sc, &rx_ring->desc[i], rx_data->paddr,
+ MCLBYTES, i);
+ }
+ return (0);
+
+fail:
+ rtwn_free_rx_list(sc);
+ return (error);
+}
+
+static void
+rtwn_reset_rx_list(struct rtwn_softc *sc)
+{
+ struct rtwn_rx_ring *rx_ring = &sc->rx_ring;
+ struct rtwn_rx_data *rx_data;
+ int i;
+
+ for (i = 0; i < RTWN_RX_LIST_COUNT; i++) {
+ rx_data = &rx_ring->rx_data[i];
+ rtwn_setup_rx_desc(sc, &rx_ring->desc[i], rx_data->paddr,
+ MCLBYTES, i);
+ }
+}
+
+static void
+rtwn_free_rx_list(struct rtwn_softc *sc)
+{
+ struct rtwn_rx_ring *rx_ring = &sc->rx_ring;
+ struct rtwn_rx_data *rx_data;
+ int i;
+
+ if (rx_ring->desc_dmat != NULL) {
+ if (rx_ring->desc != NULL) {
+ bus_dmamap_unload(rx_ring->desc_dmat,
+ rx_ring->desc_map);
+ bus_dmamem_free(rx_ring->desc_dmat, rx_ring->desc,
+ rx_ring->desc_map);
+ rx_ring->desc = NULL;
+ }
+ bus_dma_tag_destroy(rx_ring->desc_dmat);
+ rx_ring->desc_dmat = NULL;
+ }
+
+ for (i = 0; i < RTWN_RX_LIST_COUNT; i++) {
+ rx_data = &rx_ring->rx_data[i];
+
+ if (rx_data->m != NULL) {
+ bus_dmamap_unload(rx_ring->data_dmat, rx_data->map);
+ m_freem(rx_data->m);
+ rx_data->m = NULL;
+ }
+ bus_dmamap_destroy(rx_ring->data_dmat, rx_data->map);
+ rx_data->map = NULL;
+ }
+ if (rx_ring->data_dmat != NULL) {
+ bus_dma_tag_destroy(rx_ring->data_dmat);
+ rx_ring->data_dmat = NULL;
+ }
+}
+
+static int
+rtwn_alloc_tx_list(struct rtwn_softc *sc, int qid)
+{
+ struct rtwn_tx_ring *tx_ring = &sc->tx_ring[qid];
+ struct rtwn_tx_data *tx_data;
+ bus_size_t size;
+ int i, error;
+
+ size = sizeof(struct r92c_tx_desc) * RTWN_TX_LIST_COUNT;
+ error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), PAGE_SIZE, 0,
+ BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
+ size, 1, size, 0, NULL, NULL, &tx_ring->desc_dmat);
+ if (error != 0) {
+ device_printf(sc->sc_dev, "could not create tx ring DMA tag\n");
+ goto fail;
+ }
+
+ error = bus_dmamem_alloc(tx_ring->desc_dmat, (void **)&tx_ring->desc,
+ BUS_DMA_NOWAIT | BUS_DMA_ZERO, &tx_ring->desc_map);
+ if (error != 0) {
+ device_printf(sc->sc_dev, "can't map tx ring DMA memory\n");
+ goto fail;
+ }
+ error = bus_dmamap_load(tx_ring->desc_dmat, tx_ring->desc_map,
+ tx_ring->desc, size, rtwn_dma_map_addr, &tx_ring->paddr,
+ BUS_DMA_NOWAIT);
+ if (error != 0) {
+ device_printf(sc->sc_dev, "could not load desc DMA map\n");
+ goto fail;
+ }
+
+ error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
+ BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES,
+ 1, MCLBYTES, 0, NULL, NULL, &tx_ring->data_dmat);
+ if (error != 0) {
+ device_printf(sc->sc_dev, "could not create tx buf DMA tag\n");
+ goto fail;
+ }
+
+ for (i = 0; i < RTWN_TX_LIST_COUNT; i++) {
+ struct r92c_tx_desc *desc = &tx_ring->desc[i];
+
+ /* setup tx desc */
+ desc->nextdescaddr = htole32(tx_ring->paddr +
+ + sizeof(struct r92c_tx_desc)
+ * ((i + 1) % RTWN_TX_LIST_COUNT));
+ tx_data = &tx_ring->tx_data[i];
+ error = bus_dmamap_create(tx_ring->data_dmat, 0, &tx_data->map);
+ if (error != 0) {
+ device_printf(sc->sc_dev,
+ "could not create tx buf DMA map\n");
+ goto fail;
+ }
+ tx_data->m = NULL;
+ tx_data->ni = NULL;
+ }
+ return (0);
+
+fail:
+ rtwn_free_tx_list(sc, qid);
+ return (error);
+}
+
+static void
+rtwn_reset_tx_list(struct rtwn_softc *sc, int qid)
+{
+ struct rtwn_tx_ring *tx_ring = &sc->tx_ring[qid];
+ int i;
+
+ for (i = 0; i < RTWN_TX_LIST_COUNT; i++) {
+ struct r92c_tx_desc *desc = &tx_ring->desc[i];
+ struct rtwn_tx_data *tx_data = &tx_ring->tx_data[i];
+
+ memset(desc, 0, sizeof(*desc) -
+ (sizeof(desc->reserved) + sizeof(desc->nextdescaddr64) +
+ sizeof(desc->nextdescaddr)));
+
+ if (tx_data->m != NULL) {
+ bus_dmamap_unload(tx_ring->data_dmat, tx_data->map);
+ m_freem(tx_data->m);
+ tx_data->m = NULL;
+ }
+ if (tx_data->ni != NULL) {
+ ieee80211_free_node(tx_data->ni);
+ tx_data->ni = NULL;
+ }
+ }
+
+ bus_dmamap_sync(tx_ring->desc_dmat, tx_ring->desc_map,
+ BUS_DMASYNC_POSTWRITE);
+
+ sc->qfullmsk &= ~(1 << qid);
+ tx_ring->queued = 0;
+ tx_ring->cur = 0;
+}
+
+static void
+rtwn_free_tx_list(struct rtwn_softc *sc, int qid)
+{
+ struct rtwn_tx_ring *tx_ring = &sc->tx_ring[qid];
+ struct rtwn_tx_data *tx_data;
+ int i;
+
+ if (tx_ring->desc_dmat != NULL) {
+ if (tx_ring->desc != NULL) {
+ bus_dmamap_unload(tx_ring->desc_dmat,
+ tx_ring->desc_map);
+ bus_dmamem_free(tx_ring->desc_dmat, tx_ring->desc,
+ tx_ring->desc_map);
+ }
+ bus_dma_tag_destroy(tx_ring->desc_dmat);
+ }
+
+ for (i = 0; i < RTWN_TX_LIST_COUNT; i++) {
+ tx_data = &tx_ring->tx_data[i];
+
+ if (tx_data->m != NULL) {
+ bus_dmamap_unload(tx_ring->data_dmat, tx_data->map);
+ m_freem(tx_data->m);
+ tx_data->m = NULL;
+ }
+ }
+ if (tx_ring->data_dmat != NULL) {
+ bus_dma_tag_destroy(tx_ring->data_dmat);
+ tx_ring->data_dmat = NULL;
+ }
+
+ sc->qfullmsk &= ~(1 << qid);
+ tx_ring->queued = 0;
+ tx_ring->cur = 0;
+}
+
+
+static struct ieee80211vap *
+rtwn_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
+ enum ieee80211_opmode opmode, int flags,
+ const uint8_t bssid[IEEE80211_ADDR_LEN],
+ const uint8_t mac[IEEE80211_ADDR_LEN])
+{
+ struct rtwn_vap *rvp;
+ struct ieee80211vap *vap;
+
+ if (!TAILQ_EMPTY(&ic->ic_vaps))
+ return (NULL);
+
+ rvp = malloc(sizeof(struct rtwn_vap), M_80211_VAP, M_WAITOK | M_ZERO);
+ vap = &rvp->vap;
+ if (ieee80211_vap_setup(ic, vap, name, unit, opmode,
+ flags | IEEE80211_CLONE_NOBEACONS, bssid) != 0) {
+ /* out of memory */
+ free(rvp, M_80211_VAP);
+ return (NULL);
+ }
+
+ /* Override state transition machine. */
+ rvp->newstate = vap->iv_newstate;
+ vap->iv_newstate = rtwn_newstate;
+
+ /* Complete setup. */
+ ieee80211_vap_attach(vap, ieee80211_media_change,
+ ieee80211_media_status, mac);
+ ic->ic_opmode = opmode;
+ return (vap);
+}
+
+static void
+rtwn_vap_delete(struct ieee80211vap *vap)
+{
+ struct rtwn_vap *rvp = RTWN_VAP(vap);
+
+ ieee80211_vap_detach(vap);
+ free(rvp, M_80211_VAP);
+}
+
+static void
+rtwn_write_1(struct rtwn_softc *sc, uint16_t addr, uint8_t val)
+{
+
+ bus_space_write_1(sc->sc_st, sc->sc_sh, addr, val);
+}
+
+static void
+rtwn_write_2(struct rtwn_softc *sc, uint16_t addr, uint16_t val)
+{
+
+ val = htole16(val);
+ bus_space_write_2(sc->sc_st, sc->sc_sh, addr, val);
+}
+
+static void
+rtwn_write_4(struct rtwn_softc *sc, uint16_t addr, uint32_t val)
+{
+
+ val = htole32(val);
+ bus_space_write_4(sc->sc_st, sc->sc_sh, addr, val);
+}
+
+static uint8_t
+rtwn_read_1(struct rtwn_softc *sc, uint16_t addr)
+{
+
+ return (bus_space_read_1(sc->sc_st, sc->sc_sh, addr));
+}
+
+static uint16_t
+rtwn_read_2(struct rtwn_softc *sc, uint16_t addr)
+{
+
+ return (bus_space_read_2(sc->sc_st, sc->sc_sh, addr));
+}
+
+static uint32_t
+rtwn_read_4(struct rtwn_softc *sc, uint16_t addr)
+{
+
+ return (bus_space_read_4(sc->sc_st, sc->sc_sh, addr));
+}
+
+static int
+rtwn_fw_cmd(struct rtwn_softc *sc, uint8_t id, const void *buf, int len)
+{
+ struct r92c_fw_cmd cmd;
+ int ntries;
+
+ /* Wait for current FW box to be empty. */
+ for (ntries = 0; ntries < 100; ntries++) {
+ if (!(rtwn_read_1(sc, R92C_HMETFR) & (1 << sc->fwcur)))
+ break;
+ DELAY(1);
+ }
+ if (ntries == 100) {
+ device_printf(sc->sc_dev,
+ "could not send firmware command %d\n", id);
+ return (ETIMEDOUT);
+ }
+ memset(&cmd, 0, sizeof(cmd));
+ cmd.id = id;
+ if (len > 3)
+ cmd.id |= R92C_CMD_FLAG_EXT;
+ KASSERT(len <= sizeof(cmd.msg), ("rtwn_fw_cmd\n"));
+ memcpy(cmd.msg, buf, len);
+
+ /* Write the first word last since that will trigger the FW. */
+ rtwn_write_2(sc, R92C_HMEBOX_EXT(sc->fwcur), *((uint8_t *)&cmd + 4));
+ rtwn_write_4(sc, R92C_HMEBOX(sc->fwcur), *((uint8_t *)&cmd + 0));
+
+ sc->fwcur = (sc->fwcur + 1) % R92C_H2C_NBOX;
+
+ /* Give firmware some time for processing. */
+ DELAY(2000);
+
+ return (0);
+}
+
+static void
+rtwn_rf_write(struct rtwn_softc *sc, int chain, uint8_t addr, uint32_t val)
+{
+ rtwn_bb_write(sc, R92C_LSSI_PARAM(chain),
+ SM(R92C_LSSI_PARAM_ADDR, addr) |
+ SM(R92C_LSSI_PARAM_DATA, val));
+}
+
+static uint32_t
+rtwn_rf_read(struct rtwn_softc *sc, int chain, uint8_t addr)
+{
+ uint32_t reg[R92C_MAX_CHAINS], val;
+
+ reg[0] = rtwn_bb_read(sc, R92C_HSSI_PARAM2(0));
+ if (chain != 0)
+ reg[chain] = rtwn_bb_read(sc, R92C_HSSI_PARAM2(chain));
+
+ rtwn_bb_write(sc, R92C_HSSI_PARAM2(0),
+ reg[0] & ~R92C_HSSI_PARAM2_READ_EDGE);
+ DELAY(1000);
+
+ rtwn_bb_write(sc, R92C_HSSI_PARAM2(chain),
+ RW(reg[chain], R92C_HSSI_PARAM2_READ_ADDR, addr) |
+ R92C_HSSI_PARAM2_READ_EDGE);
+ DELAY(1000);
+
+ rtwn_bb_write(sc, R92C_HSSI_PARAM2(0),
+ reg[0] | R92C_HSSI_PARAM2_READ_EDGE);
+ DELAY(1000);
+
+ if (rtwn_bb_read(sc, R92C_HSSI_PARAM1(chain)) & R92C_HSSI_PARAM1_PI)
+ val = rtwn_bb_read(sc, R92C_HSPI_READBACK(chain));
+ else
+ val = rtwn_bb_read(sc, R92C_LSSI_READBACK(chain));
+ return (MS(val, R92C_LSSI_READBACK_DATA));
+}
+
+static int
+rtwn_llt_write(struct rtwn_softc *sc, uint32_t addr, uint32_t data)
+{
+ int ntries;
+
+ rtwn_write_4(sc, R92C_LLT_INIT,
+ SM(R92C_LLT_INIT_OP, R92C_LLT_INIT_OP_WRITE) |
+ SM(R92C_LLT_INIT_ADDR, addr) |
+ SM(R92C_LLT_INIT_DATA, data));
+ /* Wait for write operation to complete. */
+ for (ntries = 0; ntries < 20; ntries++) {
+ if (MS(rtwn_read_4(sc, R92C_LLT_INIT), R92C_LLT_INIT_OP) ==
+ R92C_LLT_INIT_OP_NO_ACTIVE)
+ return (0);
+ DELAY(5);
+ }
+ return (ETIMEDOUT);
+}
+
+static uint8_t
+rtwn_efuse_read_1(struct rtwn_softc *sc, uint16_t addr)
+{
+ uint32_t reg;
+ int ntries;
+
+ reg = rtwn_read_4(sc, R92C_EFUSE_CTRL);
+ reg = RW(reg, R92C_EFUSE_CTRL_ADDR, addr);
+ reg &= ~R92C_EFUSE_CTRL_VALID;
+ rtwn_write_4(sc, R92C_EFUSE_CTRL, reg);
+ /* Wait for read operation to complete. */
+ for (ntries = 0; ntries < 100; ntries++) {
+ reg = rtwn_read_4(sc, R92C_EFUSE_CTRL);
+ if (reg & R92C_EFUSE_CTRL_VALID)
+ return (MS(reg, R92C_EFUSE_CTRL_DATA));
+ DELAY(5);
+ }
+ device_printf(sc->sc_dev,
+ "could not read efuse byte at address 0x%x\n", addr);
+ return (0xff);
+}
+
+static void
+rtwn_efuse_read(struct rtwn_softc *sc)
+{
+ uint8_t *rom = (uint8_t *)&sc->rom;
+ uint16_t addr = 0;
+ uint32_t reg;
+ uint8_t off, msk;
+ int i;
+
+ reg = rtwn_read_2(sc, R92C_SYS_ISO_CTRL);
+ if (!(reg & R92C_SYS_ISO_CTRL_PWC_EV12V)) {
+ rtwn_write_2(sc, R92C_SYS_ISO_CTRL,
+ reg | R92C_SYS_ISO_CTRL_PWC_EV12V);
+ }
+ reg = rtwn_read_2(sc, R92C_SYS_FUNC_EN);
+ if (!(reg & R92C_SYS_FUNC_EN_ELDR)) {
+ rtwn_write_2(sc, R92C_SYS_FUNC_EN,
+ reg | R92C_SYS_FUNC_EN_ELDR);
+ }
+ reg = rtwn_read_2(sc, R92C_SYS_CLKR);
+ if ((reg & (R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M)) !=
+ (R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M)) {
+ rtwn_write_2(sc, R92C_SYS_CLKR,
+ reg | R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M);
+ }
+ memset(&sc->rom, 0xff, sizeof(sc->rom));
+ while (addr < 512) {
+ reg = rtwn_efuse_read_1(sc, addr);
+ if (reg == 0xff)
+ break;
+ addr++;
+ off = reg >> 4;
+ msk = reg & 0xf;
+ for (i = 0; i < 4; i++) {
+ if (msk & (1 << i))
+ continue;
+ rom[off * 8 + i * 2 + 0] =
+ rtwn_efuse_read_1(sc, addr);
+ addr++;
+ rom[off * 8 + i * 2 + 1] =
+ rtwn_efuse_read_1(sc, addr);
+ addr++;
+ }
+ }
+#ifdef RTWN_DEBUG
+ if (sc->sc_debug >= 2) {
+ /* Dump ROM content. */
+ printf("\n");
+ for (i = 0; i < sizeof(sc->rom); i++)
+ printf("%02x:", rom[i]);
+ printf("\n");
+ }
+#endif
*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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