svn commit: r281871 - head/sys/dev/pci

John Baldwin jhb at FreeBSD.org
Wed Apr 22 21:42:00 UTC 2015


Author: jhb
Date: Wed Apr 22 21:41:59 2015
New Revision: 281871
URL: https://svnweb.freebsd.org/changeset/base/281871

Log:
  The minimim grant and maximum latency PCI config registers are only valid
  for type 0 devices, not type 1 or 2 bridges.  Don't read them for bridge
  devices during bus scans and return an error when attempting to read them
  as ivars for bridge devices.

Modified:
  head/sys/dev/pci/pci.c

Modified: head/sys/dev/pci/pci.c
==============================================================================
--- head/sys/dev/pci/pci.c	Wed Apr 22 21:38:21 2015	(r281870)
+++ head/sys/dev/pci/pci.c	Wed Apr 22 21:41:59 2015	(r281871)
@@ -583,6 +583,8 @@ pci_hdrtypedata(device_t pcib, int b, in
 	case PCIM_HDRTYPE_NORMAL:
 		cfg->subvendor      = REG(PCIR_SUBVEND_0, 2);
 		cfg->subdevice      = REG(PCIR_SUBDEV_0, 2);
+		cfg->mingnt         = REG(PCIR_MINGNT, 1);
+		cfg->maxlat         = REG(PCIR_MAXLAT, 1);
 		cfg->nummaps	    = PCI_MAXMAPS_0;
 		break;
 	case PCIM_HDRTYPE_BRIDGE:
@@ -641,9 +643,6 @@ pci_fill_devinfo(device_t pcib, int d, i
 	cfg->intpin		= REG(PCIR_INTPIN, 1);
 	cfg->intline		= REG(PCIR_INTLINE, 1);
 
-	cfg->mingnt		= REG(PCIR_MINGNT, 1);
-	cfg->maxlat		= REG(PCIR_MAXLAT, 1);
-
 	cfg->mfdev		= (cfg->hdrtype & PCIM_MFDEV) != 0;
 	cfg->hdrtype		&= ~PCIM_MFDEV;
 	STAILQ_INIT(&cfg->maps);
@@ -4425,9 +4424,17 @@ pci_read_ivar(device_t dev, device_t chi
 		*result = cfg->cachelnsz;
 		break;
 	case PCI_IVAR_MINGNT:
+		if (cfg->hdrtype != PCIM_HDRTYPE_NORMAL) {
+			*result = -1;
+			return (EINVAL);
+		}
 		*result = cfg->mingnt;
 		break;
 	case PCI_IVAR_MAXLAT:
+		if (cfg->hdrtype != PCIM_HDRTYPE_NORMAL) {
+			*result = -1;
+			return (EINVAL);
+		}
 		*result = cfg->maxlat;
 		break;
 	case PCI_IVAR_LATTIMER:


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