svn commit: r266765 - in head/sys/amd64/vmm: . intel

John Baldwin jhb at
Tue May 27 20:19:48 UTC 2014

On Tuesday, May 27, 2014 3:04:38 pm John Baldwin wrote:
> Author: jhb
> Date: Tue May 27 19:04:38 2014
> New Revision: 266765
> URL:
> Log:
>   - Rework the XSAVE/XRSTOR emulation to only expose XCR0 features to the
>     guest for which the rules regarding xsetbv emulation are known.  In
>     particular future extensions like AVX-512 have interdependencies among
>     feature bits that could allow a guest to trigger a GP# in the host with
>     the current approach of allowing anything the host supports.
>   - Add proper checking of Intel MPX and AVX-512 XSAVE features in the
>     xsetbv emulation and allow these features to be exposed to the guest if
>     they are enabled in the host.
>   - Expose a subset of known-safe features from leaf 0 of the structured
>     extended features to guests if they are supported on the host including
>     RDFSBASE/RDGSBASE, BMI1/2, AVX2, AVX-512, HLE, ERMS, and RTM.  Aside
>     from AVX-512, these features are all new instructions available for use
>     in ring 3 with no additional hypervisor changes needed.
>   Reviewed by:	neel

Unfortunately there is no production silicon with either AVX-512 or MPX that
runs FreeBSD AFAIK, so I haven't been able to test that this works correctly
for those features.  Using plain AVX in a guest still works ok though.

John Baldwin

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