svn commit: r262891 - in head/sys: arm/freescale/vybrid boot/fdt/dts/arm
Ruslan Bukin
br at FreeBSD.org
Fri Mar 7 16:14:52 UTC 2014
Author: br
Date: Fri Mar 7 16:14:51 2014
New Revision: 262891
URL: http://svnweb.freebsd.org/changeset/base/262891
Log:
- Export panel info to DTS
- Reset all the layers before setup first one
- Enable display
Modified:
head/sys/arm/freescale/vybrid/vf_dcu4.c
head/sys/boot/fdt/dts/arm/vybrid-quartz.dts
Modified: head/sys/arm/freescale/vybrid/vf_dcu4.c
==============================================================================
--- head/sys/arm/freescale/vybrid/vf_dcu4.c Fri Mar 7 15:35:54 2014 (r262890)
+++ head/sys/arm/freescale/vybrid/vf_dcu4.c Fri Mar 7 16:14:51 2014 (r262891)
@@ -45,6 +45,7 @@ __FBSDID("$FreeBSD$");
#include <sys/fbio.h>
#include <sys/consio.h>
#include <sys/eventhandler.h>
+#include <sys/gpio.h>
#include <dev/fdt/fdt_common.h>
#include <dev/ofw/openfirm.h>
@@ -54,6 +55,8 @@ __FBSDID("$FreeBSD$");
#include <dev/vt/vt.h>
#include <dev/vt/colors/vt_termcolors.h>
+#include "gpio_if.h"
+
#include <machine/bus.h>
#include <machine/fdt.h>
#include <machine/cpu.h>
@@ -74,6 +77,9 @@ __FBSDID("$FreeBSD$");
#define DCU_MODE_TEST 0x2
#define DCU_MODE_COLBAR 0x3
#define RASTER_EN (1 << 14) /* Raster scan of pixel data */
+#define PDI_EN (1 << 13)
+#define PDI_DE_MODE (1 << 11)
+#define PDI_MODE_M 2
#define DCU_BGND 0x014 /* Background */
#define DCU_DISP_SIZE 0x018 /* Display Size */
#define DELTA_M 0x7ff
@@ -90,6 +96,9 @@ __FBSDID("$FreeBSD$");
#define DCU_SYNPOL 0x024 /* Synchronize Polarity */
#define INV_HS (1 << 0)
#define INV_VS (1 << 1)
+#define INV_PDI_VS (1 << 8) /* Polarity of PDI input VSYNC. */
+#define INV_PDI_HS (1 << 9) /* Polarity of PDI input HSYNC. */
+#define INV_PDI_DE (1 << 10) /* Polarity of PDI input DE. */
#define DCU_THRESHOLD 0x028 /* Threshold */
#define LS_BF_VS_SHIFT 16
#define OUT_BUF_HIGH_SHIFT 8
@@ -160,8 +169,20 @@ __FBSDID("$FreeBSD$");
#define DCU_CTRLDESCLn_8(n) DCU_CTRLDESCL(n, 8)
#define DCU_CTRLDESCLn_9(n) DCU_CTRLDESCL(n, 9)
-#define DISPLAY_WIDTH 480
-#define DISPLAY_HEIGHT 272
+#define NUM_LAYERS 64
+
+struct panel_info {
+ uint32_t width;
+ uint32_t height;
+ uint32_t h_back_porch;
+ uint32_t h_pulse_width;
+ uint32_t h_front_porch;
+ uint32_t v_back_porch;
+ uint32_t v_pulse_width;
+ uint32_t v_front_porch;
+ uint32_t clk_div;
+ uint32_t backlight_pin;
+};
struct dcu_softc {
struct resource *res[2];
@@ -171,6 +192,7 @@ struct dcu_softc {
device_t dev;
device_t sc_fbd; /* fbd child */
struct fb_info sc_info;
+ struct panel_info *panel;
};
static struct resource_spec dcu_spec[] = {
@@ -209,33 +231,84 @@ dcu_intr(void *arg)
}
static int
+get_panel_info(struct dcu_softc *sc, struct panel_info *panel)
+{
+ phandle_t node;
+ pcell_t dts_value[3];
+ int len;
+
+ if ((node = ofw_bus_get_node(sc->dev)) == -1)
+ return (ENXIO);
+
+ /* panel size */
+ if ((len = OF_getproplen(node, "panel-size")) <= 0)
+ return (ENXIO);
+ OF_getprop(node, "panel-size", &dts_value, len);
+ panel->width = fdt32_to_cpu(dts_value[0]);
+ panel->height = fdt32_to_cpu(dts_value[1]);
+
+ /* hsync */
+ if ((len = OF_getproplen(node, "panel-hsync")) <= 0)
+ return (ENXIO);
+ OF_getprop(node, "panel-hsync", &dts_value, len);
+ panel->h_back_porch = fdt32_to_cpu(dts_value[0]);
+ panel->h_pulse_width = fdt32_to_cpu(dts_value[1]);
+ panel->h_front_porch = fdt32_to_cpu(dts_value[2]);
+
+ /* vsync */
+ if ((len = OF_getproplen(node, "panel-vsync")) <= 0)
+ return (ENXIO);
+ OF_getprop(node, "panel-vsync", &dts_value, len);
+ panel->v_back_porch = fdt32_to_cpu(dts_value[0]);
+ panel->v_pulse_width = fdt32_to_cpu(dts_value[1]);
+ panel->v_front_porch = fdt32_to_cpu(dts_value[2]);
+
+ /* clk divider */
+ if ((len = OF_getproplen(node, "panel-clk-div")) <= 0)
+ return (ENXIO);
+ OF_getprop(node, "panel-clk-div", &dts_value, len);
+ panel->clk_div = fdt32_to_cpu(dts_value[0]);
+
+ /* backlight pin */
+ if ((len = OF_getproplen(node, "panel-backlight-pin")) <= 0)
+ return (ENXIO);
+ OF_getprop(node, "panel-backlight-pin", &dts_value, len);
+ panel->backlight_pin = fdt32_to_cpu(dts_value[0]);
+
+ return (0);
+}
+
+static int
dcu_init(struct dcu_softc *sc)
{
+ struct panel_info *panel;
int reg;
+ int i;
+
+ panel = sc->panel;
/* Configure DCU */
reg = ((sc->sc_info.fb_height) << DELTA_Y_S);
reg |= (sc->sc_info.fb_width / 16);
WRITE4(sc, DCU_DISP_SIZE, reg);
- /* TODO: export panel info to FDT */
-
- reg = (2 << BP_H_SHIFT);
- reg |= (41 << PW_H_SHIFT);
- reg |= (2 << FP_H_SHIFT);
+ reg = (panel->h_back_porch << BP_H_SHIFT);
+ reg |= (panel->h_pulse_width << PW_H_SHIFT);
+ reg |= (panel->h_front_porch << FP_H_SHIFT);
WRITE4(sc, DCU_HSYN_PARA, reg);
- reg = (2 << BP_V_SHIFT);
- reg |= (10 << PW_V_SHIFT);
- reg |= (2 << FP_V_SHIFT);
+ reg = (panel->v_back_porch << BP_V_SHIFT);
+ reg |= (panel->v_pulse_width << PW_V_SHIFT);
+ reg |= (panel->v_front_porch << FP_V_SHIFT);
WRITE4(sc, DCU_VSYN_PARA, reg);
WRITE4(sc, DCU_BGND, 0);
- WRITE4(sc, DCU_DIV_RATIO, 30);
+ WRITE4(sc, DCU_DIV_RATIO, panel->clk_div);
reg = (INV_VS | INV_HS);
WRITE4(sc, DCU_SYNPOL, reg);
+ /* TODO: export to panel info */
reg = (0x3 << LS_BF_VS_SHIFT);
reg |= (0x78 << OUT_BUF_HIGH_SHIFT);
reg |= (0 << OUT_BUF_LOW_SHIFT);
@@ -244,6 +317,19 @@ dcu_init(struct dcu_softc *sc)
/* Mask all the interrupts */
WRITE4(sc, DCU_INT_MASK, 0xffffffff);
+ /* Reset all layers */
+ for (i = 0; i < NUM_LAYERS; i++) {
+ WRITE4(sc, DCU_CTRLDESCLn_1(i), 0x0);
+ WRITE4(sc, DCU_CTRLDESCLn_2(i), 0x0);
+ WRITE4(sc, DCU_CTRLDESCLn_3(i), 0x0);
+ WRITE4(sc, DCU_CTRLDESCLn_4(i), 0x0);
+ WRITE4(sc, DCU_CTRLDESCLn_5(i), 0x0);
+ WRITE4(sc, DCU_CTRLDESCLn_6(i), 0x0);
+ WRITE4(sc, DCU_CTRLDESCLn_7(i), 0x0);
+ WRITE4(sc, DCU_CTRLDESCLn_8(i), 0x0);
+ WRITE4(sc, DCU_CTRLDESCLn_9(i), 0x0);
+ }
+
/* Setup first layer */
reg = (sc->sc_info.fb_width | (sc->sc_info.fb_height << 16));
WRITE4(sc, DCU_CTRLDESCLn_1(0), reg);
@@ -273,10 +359,13 @@ dcu_init(struct dcu_softc *sc)
static int
dcu_attach(device_t dev)
{
+ struct panel_info panel;
struct dcu_softc *sc;
+ device_t gpio_dev;
int err;
sc = device_get_softc(dev);
+ sc->dev = dev;
if (bus_alloc_resources(dev, dcu_spec, sc->res)) {
device_printf(dev, "could not allocate resources\n");
@@ -295,11 +384,30 @@ dcu_attach(device_t dev)
return (ENXIO);
}
+ if (get_panel_info(sc, &panel)) {
+ device_printf(dev, "Can't get panel info\n");
+ return (ENXIO);
+ }
+
+ sc->panel = &panel;
+
/* Bypass timing control (used for raw lcd panels) */
tcon_bypass();
- sc->sc_info.fb_width = DISPLAY_WIDTH;
- sc->sc_info.fb_height = DISPLAY_HEIGHT;
+ /* Get the GPIO device, we need this to give power to USB */
+ gpio_dev = devclass_get_device(devclass_find("gpio"), 0);
+ if (gpio_dev == NULL) {
+ device_printf(sc->dev, "Error: failed to get the GPIO dev\n");
+ return (1);
+ }
+
+ /* Turn on backlight */
+ /* TODO: Use FlexTimer/PWM */
+ GPIO_PIN_SETFLAGS(gpio_dev, panel.backlight_pin, GPIO_PIN_OUTPUT);
+ GPIO_PIN_SET(gpio_dev, panel.backlight_pin, GPIO_PIN_HIGH);
+
+ sc->sc_info.fb_width = panel.width;
+ sc->sc_info.fb_height = panel.height;
sc->sc_info.fb_stride = sc->sc_info.fb_width * 3;
sc->sc_info.fb_bpp = sc->sc_info.fb_depth = 24;
sc->sc_info.fb_size = sc->sc_info.fb_height * sc->sc_info.fb_stride;
Modified: head/sys/boot/fdt/dts/arm/vybrid-quartz.dts
==============================================================================
--- head/sys/boot/fdt/dts/arm/vybrid-quartz.dts Fri Mar 7 15:35:54 2014 (r262890)
+++ head/sys/boot/fdt/dts/arm/vybrid-quartz.dts Fri Mar 7 16:14:51 2014 (r262891)
@@ -60,6 +60,51 @@
edma1: edma at 40098000 {
status = "okay";
};
+
+ dcu0: dcu4 at 40058000 {
+ status = "okay";
+
+ panel-size = < 800 480 >;
+ panel-hsync = < 40 48 40 >;
+ panel-vsync = < 29 3 13 >;
+ panel-clk-div = < 17 >;
+ panel-backlight-pin = < 25 >;
+
+ iomux_config = < 105 0x1001c4 /* hsync */
+ 106 0x1001c4 /* vsync */
+ 107 0x1001e0 /* pclk */
+ 108 0x1001e0
+ 109 0x1001be /* de */
+ 110 0x1001e0 /* r0 */
+ 111 0x1001e0
+ 112 0x1001e0
+ 113 0x1001e0
+ 114 0x1001e0
+ 115 0x1001e0
+ 116 0x1001e0
+ 117 0x1001e0
+ 118 0x1001e0 /* g0 */
+ 119 0x1001e0
+ 120 0x1001e0
+ 121 0x1001e0
+ 122 0x1001e0
+ 123 0x1001e0
+ 124 0x1001e0
+ 125 0x1001e0
+ 126 0x1001e0 /* b0 */
+ 127 0x1001e0
+ 128 0x1001e0
+ 129 0x1001e0
+ 130 0x1001e0
+ 131 0x1001e0
+ 132 0x1001e0
+ 133 0x1001e0
+ 25 0x0001be >; /* led */
+ };
+
+ tcon0: tcon at 4003D000 {
+ status = "okay";
+ };
};
chosen {
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