svn commit: r262531 - head/sys/arm/freescale/imx

[Ian Lepore]

Author: ian
Date: Wed Feb 26 18:29:14 2014
New Revision: 262531
URL: http://svnweb.freebsd.org/changeset/base/262531

Log:
  Minor tweaks to the imx GPT timer...
   - Don't use spaces or dots in the eventtimer or timecounter names.
     They turn into sysctl node names, and it's just confusing.
   - Use comparator #3 instead of #1 for one-shot events.  There's an
     extra 1-cycle penalty in the hardware for accessing the registers
     for comparator 1, no point in paying that penalty.
   - Lower the quality of the eventtimer from 1000 to 800, because the
     device can't support PERCPU timers and some other device in the system
     may be able to provide that.

Modified:
  head/sys/arm/freescale/imx/imx_gpt.c

Modified: head/sys/arm/freescale/imx/imx_gpt.c
==============================================================================
--- head/sys/arm/freescale/imx/imx_gpt.c	Wed Feb 26 17:14:02 2014	(r262530)
+++ head/sys/arm/freescale/imx/imx_gpt.c	Wed Feb 26 18:29:14 2014	(r262531)
@@ -75,7 +75,7 @@ static int imx_gpt_probe(device_t);
 static int imx_gpt_attach(device_t);
 
 static struct timecounter imx_gpt_timecounter = {
-	.tc_name           = "i.MX GPT Timecounter",
+	.tc_name           = "iMXGPT",
 	.tc_get_timecount  = imx_gpt_get_timecount,
 	.tc_counter_mask   = ~0u,
 	.tc_frequency      = 0,
@@ -244,9 +244,9 @@ imx_gpt_attach(device_t dev)
 	}
 
 	/* Register as an eventtimer. */
-	sc->et.et_name = "i.MXxxx GPT Eventtimer";
+	sc->et.et_name = "iMXGPT";
 	sc->et.et_flags = ET_FLAGS_ONESHOT | ET_FLAGS_PERIODIC;
-	sc->et.et_quality = 1000;
+	sc->et.et_quality = 800;
 	sc->et.et_frequency = sc->clkfreq;
 	sc->et.et_min_period = (MIN_ET_PERIOD << 32) / sc->et.et_frequency;
 	sc->et.et_max_period = (0xfffffffeLLU << 32) / sc->et.et_frequency;
@@ -286,9 +286,9 @@ imx_gpt_timer_start(struct eventtimer *e
 		/* Do not disturb, otherwise event will be lost */
 		spinlock_enter();
 		/* Set expected value */
-		WRITE4(sc, IMX_GPT_OCR1, READ4(sc, IMX_GPT_CNT) + ticks);
+		WRITE4(sc, IMX_GPT_OCR3, READ4(sc, IMX_GPT_CNT) + ticks);
 		/* Enable compare register 1 Interrupt */
-		SET4(sc, IMX_GPT_IR, GPT_IR_OF1);
+		SET4(sc, IMX_GPT_IR, GPT_IR_OF3);
 		/* Now everybody can relax */
 		spinlock_exit();
 		return (0);
@@ -349,7 +349,7 @@ imx_gpt_intr(void *arg)
 	WRITE4(sc, IMX_GPT_SR, status);
 
 	/* Handle one-shot timer events. */
-	if (status & GPT_IR_OF1) {
+	if (status & GPT_IR_OF3) {
 		if (sc->et.et_active) {
 			sc->et.et_event_cb(&sc->et, sc->et.et_arg);
 		}