svn commit: r261871 - head/sys/mips/conf

[Adrian Chadd]

Author: adrian
Date: Fri Feb 14 05:25:15 2014
New Revision: 261871
URL: http://svnweb.freebsd.org/changeset/base/261871

Log:
  Enable use of the PCIe connected wifi on the DB120 (AR9344) board.
  
  The on-board NIC is an 3x3 AR9380 with 5GHz only.
  
  * enable pci code in AR9344_BASE
  * enable ath_pci and the firmware loading bits in DB120
  * add in the relevant hints in DB120.hints to inform the probe/attach
    code where the PCIe fixup data is for the onboard chip.
  
  This is only relevant for a default development board.  I also have a
  DB120 with the on-board PCIe wifi NIC disabled and it's exposed as
  a real PCIe slot (to put normal PCIe NICs in); the fixup code will need
  to be disabled to make this work correctly.
  
  Tested:
  
  * DB120

Modified:
  head/sys/mips/conf/AR934X_BASE
  head/sys/mips/conf/AR934X_BASE.hints
  head/sys/mips/conf/DB120
  head/sys/mips/conf/DB120.hints

Modified: head/sys/mips/conf/AR934X_BASE
==============================================================================
--- head/sys/mips/conf/AR934X_BASE	Fri Feb 14 05:22:28 2014	(r261870)
+++ head/sys/mips/conf/AR934X_BASE	Fri Feb 14 05:25:15 2014	(r261871)
@@ -102,6 +102,9 @@ options		USB_DEBUG
 options		USB_HOST_ALIGN=32		# AR71XX (MIPS in general?) requires this
 device		ehci
 
+device		pci
+device		ar724x_pci
+
 device		scbus
 device		umass
 device		da

Modified: head/sys/mips/conf/AR934X_BASE.hints
==============================================================================
--- head/sys/mips/conf/AR934X_BASE.hints	Fri Feb 14 05:22:28 2014	(r261870)
+++ head/sys/mips/conf/AR934X_BASE.hints	Fri Feb 14 05:25:15 2014	(r261871)
@@ -22,6 +22,10 @@ hint.ehci.0.maddr=0x1b000100
 hint.ehci.0.msize=0x00001000
 hint.ehci.0.irq=1
 
+# pci
+hint.pcib.0.at="nexus0"
+hint.pcib.0.irq=0
+
 hint.arge.0.at="nexus0"
 hint.arge.0.maddr=0x19000000
 hint.arge.0.msize=0x1000

Modified: head/sys/mips/conf/DB120
==============================================================================
--- head/sys/mips/conf/DB120	Fri Feb 14 05:22:28 2014	(r261870)
+++ head/sys/mips/conf/DB120	Fri Feb 14 05:25:15 2014	(r261871)
@@ -42,5 +42,11 @@ options 	GEOM_UNCOMPRESS
 # Used for the static uboot partition map
 device          geom_map
 
+# yes, this board has a PCI connected atheros device
+device		ath_pci
+options		AR71XX_ATH_EEPROM
+device		firmware		# Used by the above
+options		ATH_EEPROM_FIRMWARE
+
 # Boot off of the rootfs, as defined in the geom_map setup.
 options		ROOTDEVNAME=\"ufs:map/rootfs.uncompress\"

Modified: head/sys/mips/conf/DB120.hints
==============================================================================
--- head/sys/mips/conf/DB120.hints	Fri Feb 14 05:22:28 2014	(r261870)
+++ head/sys/mips/conf/DB120.hints	Fri Feb 14 05:25:15 2014	(r261871)
@@ -60,6 +60,13 @@ hint.ath.0.eepromsize=16384
 # host registers on the NIC) and then we teach ath where
 # to find it.
 
+# ath1 hint - pcie slot 0
+hint.pcib.0.bus.0.0.0.ath_fixup_addr=0x1fff4000
+hint.pcib.0.bus.0.0.0.ath_fixup_size=16384
+
+# ath0 - eeprom comes from here
+hint.ath.1.eeprom_firmware="pcib.0.bus.0.0.0.eeprom_firmware"
+
 # flash layout:
 #
 # bootargs=console=ttyS0,115200 root=31:02 rootfstype=jffs2 init=/sbin/init mtdparts=ath-nor0:256k(u-boot),64k(u-boot-env),6336k(rootfs),1408k(uImage),64k(mib0),64k(ART)