svn commit: r275417 - head/sys/arm/arm

[Andrew Turner]

Author: andrew
Date: Tue Dec  2 18:35:34 2014
New Revision: 275417
URL: https://svnweb.freebsd.org/changeset/base/275417

Log:
  Use the APSR_nzcv format of mrc. The clang integrated assembler doesn't
  support the old usage of r15.
  
  Sponsored by:	ABT Systems Ltd

Modified:
  head/sys/arm/arm/cpufunc_asm_armv5_ec.S
  head/sys/arm/arm/cpufunc_asm_sheeva.S

Modified: head/sys/arm/arm/cpufunc_asm_armv5_ec.S
==============================================================================
--- head/sys/arm/arm/cpufunc_asm_armv5_ec.S	Tue Dec  2 18:20:53 2014	(r275416)
+++ head/sys/arm/arm/cpufunc_asm_armv5_ec.S	Tue Dec  2 18:35:34 2014	(r275417)
@@ -58,7 +58,7 @@ ENTRY(armv5_ec_setttb)
 	 * do it directly and entirely avoid the problem.
 	 */
 	mcr	p15, 0, r0, c7, c5, 0	/* Invalidate ICache */
-1:	mrc	p15, 0, r15, c7, c14, 3	/* Test, clean and invalidate DCache */
+1:	mrc	p15, 0, APSR_nzcv, c7, c14, 3	/* Test, clean and invalidate DCache */
 	bne	1b			/* More to do? */
 	mcr	p15, 0, r0, c7, c10, 4	/* drain the write buffer */
 
@@ -105,7 +105,7 @@ ENTRY_NP(armv5_ec_icache_sync_all)
 
 .Larmv5_ec_dcache_wb:
 1:
-	mrc	p15, 0, r15, c7, c10, 3	/* Test and clean (don't invalidate) */
+	mrc	p15, 0, APSR_nzcv, c7, c10, 3	/* Test and clean (don't invalidate) */
 	bne	1b			/* More to do? */
 	mcr	p15, 0, r0, c7, c10, 4	/* drain the write buffer */
 	RET
@@ -208,7 +208,7 @@ END(armv5_ec_idcache_wbinv_all)
 
 ENTRY(armv5_ec_dcache_wbinv_all)
 .Larmv5_ec_dcache_wbinv_all:
-1:	mrc	p15, 0, r15, c7, c14, 3	/* Test, clean and invalidate DCache */
+1:	mrc	p15, 0, APSR_nzcv, c7, c14, 3	/* Test, clean and invalidate DCache */
 	bne	1b			/* More to do? */
 	mcr	p15, 0, r0, c7, c10, 4	/* drain the write buffer */
 	RET

Modified: head/sys/arm/arm/cpufunc_asm_sheeva.S
==============================================================================
--- head/sys/arm/arm/cpufunc_asm_sheeva.S	Tue Dec  2 18:20:53 2014	(r275416)
+++ head/sys/arm/arm/cpufunc_asm_sheeva.S	Tue Dec  2 18:35:34 2014	(r275417)
@@ -48,7 +48,7 @@ ENTRY(sheeva_setttb)
 
 	mov	r1, #0
 	mcr	p15, 0, r1, c7, c5, 0	/* Invalidate ICache */
-1:	mrc	p15, 0, r15, c7, c14, 3	/* Test, clean and invalidate DCache */
+1:	mrc	p15, 0, APSR_nzcv, c7, c14, 3	/* Test, clean and invalidate DCache */
 	bne	1b			/* More to do? */
 
 	mcr	p15, 1, r1, c15, c9, 0	/* Clean L2 */