svn commit: r256649 - head/sys/mips/atheros

[Adrian Chadd]

Author: adrian
Date: Wed Oct 16 19:53:50 2013
New Revision: 256649
URL: http://svnweb.freebsd.org/changeset/base/256649

Log:
  Whilst here, document that this TX alignment requirement may acutally
  not be required on later hardware.
  
  It would allow for higher packet rates so yes, it would be nice
  to disable it.

Modified:
  head/sys/mips/atheros/if_arge.c

Modified: head/sys/mips/atheros/if_arge.c
==============================================================================
--- head/sys/mips/atheros/if_arge.c	Wed Oct 16 19:36:50 2013	(r256648)
+++ head/sys/mips/atheros/if_arge.c	Wed Oct 16 19:53:50 2013	(r256649)
@@ -1261,6 +1261,10 @@ arge_init_locked(struct arge_softc *sc)
  * The TX engine requires each fragment to be aligned to a
  * 4 byte boundary and the size of each fragment except
  * the last to be a multiple of 4 bytes.
+ *
+ * XXX TODO: I believe this is only a bug on the AR71xx and
+ * AR913x MACs. The later MACs (AR724x and later) does not
+ * need this workaround.
  */
 static int
 arge_mbuf_chain_is_tx_aligned(struct mbuf *m0)
@@ -1294,6 +1298,10 @@ arge_encap(struct arge_softc *sc, struct
 	/*
 	 * Fix mbuf chain, all fragments should be 4 bytes aligned and
 	 * even 4 bytes
+	 *
+	 * XXX TODO: I believe this is only a bug on the AR71xx and
+	 * AR913x MACs. The later MACs (AR724x and later) does not
+	 * need this workaround.
 	 */
 	m = *m_head;
 	if (! arge_mbuf_chain_is_tx_aligned(m)) {