svn commit: r245335 - head/sys/dev/fdt

[Robert Watson]

Author: rwatson
Date: Sat Jan 12 16:09:33 2013
New Revision: 245335
URL: http://svnweb.freebsd.org/changeset/base/245335

Log:
  Merge Perforce changeset 219933 and portions of 219962 (omits changes to
  unmerged BERI DTS files) to head:
  
    Use the OFW compatible string "mips,mips4k" rather than
    "mips4k,cp0" for interrupt control using MIPS4k CP0.
  
    Suggested by:   thompsa
  
    Implement a MIPS FDT PIC decode routine to use when no PIC has been
    configured, which assumes a cascade back to the nexus bus (e.g.,
    the on-board CP0 interrupt management parts on the MIPS).  If the
    soc bus in a MIPS DTS file is declared as "mips4k,cp0"-compatible,
    then this will be enabled.  This is sufficient to allow IRQs to be
    configured on BERI.
  
  Sponsored by:	DARPA, AFRL

Modified:
  head/sys/dev/fdt/fdt_mips.c

Modified: head/sys/dev/fdt/fdt_mips.c
==============================================================================
--- head/sys/dev/fdt/fdt_mips.c	Sat Jan 12 16:05:55 2013	(r245334)
+++ head/sys/dev/fdt/fdt_mips.c	Sat Jan 12 16:09:33 2013	(r245335)
@@ -49,8 +49,26 @@ struct fdt_fixup_entry fdt_fixup_table[]
 	{ NULL, NULL }
 };
 
+/*
+ * For PIC-free boards, provide a PIC decoder to be used with mips4k CP0
+ * interrupt control directly.
+ */
+static int
+fdt_pic_decode_mips4k_cp0(phandle_t node, pcell_t *intr, int *interrupt,
+    int *trig, int *pol)
+{
+
+	if (!fdt_is_compatible(node, "mips,mips4k"))
+		return (ENXIO);
+
+	*interrupt = fdt32_to_cpu(intr[0]);
+	*trig = INTR_TRIGGER_CONFORM;
+	*pol = INTR_POLARITY_CONFORM;
+
+	return (0);
+}
+
 fdt_pic_decode_t fdt_pic_table[] = {
-	NULL,
-	NULL,
+	&fdt_pic_decode_mips4k_cp0,
 	NULL
 };