svn commit: r234327 - head/sys/mips/conf

[Adrian Chadd]

Author: adrian
Date: Sun Apr 15 22:59:56 2012
New Revision: 234327
URL: http://svn.freebsd.org/changeset/base/234327

Log:
  Add in the AP96 phy configuration from openwrt.
  
  * arge0 doesn't (yet) work via the switch PHY ports; I'm not sure why.
  * arge1 maps to the WAN port. That works.
  
  TODO:
  
  * The PLL register needs a different (non-default) value for Gigabit
    Ethernet.  The board setup code needs to be extended a bit to allow
    for non-default pll_1000 values - right now, those values come out
    of hard-coded values in the per-chip set_pll_ge() routines.
  
  Obtained from:	Linux / OpenWRT

Modified:
  head/sys/mips/conf/AP96.hints

Modified: head/sys/mips/conf/AP96.hints
==============================================================================
--- head/sys/mips/conf/AP96.hints	Sun Apr 15 22:34:22 2012	(r234326)
+++ head/sys/mips/conf/AP96.hints	Sun Apr 15 22:59:56 2012	(r234327)
@@ -1,17 +1,15 @@
 # $FreeBSD$
 
-hint.arge.0.phymask=0x000c
-hint.arge.0.media=100
+# TODO: RGMII
+hint.arge.0.phymask=0x0f
+hint.arge.0.media=1000
 hint.arge.0.fduplex=1
 
-# XXX grab these from uboot?
-# hint.arge.0.eeprommac=0x1f01fc00
-
-# The ath NICs have calibration data in flash.
-# PCI slot 17
-# hint.ath.0.eepromaddr=0x1fff1000
-# PCI slot 18
-# hint.ath.1.eepromaddr=0x1fff5000
+# TODO: RGMII
+# TODO: pll_1000 = 0x1f000000
+hint.arge.1.phymask=0x10
+# hint.arge.1.media=1000
+# hint.arge.1.fduplex=1
 
 # ath0 - slot 17
 hint.pcib.0.bus.0.17.0.ath_fixup_addr=0x1fff1000