svn commit: r222018 - in head/sys/dev: pci usb/controller

[Ruslan Ermilov]

Author: ru
Date: Tue May 17 11:23:43 2011
New Revision: 222018
URL: http://svn.freebsd.org/changeset/base/222018

Log:
  Renamed PCI_INTERFACE_XHCI to PCIP_SERIALBUS_USB_XHCI and moved it
  to <dev/pci/pcireg.h>.
  
  Reviewed by:	hselasky
  MFC after:	3 days

Modified:
  head/sys/dev/pci/pcireg.h
  head/sys/dev/usb/controller/xhci_pci.c
  head/sys/dev/usb/controller/xhcireg.h

Modified: head/sys/dev/pci/pcireg.h
==============================================================================
--- head/sys/dev/pci/pcireg.h	Tue May 17 11:08:15 2011	(r222017)
+++ head/sys/dev/pci/pcireg.h	Tue May 17 11:23:43 2011	(r222018)
@@ -367,6 +367,7 @@
 #define	PCIP_SERIALBUS_USB_UHCI		0x00
 #define	PCIP_SERIALBUS_USB_OHCI		0x10
 #define	PCIP_SERIALBUS_USB_EHCI		0x20
+#define	PCIP_SERIALBUS_USB_XHCI		0x30
 #define	PCIP_SERIALBUS_USB_DEVICE	0xfe
 #define	PCIS_SERIALBUS_FC	0x04
 #define	PCIS_SERIALBUS_SMBUS	0x05

Modified: head/sys/dev/usb/controller/xhci_pci.c
==============================================================================
--- head/sys/dev/usb/controller/xhci_pci.c	Tue May 17 11:08:15 2011	(r222017)
+++ head/sys/dev/usb/controller/xhci_pci.c	Tue May 17 11:23:43 2011	(r222018)
@@ -137,7 +137,7 @@ xhci_pci_match(device_t self)
 {
 	if ((pci_get_class(self) == PCIC_SERIALBUS)
 	    && (pci_get_subclass(self) == PCIS_SERIALBUS_USB)
-	    && (pci_get_progif(self) == PCI_INTERFACE_XHCI)) {
+	    && (pci_get_progif(self) == PCIP_SERIALBUS_USB_XHCI)) {
 		return ("XHCI (generic) USB 3.0 controller");
 	}
 	return (NULL);			/* dunno */

Modified: head/sys/dev/usb/controller/xhcireg.h
==============================================================================
--- head/sys/dev/usb/controller/xhcireg.h	Tue May 17 11:08:15 2011	(r222017)
+++ head/sys/dev/usb/controller/xhcireg.h	Tue May 17 11:23:43 2011	(r222018)
@@ -33,7 +33,6 @@
 #define	PCI_XHCI_USBREV		0x60	/* RO USB protocol revision */
 #define	PCI_USB_REV_3_0		0x30	/* USB 3.0 */
 #define	PCI_XHCI_FLADJ		0x61	/* RW frame length adjust */
-#define	PCI_INTERFACE_XHCI	0x30	/* USB 3.0 - XHCI */
 
 /* XHCI capability registers */
 #define	XHCI_CAPLENGTH		0x00	/* RO capability */