svn commit: r222866 - head/sys/x86/x86

[Peter Jeremy]

On 2011-Jun-18 22:05:06 +1000, Bruce Evans <brde at optusnet.com.au> wrote:
>My clock measurement program (mostly an old program by Wollman) shows
>the following histogram of times for a non-invariant TSC timecounter
>on a 2GHz UP system:
>
>% min 273, max 265102, mean 273.998217, std 79.069534
>% 1th: 273 (1727219 observations)
>% 2th: 274 (265607 observations)
>% 3th: 275 (6984 observations)
>% 4th: 280 (11 observations)
>% 5th: 290 (8 observations)
>
>The variance is small, and differences of a single nS can be seen clearly.

Unfortunately, Intel broke this in their P-state invariant TSC
implementation.  Rather than incrementing the TSC by one at the
CPU core frequency, they increment by the core multiplier at the
FSB frequency.  This gives a result like the following on my Atom
N270:
delta  samples
24    49637124
36    50312540
48       44658
60          77

This makes it virtually impossible to measure short periods.

Luckily, AMD seem to have gotten this right.

-- 
Peter Jeremy
-------------- next part --------------
A non-text attachment was scrubbed...
Name: not available
Type: application/pgp-signature
Size: 196 bytes
Desc: not available
Url : http://lists.freebsd.org/pipermail/svn-src-head/attachments/20110620/949a8b4b/attachment.pgp