svn commit: r212368 - head/sys/dev/pci

[mdf at FreeBSD.org]

On Thu, Sep 9, 2010 at 11:19 AM, John Baldwin <jhb at freebsd.org> wrote:
> Author: jhb
> Date: Thu Sep  9 18:19:15 2010
> New Revision: 212368
> URL: http://svn.freebsd.org/changeset/base/212368
>
> Log:
>  - Rename the constant for the Master Data Parity Error flag in the
>    PCI status register to map its current name.
>  - Use PCIM_* rather than PCIR_* for constants for fields in various AER
>    registers.  I got about half of them right in the previous commit.
>
>  MFC after:    1 week
>
> Modified:
>  head/sys/dev/pci/pcireg.h

This seems to break building CURRENT with this error:

/data/sb/bsd.git/sys/dev/msk/if_msk.c: In function 'mskc_reset':
/data/sb/bsd.git/sys/dev/msk/if_msk.c:1337: error:
'PCIM_STATUS_PERRREPORT' undeclared (first use in this function)
/data/sb/bsd.git/sys/dev/msk/if_msk.c:1337: error: (Each undeclared
identifier is reported only once
/data/sb/bsd.git/sys/dev/msk/if_msk.c:1337: error: for each function
it appears in.)
/data/sb/bsd.git/sys/dev/msk/if_msk.c: In function 'msk_intr_hwerr':
/data/sb/bsd.git/sys/dev/msk/if_msk.c:3408: error:
'PCIM_STATUS_PERRREPORT' undeclared (first use in this function)

Thanks,
matthew
>
> Modified: head/sys/dev/pci/pcireg.h
> ==============================================================================
> --- head/sys/dev/pci/pcireg.h   Thu Sep  9 17:49:18 2010        (r212367)
> +++ head/sys/dev/pci/pcireg.h   Thu Sep  9 18:19:15 2010        (r212368)
> @@ -67,7 +67,7 @@
>  #define        PCIM_STATUS_CAPPRESENT  0x0010
>  #define        PCIM_STATUS_66CAPABLE   0x0020
>  #define        PCIM_STATUS_BACKTOBACK  0x0080
> -#define        PCIM_STATUS_PERRREPORT  0x0100
> +#define        PCIM_STATUS_MDPERR      0x0100
>  #define        PCIM_STATUS_SEL_FAST    0x0000
>  #define        PCIM_STATUS_SEL_MEDIMUM 0x0200
>  #define        PCIM_STATUS_SEL_SLOW    0x0400
> @@ -689,18 +689,18 @@
>
>  /* Advanced Error Reporting */
>  #define        PCIR_AER_UC_STATUS      0x04
> -#define        PCIR_AER_UC_TRAINING_ERROR      0x00000001
> -#define        PCIR_AER_UC_DL_PROTOCOL_ERROR   0x00000010
> -#define        PCIR_AER_UC_POISONED_TLP        0x00001000
> -#define        PCIR_AER_UC_FC_PROTOCOL_ERROR   0x00002000
> -#define        PCIR_AER_UC_COMPLETION_TIMEOUT  0x00004000
> -#define        PCIR_AER_UC_COMPLETER_ABORT     0x00008000
> -#define        PCIR_AER_UC_UNEXPECTED_COMPLETION 0x00010000
> -#define        PCIR_AER_UC_RECEIVER_OVERFLOW   0x00020000
> -#define        PCIR_AER_UC_MALFORMED_TLP       0x00040000
> -#define        PCIR_AER_UC_ECRC_ERROR          0x00080000
> -#define        PCIR_AER_UC_UNSUPPORTED_REQUEST 0x00100000
> -#define        PCIR_AER_UC_ACS_VIOLATION       0x00200000
> +#define        PCIM_AER_UC_TRAINING_ERROR      0x00000001
> +#define        PCIM_AER_UC_DL_PROTOCOL_ERROR   0x00000010
> +#define        PCIM_AER_UC_POISONED_TLP        0x00001000
> +#define        PCIM_AER_UC_FC_PROTOCOL_ERROR   0x00002000
> +#define        PCIM_AER_UC_COMPLETION_TIMEOUT  0x00004000
> +#define        PCIM_AER_UC_COMPLETER_ABORT     0x00008000
> +#define        PCIM_AER_UC_UNEXPECTED_COMPLETION 0x00010000
> +#define        PCIM_AER_UC_RECEIVER_OVERFLOW   0x00020000
> +#define        PCIM_AER_UC_MALFORMED_TLP       0x00040000
> +#define        PCIM_AER_UC_ECRC_ERROR          0x00080000
> +#define        PCIM_AER_UC_UNSUPPORTED_REQUEST 0x00100000
> +#define        PCIM_AER_UC_ACS_VIOLATION       0x00200000
>  #define        PCIR_AER_UC_MASK        0x08    /* Shares bits with UC_STATUS */
>  #define        PCIR_AER_UC_SEVERITY    0x0c    /* Shares bits with UC_STATUS */
>  #define        PCIR_AER_COR_STATUS     0x10
> @@ -718,18 +718,18 @@
>  #define        PCIM_AER_ECRC_CHECK_ENABLE      0x00000100
>  #define        PCIR_AER_HEADER_LOG     0x1c
>  #define        PCIR_AER_ROOTERR_CMD    0x2c    /* Only for root complex ports */
> -#define        PCIR_AER_ROOTERR_COR_ENABLE     0x00000001
> -#define        PCIR_AER_ROOTERR_NF_ENABLE      0x00000002
> -#define        PCIR_AER_ROOTERR_F_ENABLE       0x00000004
> +#define        PCIM_AER_ROOTERR_COR_ENABLE     0x00000001
> +#define        PCIM_AER_ROOTERR_NF_ENABLE      0x00000002
> +#define        PCIM_AER_ROOTERR_F_ENABLE       0x00000004
>  #define        PCIR_AER_ROOTERR_STATUS 0x30    /* Only for root complex ports */
> -#define        PCIR_AER_ROOTERR_COR_ERR        0x00000001
> -#define        PCIR_AER_ROOTERR_MULTI_COR_ERR  0x00000002
> -#define        PCIR_AER_ROOTERR_UC_ERR         0x00000004
> -#define        PCIR_AER_ROOTERR_MULTI_UC_ERR   0x00000008
> -#define        PCIR_AER_ROOTERR_FIRST_UC_FATAL 0x00000010
> -#define        PCIR_AER_ROOTERR_NF_ERR         0x00000020
> -#define        PCIR_AER_ROOTERR_F_ERR          0x00000040
> -#define        PCIR_AER_ROOTERR_INT_MESSAGE    0xf8000000
> +#define        PCIM_AER_ROOTERR_COR_ERR        0x00000001
> +#define        PCIM_AER_ROOTERR_MULTI_COR_ERR  0x00000002
> +#define        PCIM_AER_ROOTERR_UC_ERR         0x00000004
> +#define        PCIM_AER_ROOTERR_MULTI_UC_ERR   0x00000008
> +#define        PCIM_AER_ROOTERR_FIRST_UC_FATAL 0x00000010
> +#define        PCIM_AER_ROOTERR_NF_ERR         0x00000020
> +#define        PCIM_AER_ROOTERR_F_ERR          0x00000040
> +#define        PCIM_AER_ROOTERR_INT_MESSAGE    0xf8000000
>  #define        PCIR_AER_COR_SOURCE_ID  0x34    /* Only for root complex ports */
>  #define        PCIR_AER_ERR_SOURCE_ID  0x36    /* Only for root complex ports */
>
>