svn commit: r202867 - head/sys/mips/cavium
Warner Losh
imp at FreeBSD.org
Sat Jan 23 06:42:47 UTC 2010
Author: imp
Date: Sat Jan 23 06:42:47 2010
New Revision: 202867
URL: http://svn.freebsd.org/changeset/base/202867
Log:
Eliminate octeonregs.h. It was a copy of maltaregs.h with
s/malta/octeon/gi done...
Deleted:
head/sys/mips/cavium/octeonreg.h
Modified:
head/sys/mips/cavium/obio.c
head/sys/mips/cavium/octeon_machdep.c
head/sys/mips/cavium/octeon_pcmap_regs.h
head/sys/mips/cavium/uart_bus_octeonusart.c
head/sys/mips/cavium/uart_cpu_octeonusart.c
Modified: head/sys/mips/cavium/obio.c
==============================================================================
--- head/sys/mips/cavium/obio.c Sat Jan 23 06:29:34 2010 (r202866)
+++ head/sys/mips/cavium/obio.c Sat Jan 23 06:42:47 2010 (r202867)
@@ -53,7 +53,7 @@ __FBSDID("$FreeBSD$");
#include <machine/bus.h>
-#include <mips/cavium/octeonreg.h>
+#include <mips/cavium/octeon_pcmap_regs.h>
#include <mips/cavium/obiovar.h>
int obio_probe(device_t);
@@ -81,7 +81,7 @@ obio_attach(device_t dev)
struct obio_softc *sc = device_get_softc(dev);
sc->oba_st = mips_bus_space_generic;
- sc->oba_addr = OCTEON_UART0ADR;
+ sc->oba_addr = OCTEON_MIO_UART0;
sc->oba_size = 0x10000;
sc->oba_rman.rm_type = RMAN_ARRAY;
sc->oba_rman.rm_descr = "OBIO I/O";
@@ -126,7 +126,8 @@ obio_alloc_resource(device_t bus, device
case SYS_RES_IOPORT:
rm = &sc->oba_rman;
bt = sc->oba_st;
- bh = device_get_unit(child) ? OCTEON_UART1ADR : OCTEON_UART0ADR;
+ bh = device_get_unit(child) ?
+ OCTEON_MIO_UART1 : OCTEON_MIO_UART0;
start = bh;
break;
default:
Modified: head/sys/mips/cavium/octeon_machdep.c
==============================================================================
--- head/sys/mips/cavium/octeon_machdep.c Sat Jan 23 06:29:34 2010 (r202866)
+++ head/sys/mips/cavium/octeon_machdep.c Sat Jan 23 06:42:47 2010 (r202867)
@@ -61,7 +61,6 @@ __FBSDID("$FreeBSD$");
#include <machine/cpuregs.h>
#include <machine/cpufunc.h>
#include <mips/cavium/octeon_pcmap_regs.h>
-#include <mips/cavium/octeonreg.h>
#include <machine/hwfunc.h>
#include <machine/intr_machdep.h>
#include <machine/locore.h>
Modified: head/sys/mips/cavium/octeon_pcmap_regs.h
==============================================================================
--- head/sys/mips/cavium/octeon_pcmap_regs.h Sat Jan 23 06:29:34 2010 (r202866)
+++ head/sys/mips/cavium/octeon_pcmap_regs.h Sat Jan 23 06:42:47 2010 (r202867)
@@ -52,8 +52,7 @@ extern struct pcpu *cpuid_to_pcpu[];
#define OCTEON_SYNCW __asm __volatile (".word 0x10f" : : )
#define OCTEON_SYNCWS __asm __volatile (".word 0x14f" : : )
-//#if defined(__mips_n32) || defined(__mips_n64)
-#if defined(__not_used)
+#if defined(__mips_n32) || defined(__mips_n64)
static inline void oct_write64 (uint64_t csr_addr, uint64_t val64)
{
@@ -951,6 +950,8 @@ typedef union {
/*
* Octeon UART unit
*/
+#define OCTEON_MIO_UART0 0x8001180000000800ull
+#define OCTEON_MIO_UART1 0x8001180000000C00ull
#define OCTEON_MIO_UART0_THR 0x8001180000000840ull
#define OCTEON_MIO_UART1_THR 0x8001180000000C40ull
#define OCTEON_MIO_UART0_LSR 0x8001180000000828ull
@@ -960,6 +961,7 @@ typedef union {
#define OCTEON_MIO_UART0_USR 0x8001180000000938ull
#define OCTEON_MIO_UART1_USR 0x8001180000000D38ull
#define OCTEON_MIO_ADDR_HI24 0x800118
+#define OCTEON_MIO_UART_SIZE 0x400ull
/*
Modified: head/sys/mips/cavium/uart_bus_octeonusart.c
==============================================================================
--- head/sys/mips/cavium/uart_bus_octeonusart.c Sat Jan 23 06:29:34 2010 (r202866)
+++ head/sys/mips/cavium/uart_bus_octeonusart.c Sat Jan 23 06:42:47 2010 (r202867)
@@ -53,10 +53,7 @@ __FBSDID("$FreeBSD$");
#include <dev/uart/uart_bus.h>
#include <dev/uart/uart_cpu.h>
-/*
- * XXXMIPS:
- */
-#include <mips/cavium/octeonreg.h>
+#include <mips/cavium/octeon_pcmap_regs.h>
#include "uart_if.h"
@@ -96,7 +93,6 @@ uart_octeon_probe(device_t dev)
sc = device_get_softc(dev);
sc->sc_class = &uart_oct16550_class;
-#if 1
/*
* We inherit the settings from the systme console. Note, the bst
* bad bus_space_map are bogus here, but obio doesn't yet support
@@ -105,10 +101,9 @@ uart_octeon_probe(device_t dev)
sc->sc_sysdev = SLIST_FIRST(&uart_sysdevs);
bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas));
sc->sc_bas.bst = uart_bus_space_mem;
- if (bus_space_map(sc->sc_bas.bst, OCTEON_UART0ADR, OCTEON_UART_SIZE,
+ if (bus_space_map(sc->sc_bas.bst, OCTEON_MIO_UART0, OCTEON_MIO_UART_SIZE,
0, &sc->sc_bas.bsh) != 0)
return (ENXIO);
-#endif
return (uart_bus_probe(dev, sc->sc_bas.regshft, 0, 0, unit));
}
Modified: head/sys/mips/cavium/uart_cpu_octeonusart.c
==============================================================================
--- head/sys/mips/cavium/uart_cpu_octeonusart.c Sat Jan 23 06:29:34 2010 (r202866)
+++ head/sys/mips/cavium/uart_cpu_octeonusart.c Sat Jan 23 06:42:47 2010 (r202867)
@@ -41,7 +41,6 @@ __FBSDID("$FreeBSD$");
#include <dev/uart/uart.h>
#include <dev/uart/uart_cpu.h>
-#include <mips/cavium/octeonreg.h>
#include <mips/cavium/octeon_pcmap_regs.h>
bus_space_tag_t uart_bus_space_io;
@@ -177,7 +176,7 @@ uart_cpu_getdev(int devtype, struct uart
*/
di->ops = uart_getops(class);
di->bas.chan = 0;
- if (bus_space_map(di->bas.bst, OCTEON_UART0ADR, OCTEON_UART_SIZE,
+ if (bus_space_map(di->bas.bst, OCTEON_MIO_UART0, OCTEON_MIO_UART_SIZE,
0, &di->bas.bsh) != 0)
return (ENXIO);
di->bas.regshft = 0;
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