svn commit: r190386 - in head/sys: amd64/pci i386/pci

[John Baldwin]

Author: jhb
Date: Tue Mar 24 18:10:22 2009
New Revision: 190386
URL: http://svn.freebsd.org/changeset/base/190386

Log:
  Fall back to using configuration type 1 accesses for PCI config requests if
  the requested PCI bus falls outside of the bus range given in the ACPI
  MCFG table.  Several BIOSes seem to not include all of the PCI busses in
  systems in their MCFG tables.  It maybe that the BIOS is simply buggy and
  does support all the busses, but it is more conservative to just fall back
  to the old method unless it is certain that memory accesses will work.

Modified:
  head/sys/amd64/pci/pci_cfgreg.c
  head/sys/i386/pci/pci_cfgreg.c

Modified: head/sys/amd64/pci/pci_cfgreg.c
==============================================================================
--- head/sys/amd64/pci/pci_cfgreg.c	Tue Mar 24 18:02:35 2009	(r190385)
+++ head/sys/amd64/pci/pci_cfgreg.c	Tue Mar 24 18:10:22 2009	(r190386)
@@ -119,6 +119,7 @@ pci_docfgregread(int bus, int slot, int 
 {
 
 	if (cfgmech == CFGMECH_PCIE &&
+	    (bus >= pcie_minbus && bus <= pcie_maxbus) &&
 	    (bus != 0 || !(1 << slot & pcie_badslots)))
 		return (pciereg_cfgread(bus, slot, func, reg, bytes));
 	else
@@ -158,6 +159,7 @@ pci_cfgregwrite(int bus, int slot, int f
 {
 
 	if (cfgmech == CFGMECH_PCIE &&
+	    (bus >= pcie_minbus && bus <= pcie_maxbus) &&
 	    (bus != 0 || !(1 << slot & pcie_badslots)))
 		pciereg_cfgwrite(bus, slot, func, reg, data, bytes);
 	else

Modified: head/sys/i386/pci/pci_cfgreg.c
==============================================================================
--- head/sys/i386/pci/pci_cfgreg.c	Tue Mar 24 18:02:35 2009	(r190385)
+++ head/sys/i386/pci/pci_cfgreg.c	Tue Mar 24 18:10:22 2009	(r190386)
@@ -206,6 +206,7 @@ pci_docfgregread(int bus, int slot, int 
 {
 
 	if (cfgmech == CFGMECH_PCIE &&
+	    (bus >= pcie_minbus && bus <= pcie_maxbus) &&
 	    (bus != 0 || !(1 << slot & pcie_badslots)))
 		return (pciereg_cfgread(bus, slot, func, reg, bytes));
 	else
@@ -240,6 +241,7 @@ pci_cfgregwrite(int bus, int slot, int f
 {
 
 	if (cfgmech == CFGMECH_PCIE &&
+	    (bus >= pcie_minbus && bus <= pcie_maxbus) &&
 	    (bus != 0 || !(1 << slot & pcie_badslots)))
 		pciereg_cfgwrite(bus, slot, func, reg, data, bytes);
 	else