svn commit: r200804 - head/sys/dev/ste
Pyun YongHyeon
yongari at FreeBSD.org
Mon Dec 21 20:02:13 UTC 2009
Author: yongari
Date: Mon Dec 21 20:02:12 2009
New Revision: 200804
URL: http://svn.freebsd.org/changeset/base/200804
Log:
Remove trailing white spaces.
Modified:
head/sys/dev/ste/if_ste.c
head/sys/dev/ste/if_stereg.h
Modified: head/sys/dev/ste/if_ste.c
==============================================================================
--- head/sys/dev/ste/if_ste.c Mon Dec 21 20:00:27 2009 (r200803)
+++ head/sys/dev/ste/if_ste.c Mon Dec 21 20:02:12 2009 (r200804)
@@ -194,7 +194,7 @@ SYSCTL_INT(_hw_ste, OID_AUTO, rxsyncs, C
#define MII_SET(x) STE_SETBIT1(sc, STE_PHYCTL, x)
-#define MII_CLR(x) STE_CLRBIT1(sc, STE_PHYCTL, x)
+#define MII_CLR(x) STE_CLRBIT1(sc, STE_PHYCTL, x)
/*
* Sync the PHYs by setting data bit and strobing the clock 32 times.
@@ -252,7 +252,7 @@ ste_mii_readreg(struct ste_softc *sc, st
frame->mii_opcode = STE_MII_READOP;
frame->mii_turnaround = 0;
frame->mii_data = 0;
-
+
CSR_WRITE_2(sc, STE_PHYCTL, 0);
/*
* Turn on data xmit.
@@ -337,7 +337,7 @@ ste_mii_writereg(struct ste_softc *sc, s
frame->mii_stdelim = STE_MII_STARTDELIM;
frame->mii_opcode = STE_MII_WRITEOP;
frame->mii_turnaround = STE_MII_TURNAROUND;
-
+
/*
* Turn on data output.
*/
@@ -420,7 +420,7 @@ ste_miibus_statchg(device_t dev)
STE_CLRBIT2(sc, STE_MACCTL0, STE_MACCTL0_FULLDUPLEX);
}
}
-
+
static int
ste_ifmedia_upd(struct ifnet *ifp)
{
@@ -431,7 +431,7 @@ ste_ifmedia_upd(struct ifnet *ifp)
ste_ifmedia_upd_locked(ifp);
STE_UNLOCK(sc);
- return(0);
+ return(0);
}
static void
@@ -531,7 +531,7 @@ ste_read_eeprom(struct ste_softc *sc, ca
if (swap)
*ptr = ntohs(word);
else
- *ptr = word;
+ *ptr = word;
}
return(err ? 1 : 0);
@@ -783,7 +783,7 @@ ste_rxeof(struct ste_softc *sc)
continue;
}
- /* No errors; receive the packet. */
+ /* No errors; receive the packet. */
m = cur_rx->ste_mbuf;
total_len = cur_rx->ste_ptr->ste_status & STE_RXSTAT_FRAMELEN;
@@ -1334,7 +1334,7 @@ ste_init_locked(struct ste_softc *sc)
/* Disable interrupts if we are polling. */
if (ifp->if_capenable & IFCAP_POLLING)
CSR_WRITE_2(sc, STE_IMR, 0);
- else
+ else
#endif
/* Enable interrupts. */
CSR_WRITE_2(sc, STE_IMR, STE_INTRS);
@@ -1369,8 +1369,8 @@ ste_stop(struct ste_softc *sc)
STE_SETBIT2(sc, STE_DMACTL, STE_DMACTL_TXDMA_STALL);
STE_SETBIT2(sc, STE_DMACTL, STE_DMACTL_RXDMA_STALL);
ste_wait(sc);
- /*
- * Try really hard to stop the RX engine or under heavy RX
+ /*
+ * Try really hard to stop the RX engine or under heavy RX
* data chip will write into de-allocated memory.
*/
ste_reset(sc);
@@ -1442,7 +1442,7 @@ ste_ioctl(struct ifnet *ifp, u_long comm
sc->ste_if_flags & IFF_PROMISC) {
STE_CLRBIT1(sc, STE_RX_MODE,
STE_RXMODE_PROMISC);
- }
+ }
if (ifp->if_drv_flags & IFF_DRV_RUNNING &&
(ifp->if_flags ^ sc->ste_if_flags) & IFF_ALLMULTI)
ste_setmulti(sc);
@@ -1483,7 +1483,7 @@ ste_ioctl(struct ifnet *ifp, u_long comm
ifp->if_capenable |= IFCAP_POLLING;
STE_UNLOCK(sc);
return (error);
-
+
}
if (!(ifr->ifr_reqcap & IFCAP_POLLING) &&
ifp->if_capenable & IFCAP_POLLING) {
@@ -1615,7 +1615,7 @@ ste_start_locked(struct ifnet *ifp)
/* Set TX polling interval to start TX engine */
CSR_WRITE_1(sc, STE_TX_DMAPOLL_PERIOD, 64);
-
+
STE_SETBIT4(sc, STE_DMACTL, STE_DMACTL_TXDMA_UNSTALL);
ste_wait(sc);
}else{
Modified: head/sys/dev/ste/if_stereg.h
==============================================================================
--- head/sys/dev/ste/if_stereg.h Mon Dec 21 20:00:27 2009 (r200803)
+++ head/sys/dev/ste/if_stereg.h Mon Dec 21 20:02:12 2009 (r200804)
@@ -96,7 +96,7 @@
#define STE_LATE_COLLS 0x75
#define STE_MULTI_COLLS 0x76
-#define STE_SINGLE_COLLS 0x77
+#define STE_SINGLE_COLLS 0x77
#define STE_DMACTL_RXDMA_STOPPED 0x00000001
#define STE_DMACTL_TXDMA_CMPREQ 0x00000002
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